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[openwrt/staging/mkresin.git] / openwrt / target / linux / linux-2.6 / patches / generic / 003-net-b44-1.patch
1 diff -ur linux-2.6.15-rc5/drivers/net/b44.c linux-2.6.15-rc5-openwrt/drivers/net/b44.c
2 --- linux-2.6.15-rc5/drivers/net/b44.c 2005-12-04 06:10:42.000000000 +0100
3 +++ linux-2.6.15-rc5-openwrt/drivers/net/b44.c 2005-08-15 02:20:18.000000000 +0200
4 @@ -18,7 +18,7 @@
5 #include <linux/pci.h>
6 #include <linux/delay.h>
7 #include <linux/init.h>
8 -#include <linux/dma-mapping.h>
9 +#include <linux/version.h>
10
11 #include <asm/uaccess.h>
12 #include <asm/io.h>
13 @@ -28,8 +28,8 @@
14
15 #define DRV_MODULE_NAME "b44"
16 #define PFX DRV_MODULE_NAME ": "
17 -#define DRV_MODULE_VERSION "0.97"
18 -#define DRV_MODULE_RELDATE "Nov 30, 2005"
19 +#define DRV_MODULE_VERSION "0.95"
20 +#define DRV_MODULE_RELDATE "Aug 3, 2004"
21
22 #define B44_DEF_MSG_ENABLE \
23 (NETIF_MSG_DRV | \
24 @@ -101,35 +101,10 @@
25 static void b44_halt(struct b44 *);
26 static void b44_init_rings(struct b44 *);
27 static void b44_init_hw(struct b44 *);
28 -
29 -static int dma_desc_align_mask;
30 -static int dma_desc_sync_size;
31 -
32 -static const char b44_gstrings[][ETH_GSTRING_LEN] = {
33 -#define _B44(x...) # x,
34 -B44_STAT_REG_DECLARE
35 -#undef _B44
36 -};
37 -
38 -static inline void b44_sync_dma_desc_for_device(struct pci_dev *pdev,
39 - dma_addr_t dma_base,
40 - unsigned long offset,
41 - enum dma_data_direction dir)
42 -{
43 - dma_sync_single_range_for_device(&pdev->dev, dma_base,
44 - offset & dma_desc_align_mask,
45 - dma_desc_sync_size, dir);
46 -}
47 -
48 -static inline void b44_sync_dma_desc_for_cpu(struct pci_dev *pdev,
49 - dma_addr_t dma_base,
50 - unsigned long offset,
51 - enum dma_data_direction dir)
52 -{
53 - dma_sync_single_range_for_cpu(&pdev->dev, dma_base,
54 - offset & dma_desc_align_mask,
55 - dma_desc_sync_size, dir);
56 -}
57 +static int b44_poll(struct net_device *dev, int *budget);
58 +#ifdef CONFIG_NET_POLL_CONTROLLER
59 +static void b44_poll_controller(struct net_device *dev);
60 +#endif
61
62 static inline unsigned long br32(const struct b44 *bp, unsigned long reg)
63 {
64 @@ -503,10 +478,7 @@
65 for (reg = B44_TX_GOOD_O; reg <= B44_TX_PAUSE; reg += 4UL) {
66 *val++ += br32(bp, reg);
67 }
68 -
69 - /* Pad */
70 - reg += 8*4UL;
71 -
72 + val = &bp->hw_stats.rx_good_octets;
73 for (reg = B44_RX_GOOD_O; reg <= B44_RX_NPAUSE; reg += 4UL) {
74 *val++ += br32(bp, reg);
75 }
76 @@ -657,7 +629,7 @@
77
78 /* Hardware bug work-around, the chip is unable to do PCI DMA
79 to/from anything above 1GB :-( */
80 - if (mapping + RX_PKT_BUF_SZ > B44_DMA_MASK) {
81 + if(mapping+RX_PKT_BUF_SZ > B44_DMA_MASK) {
82 /* Sigh... */
83 pci_unmap_single(bp->pdev, mapping, RX_PKT_BUF_SZ,PCI_DMA_FROMDEVICE);
84 dev_kfree_skb_any(skb);
85 @@ -667,7 +639,7 @@
86 mapping = pci_map_single(bp->pdev, skb->data,
87 RX_PKT_BUF_SZ,
88 PCI_DMA_FROMDEVICE);
89 - if (mapping + RX_PKT_BUF_SZ > B44_DMA_MASK) {
90 + if(mapping+RX_PKT_BUF_SZ > B44_DMA_MASK) {
91 pci_unmap_single(bp->pdev, mapping, RX_PKT_BUF_SZ,PCI_DMA_FROMDEVICE);
92 dev_kfree_skb_any(skb);
93 return -ENOMEM;
94 @@ -696,11 +668,6 @@
95 dp->ctrl = cpu_to_le32(ctrl);
96 dp->addr = cpu_to_le32((u32) mapping + bp->rx_offset + bp->dma_offset);
97
98 - if (bp->flags & B44_FLAG_RX_RING_HACK)
99 - b44_sync_dma_desc_for_device(bp->pdev, bp->rx_ring_dma,
100 - dest_idx * sizeof(dp),
101 - DMA_BIDIRECTIONAL);
102 -
103 return RX_PKT_BUF_SZ;
104 }
105
106 @@ -725,11 +692,6 @@
107 pci_unmap_addr_set(dest_map, mapping,
108 pci_unmap_addr(src_map, mapping));
109
110 - if (bp->flags & B44_FLAG_RX_RING_HACK)
111 - b44_sync_dma_desc_for_cpu(bp->pdev, bp->rx_ring_dma,
112 - src_idx * sizeof(src_desc),
113 - DMA_BIDIRECTIONAL);
114 -
115 ctrl = src_desc->ctrl;
116 if (dest_idx == (B44_RX_RING_SIZE - 1))
117 ctrl |= cpu_to_le32(DESC_CTRL_EOT);
118 @@ -738,14 +700,8 @@
119
120 dest_desc->ctrl = ctrl;
121 dest_desc->addr = src_desc->addr;
122 -
123 src_map->skb = NULL;
124
125 - if (bp->flags & B44_FLAG_RX_RING_HACK)
126 - b44_sync_dma_desc_for_device(bp->pdev, bp->rx_ring_dma,
127 - dest_idx * sizeof(dest_desc),
128 - DMA_BIDIRECTIONAL);
129 -
130 pci_dma_sync_single_for_device(bp->pdev, src_desc->addr,
131 RX_PKT_BUF_SZ,
132 PCI_DMA_FROMDEVICE);
133 @@ -894,10 +850,11 @@
134 {
135 struct net_device *dev = dev_id;
136 struct b44 *bp = netdev_priv(dev);
137 + unsigned long flags;
138 u32 istat, imask;
139 int handled = 0;
140
141 - spin_lock(&bp->lock);
142 + spin_lock_irqsave(&bp->lock, flags);
143
144 istat = br32(bp, B44_ISTAT);
145 imask = br32(bp, B44_IMASK);
146 @@ -908,12 +865,6 @@
147 istat &= imask;
148 if (istat) {
149 handled = 1;
150 -
151 - if (unlikely(!netif_running(dev))) {
152 - printk(KERN_INFO "%s: late interrupt.\n", dev->name);
153 - goto irq_ack;
154 - }
155 -
156 if (netif_rx_schedule_prep(dev)) {
157 /* NOTE: These writes are posted by the readback of
158 * the ISTAT register below.
159 @@ -926,11 +877,10 @@
160 dev->name);
161 }
162
163 -irq_ack:
164 bw32(bp, B44_ISTAT, istat);
165 br32(bp, B44_ISTAT);
166 }
167 - spin_unlock(&bp->lock);
168 + spin_unlock_irqrestore(&bp->lock, flags);
169 return IRQ_RETVAL(handled);
170 }
171
172 @@ -958,7 +908,6 @@
173 {
174 struct b44 *bp = netdev_priv(dev);
175 struct sk_buff *bounce_skb;
176 - int rc = NETDEV_TX_OK;
177 dma_addr_t mapping;
178 u32 len, entry, ctrl;
179
180 @@ -968,28 +917,29 @@
181 /* This is a hard error, log it. */
182 if (unlikely(TX_BUFFS_AVAIL(bp) < 1)) {
183 netif_stop_queue(dev);
184 + spin_unlock_irq(&bp->lock);
185 printk(KERN_ERR PFX "%s: BUG! Tx Ring full when queue awake!\n",
186 dev->name);
187 - goto err_out;
188 + return 1;
189 }
190
191 mapping = pci_map_single(bp->pdev, skb->data, len, PCI_DMA_TODEVICE);
192 - if (mapping + len > B44_DMA_MASK) {
193 + if(mapping+len > B44_DMA_MASK) {
194 /* Chip can't handle DMA to/from >1GB, use bounce buffer */
195 pci_unmap_single(bp->pdev, mapping, len, PCI_DMA_TODEVICE);
196
197 bounce_skb = __dev_alloc_skb(TX_PKT_BUF_SZ,
198 GFP_ATOMIC|GFP_DMA);
199 if (!bounce_skb)
200 - goto err_out;
201 + return NETDEV_TX_BUSY;
202
203 mapping = pci_map_single(bp->pdev, bounce_skb->data,
204 len, PCI_DMA_TODEVICE);
205 - if (mapping + len > B44_DMA_MASK) {
206 + if(mapping+len > B44_DMA_MASK) {
207 pci_unmap_single(bp->pdev, mapping,
208 len, PCI_DMA_TODEVICE);
209 dev_kfree_skb_any(bounce_skb);
210 - goto err_out;
211 + return NETDEV_TX_BUSY;
212 }
213
214 memcpy(skb_put(bounce_skb, len), skb->data, skb->len);
215 @@ -1009,11 +959,6 @@
216 bp->tx_ring[entry].ctrl = cpu_to_le32(ctrl);
217 bp->tx_ring[entry].addr = cpu_to_le32((u32) mapping+bp->dma_offset);
218
219 - if (bp->flags & B44_FLAG_TX_RING_HACK)
220 - b44_sync_dma_desc_for_device(bp->pdev, bp->tx_ring_dma,
221 - entry * sizeof(bp->tx_ring[0]),
222 - DMA_TO_DEVICE);
223 -
224 entry = NEXT_TX(entry);
225
226 bp->tx_prod = entry;
227 @@ -1029,16 +974,11 @@
228 if (TX_BUFFS_AVAIL(bp) < 1)
229 netif_stop_queue(dev);
230
231 - dev->trans_start = jiffies;
232 -
233 -out_unlock:
234 spin_unlock_irq(&bp->lock);
235
236 - return rc;
237 + dev->trans_start = jiffies;
238
239 -err_out:
240 - rc = NETDEV_TX_BUSY;
241 - goto out_unlock;
242 + return 0;
243 }
244
245 static int b44_change_mtu(struct net_device *dev, int new_mtu)
246 @@ -1112,7 +1052,8 @@
247 *
248 * The chip has been shut down and the driver detached from
249 * the networking, so no interrupts or new tx packets will
250 - * end up in the driver.
251 + * end up in the driver. bp->lock is not held and we are not
252 + * in an interrupt context and thus may sleep.
253 */
254 static void b44_init_rings(struct b44 *bp)
255 {
256 @@ -1123,16 +1064,6 @@
257 memset(bp->rx_ring, 0, B44_RX_RING_BYTES);
258 memset(bp->tx_ring, 0, B44_TX_RING_BYTES);
259
260 - if (bp->flags & B44_FLAG_RX_RING_HACK)
261 - dma_sync_single_for_device(&bp->pdev->dev, bp->rx_ring_dma,
262 - DMA_TABLE_BYTES,
263 - PCI_DMA_BIDIRECTIONAL);
264 -
265 - if (bp->flags & B44_FLAG_TX_RING_HACK)
266 - dma_sync_single_for_device(&bp->pdev->dev, bp->tx_ring_dma,
267 - DMA_TABLE_BYTES,
268 - PCI_DMA_TODEVICE);
269 -
270 for (i = 0; i < bp->rx_pending; i++) {
271 if (b44_alloc_rx_skb(bp, -1, i) < 0)
272 break;
273 @@ -1145,33 +1076,23 @@
274 */
275 static void b44_free_consistent(struct b44 *bp)
276 {
277 - kfree(bp->rx_buffers);
278 - bp->rx_buffers = NULL;
279 - kfree(bp->tx_buffers);
280 - bp->tx_buffers = NULL;
281 + if (bp->rx_buffers) {
282 + kfree(bp->rx_buffers);
283 + bp->rx_buffers = NULL;
284 + }
285 + if (bp->tx_buffers) {
286 + kfree(bp->tx_buffers);
287 + bp->tx_buffers = NULL;
288 + }
289 if (bp->rx_ring) {
290 - if (bp->flags & B44_FLAG_RX_RING_HACK) {
291 - dma_unmap_single(&bp->pdev->dev, bp->rx_ring_dma,
292 - DMA_TABLE_BYTES,
293 - DMA_BIDIRECTIONAL);
294 - kfree(bp->rx_ring);
295 - } else
296 - pci_free_consistent(bp->pdev, DMA_TABLE_BYTES,
297 - bp->rx_ring, bp->rx_ring_dma);
298 + pci_free_consistent(bp->pdev, DMA_TABLE_BYTES,
299 + bp->rx_ring, bp->rx_ring_dma);
300 bp->rx_ring = NULL;
301 - bp->flags &= ~B44_FLAG_RX_RING_HACK;
302 }
303 if (bp->tx_ring) {
304 - if (bp->flags & B44_FLAG_TX_RING_HACK) {
305 - dma_unmap_single(&bp->pdev->dev, bp->tx_ring_dma,
306 - DMA_TABLE_BYTES,
307 - DMA_TO_DEVICE);
308 - kfree(bp->tx_ring);
309 - } else
310 - pci_free_consistent(bp->pdev, DMA_TABLE_BYTES,
311 - bp->tx_ring, bp->tx_ring_dma);
312 + pci_free_consistent(bp->pdev, DMA_TABLE_BYTES,
313 + bp->tx_ring, bp->tx_ring_dma);
314 bp->tx_ring = NULL;
315 - bp->flags &= ~B44_FLAG_TX_RING_HACK;
316 }
317 }
318
319 @@ -1184,67 +1105,25 @@
320 int size;
321
322 size = B44_RX_RING_SIZE * sizeof(struct ring_info);
323 - bp->rx_buffers = kzalloc(size, GFP_KERNEL);
324 + bp->rx_buffers = kmalloc(size, GFP_KERNEL);
325 if (!bp->rx_buffers)
326 goto out_err;
327 + memset(bp->rx_buffers, 0, size);
328
329 size = B44_TX_RING_SIZE * sizeof(struct ring_info);
330 - bp->tx_buffers = kzalloc(size, GFP_KERNEL);
331 + bp->tx_buffers = kmalloc(size, GFP_KERNEL);
332 if (!bp->tx_buffers)
333 goto out_err;
334 + memset(bp->tx_buffers, 0, size);
335
336 size = DMA_TABLE_BYTES;
337 bp->rx_ring = pci_alloc_consistent(bp->pdev, size, &bp->rx_ring_dma);
338 - if (!bp->rx_ring) {
339 - /* Allocation may have failed due to pci_alloc_consistent
340 - insisting on use of GFP_DMA, which is more restrictive
341 - than necessary... */
342 - struct dma_desc *rx_ring;
343 - dma_addr_t rx_ring_dma;
344 -
345 - rx_ring = kzalloc(size, GFP_KERNEL);
346 - if (!rx_ring)
347 - goto out_err;
348 -
349 - rx_ring_dma = dma_map_single(&bp->pdev->dev, rx_ring,
350 - DMA_TABLE_BYTES,
351 - DMA_BIDIRECTIONAL);
352 -
353 - if (rx_ring_dma + size > B44_DMA_MASK) {
354 - kfree(rx_ring);
355 - goto out_err;
356 - }
357 -
358 - bp->rx_ring = rx_ring;
359 - bp->rx_ring_dma = rx_ring_dma;
360 - bp->flags |= B44_FLAG_RX_RING_HACK;
361 - }
362 + if (!bp->rx_ring)
363 + goto out_err;
364
365 bp->tx_ring = pci_alloc_consistent(bp->pdev, size, &bp->tx_ring_dma);
366 - if (!bp->tx_ring) {
367 - /* Allocation may have failed due to pci_alloc_consistent
368 - insisting on use of GFP_DMA, which is more restrictive
369 - than necessary... */
370 - struct dma_desc *tx_ring;
371 - dma_addr_t tx_ring_dma;
372 -
373 - tx_ring = kzalloc(size, GFP_KERNEL);
374 - if (!tx_ring)
375 - goto out_err;
376 -
377 - tx_ring_dma = dma_map_single(&bp->pdev->dev, tx_ring,
378 - DMA_TABLE_BYTES,
379 - DMA_TO_DEVICE);
380 -
381 - if (tx_ring_dma + size > B44_DMA_MASK) {
382 - kfree(tx_ring);
383 - goto out_err;
384 - }
385 -
386 - bp->tx_ring = tx_ring;
387 - bp->tx_ring_dma = tx_ring_dma;
388 - bp->flags |= B44_FLAG_TX_RING_HACK;
389 - }
390 + if (!bp->tx_ring)
391 + goto out_err;
392
393 return 0;
394
395 @@ -1394,21 +1273,19 @@
396
397 err = b44_alloc_consistent(bp);
398 if (err)
399 - goto out;
400 + return err;
401 +
402 + err = request_irq(dev->irq, b44_interrupt, SA_SHIRQ, dev->name, dev);
403 + if (err)
404 + goto err_out_free;
405 +
406 + spin_lock_irq(&bp->lock);
407
408 b44_init_rings(bp);
409 b44_init_hw(bp);
410 + bp->flags |= B44_FLAG_INIT_COMPLETE;
411
412 - netif_carrier_off(dev);
413 - b44_check_phy(bp);
414 -
415 - err = request_irq(dev->irq, b44_interrupt, SA_SHIRQ, dev->name, dev);
416 - if (unlikely(err < 0)) {
417 - b44_chip_reset(bp);
418 - b44_free_rings(bp);
419 - b44_free_consistent(bp);
420 - goto out;
421 - }
422 + spin_unlock_irq(&bp->lock);
423
424 init_timer(&bp->timer);
425 bp->timer.expires = jiffies + HZ;
426 @@ -1417,8 +1294,11 @@
427 add_timer(&bp->timer);
428
429 b44_enable_ints(bp);
430 - netif_start_queue(dev);
431 -out:
432 +
433 + return 0;
434 +
435 +err_out_free:
436 + b44_free_consistent(bp);
437 return err;
438 }
439
440 @@ -1453,8 +1333,6 @@
441
442 netif_stop_queue(dev);
443
444 - netif_poll_disable(dev);
445 -
446 del_timer_sync(&bp->timer);
447
448 spin_lock_irq(&bp->lock);
449 @@ -1464,14 +1342,13 @@
450 #endif
451 b44_halt(bp);
452 b44_free_rings(bp);
453 + bp->flags &= ~B44_FLAG_INIT_COMPLETE;
454 netif_carrier_off(bp->dev);
455
456 spin_unlock_irq(&bp->lock);
457
458 free_irq(dev->irq, dev);
459
460 - netif_poll_enable(dev);
461 -
462 b44_free_consistent(bp);
463
464 return 0;
465 @@ -1536,6 +1413,8 @@
466 {
467 struct b44 *bp = netdev_priv(dev);
468 u32 val;
469 + int i=0;
470 + unsigned char zero[6] = {0,0,0,0,0,0};
471
472 val = br32(bp, B44_RXCONFIG);
473 val &= ~(RXCONFIG_PROMISC | RXCONFIG_ALLMULTI);
474 @@ -1543,17 +1422,14 @@
475 val |= RXCONFIG_PROMISC;
476 bw32(bp, B44_RXCONFIG, val);
477 } else {
478 - unsigned char zero[6] = {0, 0, 0, 0, 0, 0};
479 - int i = 0;
480 -
481 __b44_set_mac_addr(bp);
482
483 if (dev->flags & IFF_ALLMULTI)
484 val |= RXCONFIG_ALLMULTI;
485 else
486 - i = __b44_load_mcast(bp, dev);
487 + i=__b44_load_mcast(bp, dev);
488
489 - for (; i < 64; i++) {
490 + for(;i<64;i++) {
491 __b44_cam_write(bp, zero, i);
492 }
493 bw32(bp, B44_RXCONFIG, val);
494 @@ -1617,7 +1493,7 @@
495 {
496 struct b44 *bp = netdev_priv(dev);
497
498 - if (!netif_running(dev))
499 + if (!(bp->flags & B44_FLAG_INIT_COMPLETE))
500 return -EAGAIN;
501 cmd->supported = (SUPPORTED_Autoneg);
502 cmd->supported |= (SUPPORTED_100baseT_Half |
503 @@ -1628,14 +1504,14 @@
504
505 cmd->advertising = 0;
506 if (bp->flags & B44_FLAG_ADV_10HALF)
507 - cmd->advertising |= ADVERTISED_10baseT_Half;
508 + cmd->advertising |= ADVERTISE_10HALF;
509 if (bp->flags & B44_FLAG_ADV_10FULL)
510 - cmd->advertising |= ADVERTISED_10baseT_Full;
511 + cmd->advertising |= ADVERTISE_10FULL;
512 if (bp->flags & B44_FLAG_ADV_100HALF)
513 - cmd->advertising |= ADVERTISED_100baseT_Half;
514 + cmd->advertising |= ADVERTISE_100HALF;
515 if (bp->flags & B44_FLAG_ADV_100FULL)
516 - cmd->advertising |= ADVERTISED_100baseT_Full;
517 - cmd->advertising |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
518 + cmd->advertising |= ADVERTISE_100FULL;
519 + cmd->advertising |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
520 cmd->speed = (bp->flags & B44_FLAG_100_BASE_T) ?
521 SPEED_100 : SPEED_10;
522 cmd->duplex = (bp->flags & B44_FLAG_FULL_DUPLEX) ?
523 @@ -1655,7 +1531,7 @@
524 {
525 struct b44 *bp = netdev_priv(dev);
526
527 - if (!netif_running(dev))
528 + if (!(bp->flags & B44_FLAG_INIT_COMPLETE))
529 return -EAGAIN;
530
531 /* We do not support gigabit. */
532 @@ -1785,37 +1661,6 @@
533 return 0;
534 }
535
536 -static void b44_get_strings(struct net_device *dev, u32 stringset, u8 *data)
537 -{
538 - switch(stringset) {
539 - case ETH_SS_STATS:
540 - memcpy(data, *b44_gstrings, sizeof(b44_gstrings));
541 - break;
542 - }
543 -}
544 -
545 -static int b44_get_stats_count(struct net_device *dev)
546 -{
547 - return ARRAY_SIZE(b44_gstrings);
548 -}
549 -
550 -static void b44_get_ethtool_stats(struct net_device *dev,
551 - struct ethtool_stats *stats, u64 *data)
552 -{
553 - struct b44 *bp = netdev_priv(dev);
554 - u32 *val = &bp->hw_stats.tx_good_octets;
555 - u32 i;
556 -
557 - spin_lock_irq(&bp->lock);
558 -
559 - b44_stats_update(bp);
560 -
561 - for (i = 0; i < ARRAY_SIZE(b44_gstrings); i++)
562 - *data++ = *val++;
563 -
564 - spin_unlock_irq(&bp->lock);
565 -}
566 -
567 static struct ethtool_ops b44_ethtool_ops = {
568 .get_drvinfo = b44_get_drvinfo,
569 .get_settings = b44_get_settings,
570 @@ -1828,25 +1673,18 @@
571 .set_pauseparam = b44_set_pauseparam,
572 .get_msglevel = b44_get_msglevel,
573 .set_msglevel = b44_set_msglevel,
574 - .get_strings = b44_get_strings,
575 - .get_stats_count = b44_get_stats_count,
576 - .get_ethtool_stats = b44_get_ethtool_stats,
577 - .get_perm_addr = ethtool_op_get_perm_addr,
578 };
579
580 static int b44_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
581 {
582 struct mii_ioctl_data *data = if_mii(ifr);
583 struct b44 *bp = netdev_priv(dev);
584 - int err = -EINVAL;
585 -
586 - if (!netif_running(dev))
587 - goto out;
588 + int err;
589
590 spin_lock_irq(&bp->lock);
591 err = generic_mii_ioctl(&bp->mii_if, data, cmd, NULL);
592 spin_unlock_irq(&bp->lock);
593 -out:
594 +
595 return err;
596 }
597
598 @@ -1877,7 +1715,6 @@
599 bp->dev->dev_addr[3] = eeprom[80];
600 bp->dev->dev_addr[4] = eeprom[83];
601 bp->dev->dev_addr[5] = eeprom[82];
602 - memcpy(bp->dev->perm_addr, bp->dev->dev_addr, bp->dev->addr_len);
603
604 bp->phy_addr = eeprom[90] & 0x1f;
605
606 @@ -1942,9 +1779,9 @@
607
608 err = pci_set_consistent_dma_mask(pdev, (u64) B44_DMA_MASK);
609 if (err) {
610 - printk(KERN_ERR PFX "No usable DMA configuration, "
611 - "aborting.\n");
612 - goto err_out_free_res;
613 + printk(KERN_ERR PFX "No usable DMA configuration, "
614 + "aborting.\n");
615 + goto err_out_free_res;
616 }
617
618 b44reg_base = pci_resource_start(pdev, 0);
619 @@ -1966,8 +1803,10 @@
620 bp = netdev_priv(dev);
621 bp->pdev = pdev;
622 bp->dev = dev;
623 -
624 - bp->msg_enable = netif_msg_init(b44_debug, B44_DEF_MSG_ENABLE);
625 + if (b44_debug >= 0)
626 + bp->msg_enable = (1 << b44_debug) - 1;
627 + else
628 + bp->msg_enable = B44_DEF_MSG_ENABLE;
629
630 spin_lock_init(&bp->lock);
631
632 @@ -2057,14 +1896,17 @@
633 static void __devexit b44_remove_one(struct pci_dev *pdev)
634 {
635 struct net_device *dev = pci_get_drvdata(pdev);
636 - struct b44 *bp = netdev_priv(dev);
637
638 - unregister_netdev(dev);
639 - iounmap(bp->regs);
640 - free_netdev(dev);
641 - pci_release_regions(pdev);
642 - pci_disable_device(pdev);
643 - pci_set_drvdata(pdev, NULL);
644 + if (dev) {
645 + struct b44 *bp = netdev_priv(dev);
646 +
647 + unregister_netdev(dev);
648 + iounmap(bp->regs);
649 + free_netdev(dev);
650 + pci_release_regions(pdev);
651 + pci_disable_device(pdev);
652 + pci_set_drvdata(pdev, NULL);
653 + }
654 }
655
656 static int b44_suspend(struct pci_dev *pdev, pm_message_t state)
657 @@ -2085,9 +1927,6 @@
658 b44_free_rings(bp);
659
660 spin_unlock_irq(&bp->lock);
661 -
662 - free_irq(dev->irq, dev);
663 - pci_disable_device(pdev);
664 return 0;
665 }
666
667 @@ -2097,15 +1936,10 @@
668 struct b44 *bp = netdev_priv(dev);
669
670 pci_restore_state(pdev);
671 - pci_enable_device(pdev);
672 - pci_set_master(pdev);
673
674 if (!netif_running(dev))
675 return 0;
676
677 - if (request_irq(dev->irq, b44_interrupt, SA_SHIRQ, dev->name, dev))
678 - printk(KERN_ERR PFX "%s: request_irq failed\n", dev->name);
679 -
680 spin_lock_irq(&bp->lock);
681
682 b44_init_rings(bp);
683 @@ -2117,7 +1951,6 @@
684 add_timer(&bp->timer);
685
686 b44_enable_ints(bp);
687 - netif_wake_queue(dev);
688 return 0;
689 }
690
691 @@ -2132,12 +1965,6 @@
692
693 static int __init b44_init(void)
694 {
695 - unsigned int dma_desc_align_size = dma_get_cache_alignment();
696 -
697 - /* Setup paramaters for syncing RX/TX DMA descriptors */
698 - dma_desc_align_mask = ~(dma_desc_align_size - 1);
699 - dma_desc_sync_size = max(dma_desc_align_size, sizeof(struct dma_desc));
700 -
701 return pci_module_init(&b44_driver);
702 }
703
704 diff -ur linux-2.6.15-rc5/drivers/net/b44.h linux-2.6.15-rc5-openwrt/drivers/net/b44.h
705 --- linux-2.6.15-rc5/drivers/net/b44.h 2005-12-04 06:10:42.000000000 +0100
706 +++ linux-2.6.15-rc5-openwrt/drivers/net/b44.h 2005-08-15 02:20:18.000000000 +0200
707 @@ -346,63 +346,29 @@
708
709 #define B44_MCAST_TABLE_SIZE 32
710
711 -#define B44_STAT_REG_DECLARE \
712 - _B44(tx_good_octets) \
713 - _B44(tx_good_pkts) \
714 - _B44(tx_octets) \
715 - _B44(tx_pkts) \
716 - _B44(tx_broadcast_pkts) \
717 - _B44(tx_multicast_pkts) \
718 - _B44(tx_len_64) \
719 - _B44(tx_len_65_to_127) \
720 - _B44(tx_len_128_to_255) \
721 - _B44(tx_len_256_to_511) \
722 - _B44(tx_len_512_to_1023) \
723 - _B44(tx_len_1024_to_max) \
724 - _B44(tx_jabber_pkts) \
725 - _B44(tx_oversize_pkts) \
726 - _B44(tx_fragment_pkts) \
727 - _B44(tx_underruns) \
728 - _B44(tx_total_cols) \
729 - _B44(tx_single_cols) \
730 - _B44(tx_multiple_cols) \
731 - _B44(tx_excessive_cols) \
732 - _B44(tx_late_cols) \
733 - _B44(tx_defered) \
734 - _B44(tx_carrier_lost) \
735 - _B44(tx_pause_pkts) \
736 - _B44(rx_good_octets) \
737 - _B44(rx_good_pkts) \
738 - _B44(rx_octets) \
739 - _B44(rx_pkts) \
740 - _B44(rx_broadcast_pkts) \
741 - _B44(rx_multicast_pkts) \
742 - _B44(rx_len_64) \
743 - _B44(rx_len_65_to_127) \
744 - _B44(rx_len_128_to_255) \
745 - _B44(rx_len_256_to_511) \
746 - _B44(rx_len_512_to_1023) \
747 - _B44(rx_len_1024_to_max) \
748 - _B44(rx_jabber_pkts) \
749 - _B44(rx_oversize_pkts) \
750 - _B44(rx_fragment_pkts) \
751 - _B44(rx_missed_pkts) \
752 - _B44(rx_crc_align_errs) \
753 - _B44(rx_undersize) \
754 - _B44(rx_crc_errs) \
755 - _B44(rx_align_errs) \
756 - _B44(rx_symbol_errs) \
757 - _B44(rx_pause_pkts) \
758 - _B44(rx_nonpause_pkts)
759 -
760 /* SW copy of device statistics, kept up to date by periodic timer
761 - * which probes HW values. Check b44_stats_update if you mess with
762 - * the layout
763 + * which probes HW values. Must have same relative layout as HW
764 + * register above, because b44_stats_update depends upon this.
765 */
766 struct b44_hw_stats {
767 -#define _B44(x) u32 x;
768 -B44_STAT_REG_DECLARE
769 -#undef _B44
770 + u32 tx_good_octets, tx_good_pkts, tx_octets;
771 + u32 tx_pkts, tx_broadcast_pkts, tx_multicast_pkts;
772 + u32 tx_len_64, tx_len_65_to_127, tx_len_128_to_255;
773 + u32 tx_len_256_to_511, tx_len_512_to_1023, tx_len_1024_to_max;
774 + u32 tx_jabber_pkts, tx_oversize_pkts, tx_fragment_pkts;
775 + u32 tx_underruns, tx_total_cols, tx_single_cols;
776 + u32 tx_multiple_cols, tx_excessive_cols, tx_late_cols;
777 + u32 tx_defered, tx_carrier_lost, tx_pause_pkts;
778 + u32 __pad1[8];
779 +
780 + u32 rx_good_octets, rx_good_pkts, rx_octets;
781 + u32 rx_pkts, rx_broadcast_pkts, rx_multicast_pkts;
782 + u32 rx_len_64, rx_len_65_to_127, rx_len_128_to_255;
783 + u32 rx_len_256_to_511, rx_len_512_to_1023, rx_len_1024_to_max;
784 + u32 rx_jabber_pkts, rx_oversize_pkts, rx_fragment_pkts;
785 + u32 rx_missed_pkts, rx_crc_align_errs, rx_undersize;
786 + u32 rx_crc_errs, rx_align_errs, rx_symbol_errs;
787 + u32 rx_pause_pkts, rx_nonpause_pkts;
788 };
789
790 struct b44 {
791 @@ -420,6 +386,7 @@
792
793 u32 dma_offset;
794 u32 flags;
795 +#define B44_FLAG_INIT_COMPLETE 0x00000001
796 #define B44_FLAG_BUGGY_TXPTR 0x00000002
797 #define B44_FLAG_REORDER_BUG 0x00000004
798 #define B44_FLAG_PAUSE_AUTO 0x00008000
799 @@ -433,8 +400,6 @@
800 #define B44_FLAG_ADV_100HALF 0x04000000
801 #define B44_FLAG_ADV_100FULL 0x08000000
802 #define B44_FLAG_INTERNAL_PHY 0x10000000
803 -#define B44_FLAG_RX_RING_HACK 0x20000000
804 -#define B44_FLAG_TX_RING_HACK 0x40000000
805
806 u32 rx_offset;
807
Staging tree of Mathias Kresin