ath79: update WA/XC devices UBNT_VERSION to 8.7.4
[openwrt/staging/wigyori.git] / package / boot / uboot-lantiq / patches / 0006-sf-add-support-for-4-byte-addressing.patch
1 From 3af3addee645bd81537be1ddee49969f8dfc64ee Mon Sep 17 00:00:00 2001
2 From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 Date: Sun, 13 Oct 2013 15:24:56 +0200
4 Subject: sf: add support for 4-byte addressing
5
6 Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
7
8 --- a/drivers/mtd/spi/sf_internal.h
9 +++ b/drivers/mtd/spi/sf_internal.h
10 @@ -38,12 +38,14 @@
11 #define CMD_READ_ID 0x9f
12
13 /* Bank addr access commands */
14 -#ifdef CONFIG_SPI_FLASH_BAR
15 -# define CMD_BANKADDR_BRWR 0x17
16 -# define CMD_BANKADDR_BRRD 0x16
17 -# define CMD_EXTNADDR_WREAR 0xC5
18 -# define CMD_EXTNADDR_RDEAR 0xC8
19 -#endif
20 +#define CMD_BANKADDR_BRWR 0x17
21 +#define CMD_BANKADDR_BRRD 0x16
22 +#define CMD_EXTNADDR_WREAR 0xC5
23 +#define CMD_EXTNADDR_RDEAR 0xC8
24 +
25 +/* Macronix style 4-byte addressing */
26 +#define CMD_EN4B 0xb7
27 +#define CMD_EX4B 0xe9
28
29 /* Common status */
30 #define STATUS_WIP 0x01
31 --- a/drivers/mtd/spi/sf_ops.c
32 +++ b/drivers/mtd/spi/sf_ops.c
33 @@ -21,6 +21,7 @@ static void spi_flash_addr(const struct
34 cmd[1] = addr >> (flash->addr_width * 8 - 8);
35 cmd[2] = addr >> (flash->addr_width * 8 - 16);
36 cmd[3] = addr >> (flash->addr_width * 8 - 24);
37 + cmd[4] = addr >> (flash->addr_width * 8 - 32);
38 }
39
40 static int spi_flash_cmdsz(const struct spi_flash *flash)
41 @@ -163,7 +164,7 @@ int spi_flash_write_common(struct spi_fl
42 int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
43 {
44 u32 erase_size;
45 - u8 cmd[4], cmd_len;
46 + u8 cmd[5], cmd_len;
47 int ret = -1;
48
49 erase_size = flash->erase_size;
50 @@ -188,8 +189,8 @@ int spi_flash_cmd_erase_ops(struct spi_f
51 spi_flash_addr(flash, offset, cmd);
52 cmd_len = spi_flash_cmdsz(flash);
53
54 - debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
55 - cmd[2], cmd[3], offset);
56 + debug("SF: erase %2x %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
57 + cmd[2], cmd[3], cmd[4], offset);
58
59 ret = spi_flash_write_common(flash, cmd, cmd_len, NULL, 0);
60 if (ret < 0) {
61 @@ -212,7 +213,7 @@ int spi_flash_cmd_write_ops(struct spi_f
62 {
63 unsigned long byte_addr, page_size;
64 size_t chunk_len, actual;
65 - u8 cmd[4], cmd_len;
66 + u8 cmd[5], cmd_len;
67 int ret = -1;
68
69 ret = spi_claim_bus(flash->spi);
70 @@ -239,8 +240,8 @@ int spi_flash_cmd_write_ops(struct spi_f
71 spi_flash_addr(flash, offset, cmd);
72 cmd_len = spi_flash_cmdsz(flash);
73
74 - debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
75 - buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
76 + debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x%02x } chunk_len = %zu\n",
77 + buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4], chunk_len);
78
79 ret = spi_flash_write_common(flash, cmd, cmd_len,
80 buf + actual, chunk_len);
81 @@ -276,9 +277,13 @@ int spi_flash_read_common(struct spi_fla
82 int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
83 size_t len, void *data)
84 {
85 - u8 cmd[5], cmd_len, bank_sel = 0;
86 - u32 remain_len, read_len;
87 + u8 cmd[6], cmd_len;
88 + u32 read_len;
89 int ret = -1;
90 +#ifdef CONFIG_SPI_FLASH_BAR
91 + u8 bank_sel = 0;
92 + u32 remain_len;
93 +#endif
94
95 ret = spi_claim_bus(flash->spi);
96 if (ret) {
97 @@ -305,12 +310,15 @@ int spi_flash_cmd_read_ops(struct spi_fl
98 debug("SF: fail to set bank%d\n", bank_sel);
99 goto done;
100 }
101 -#endif
102 +
103 remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1)) - offset;
104 if (len < remain_len)
105 read_len = len;
106 else
107 read_len = remain_len;
108 +#else
109 + read_len = len;
110 +#endif
111
112 spi_flash_addr(flash, offset, cmd);
113 cmd_len = spi_flash_cmdsz(flash);
114 --- a/drivers/mtd/spi/sf_probe.c
115 +++ b/drivers/mtd/spi/sf_probe.c
116 @@ -153,6 +153,25 @@ static const struct spi_flash_params spi
117 */
118 };
119
120 +int spi_flash_4byte_set(struct spi_flash *flash, u8 idcode0, int enable)
121 +{
122 + u8 cmd, bankaddr;
123 +
124 + switch (idcode0) {
125 + case 0xc2:
126 + case 0xef:
127 + case 0x1c:
128 + /* Macronix style */
129 + cmd = enable ? CMD_EN4B : CMD_EX4B;
130 + return spi_flash_cmd(flash->spi, cmd, NULL, 0);
131 + default:
132 + /* Spansion style */
133 + cmd = CMD_BANKADDR_BRWR;
134 + bankaddr = enable << 7;
135 + return spi_flash_cmd_write(flash->spi, &cmd, 1, &bankaddr, 1);
136 + }
137 +}
138 +
139 static int spi_flash_validate_params(struct spi_flash *flash,
140 u8 *idcode)
141 {
142 @@ -218,8 +237,18 @@ static int spi_flash_validate_params(str
143 flash->poll_cmd = CMD_FLAG_STATUS;
144 #endif
145
146 +#ifndef CONFIG_SPI_FLASH_BAR
147 + /* enable 4-byte addressing if the device exceeds 16MiB */
148 + if (flash->size > SPI_FLASH_16MB_BOUN) {
149 + flash->addr_width = 4;
150 + spi_flash_4byte_set(flash, idcode[0], 1);
151 + } else {
152 + flash->addr_width = 3;
153 + }
154 +#else
155 /* Configure default 3-byte addressing */
156 flash->addr_width = 3;
157 +#endif
158
159 /* Configure the BAR - discover bank cmds and read current bank */
160 #ifdef CONFIG_SPI_FLASH_BAR