package/boot/uboot-mediatek/patches/436-add-glinet-mt6000.patch

   1 --- /dev/null
   2 +++ b/arch/arm/dts/mt7986a-glinet-gl-mt6000.dts
   3 @@ -0,0 +1,135 @@
   4 +// SPDX-License-Identifier: GPL-2.0
   5 +
   6 +/dts-v1/;
   7 +#include <dt-bindings/input/linux-event-codes.h>
   8 +#include <dt-bindings/gpio/gpio.h>
   9 +
  10 +#include "mt7986.dtsi"
  11 +
  12 +/ {
  13 +       model = "GL.iNet GL-MT6000";
  14 +       compatible = "glinet,gl-mt6000", "mediatek,mt7986-emmc-rfb", "mediatek,mt7986";
  15 +
  16 +       chosen {
  17 +               stdout-path = &uart0;
  18 +               tick-timer = &timer0;
  19 +       };
  20 +
  21 +       memory@40000000 {
  22 +               device_type = "memory";
  23 +               reg = <0x40000000 0x40000000>;
  24 +       };
  25 +
  26 +    reg_1p8v: regulator-1p8v {
  27 +               compatible = "regulator-fixed";
  28 +               regulator-name = "fixed-1.8V";
  29 +               regulator-min-microvolt = <1800000>;
  30 +               regulator-max-microvolt = <1800000>;
  31 +               regulator-boot-on;
  32 +               regulator-always-on;
  33 +       };
  34 +
  35 +       reg_3p3v: regulator-3p3v {
  36 +               compatible = "regulator-fixed";
  37 +               regulator-name = "fixed-3.3V";
  38 +               regulator-min-microvolt = <3300000>;
  39 +               regulator-max-microvolt = <3300000>;
  40 +               regulator-boot-on;
  41 +               regulator-always-on;
  42 +       };
  43 +
  44 +       keys {
  45 +               compatible = "gpio-keys";
  46 +
  47 +               wps {
  48 +                       label = "reset";
  49 +                       gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
  50 +                       linux,code = <KEY_RESTART>;
  51 +               };
  52 +       };
  53 +
  54 +       leds {
  55 +               compatible = "gpio-leds";
  56 +
  57 +               led_status_blue: green {
  58 +                       label = "blue:status";
  59 +                       gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
  60 +               };
  61 +
  62 +               led_status_white: blue {
  63 +                       label = "white:status";
  64 +                       gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
  65 +               };
  66 +       };
  67 +
  68 +};
  69 +
  70 +&uart0 {
  71 +       mediatek,force-highspeed;
  72 +       status = "okay";
  73 +};
  74 +
  75 +&eth {
  76 +       status = "okay";
  77 +       mediatek,gmac-id = <0>;
  78 +       phy-mode = "2500base-x";
  79 +       mediatek,switch = "mt7531";
  80 +       reset-gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
  81 +
  82 +       fixed-link {
  83 +               speed = <2500>;
  84 +               full-duplex;
  85 +       };
  86 +};
  87 +
  88 +&pinctrl {
  89 +       mmc0_pins_default: mmc0default {
  90 +               mux {
  91 +                       function = "flash";
  92 +                       groups =  "emmc_51";
  93 +               };
  94 +
  95 +               conf-cmd-dat {
  96 +                       pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
  97 +                              "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
  98 +                              "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
  99 +                       input-enable;
 100 +                       drive-strength = <MTK_DRIVE_4mA>;
 101 +                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 102 +               };
 103 +
 104 +               conf-clk {
 105 +                       pins = "EMMC_CK";
 106 +                       drive-strength = <MTK_DRIVE_6mA>;
 107 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 108 +               };
 109 +
 110 +               conf-dsl {
 111 +                       pins = "EMMC_DSL";
 112 +                       bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 113 +               };
 114 +
 115 +               conf-rst {
 116 +                       pins = "EMMC_RSTB";
 117 +                       drive-strength = <MTK_DRIVE_4mA>;
 118 +                       bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 119 +               };
 120 +       };
 121 +};
 122 +
 123 +&mmc0 {
 124 +       pinctrl-names = "default";
 125 +       pinctrl-0 = <&mmc0_pins_default>;
 126 +       bus-width = <8>;
 127 +       max-frequency = <200000000>;
 128 +       cap-mmc-highspeed;
 129 +       cap-mmc-hw-reset;
 130 +       vmmc-supply = <&reg_3p3v>;
 131 +       vqmmc-supply = <&reg_1p8v>;
 132 +       non-removable;
 133 +       status = "okay";
 134 +};
 135 +
 136 +&wmcpu_emi {
 137 +       status = "disabled";
 138 +};
 139 --- /dev/null
 140 +++ b/configs/mt7986a_glinet_gl-mt6000_defconfig
 141 @@ -0,0 +1,105 @@
 142 +CONFIG_ARM=y
 143 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 144 +CONFIG_POSITION_INDEPENDENT=y
 145 +CONFIG_ARCH_MEDIATEK=y
 146 +CONFIG_TEXT_BASE=0x41e00000
 147 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 148 +CONFIG_NR_DRAM_BANKS=1
 149 +CONFIG_ENV_SIZE=0x80000
 150 +CONFIG_ENV_OFFSET=0x400000
 151 +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-glinet-gl-mt6000"
 152 +CONFIG_SYS_PROMPT="MT7986> "
 153 +CONFIG_OF_LIBFDT_OVERLAY=y
 154 +CONFIG_TARGET_MT7986=y
 155 +CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
 156 +CONFIG_DEBUG_UART_BASE=0x11002000
 157 +CONFIG_DEBUG_UART_CLOCK=40000000
 158 +CONFIG_SYS_LOAD_ADDR=0x46000000
 159 +CONFIG_DEBUG_UART=y
 160 +CONFIG_AHCI=y
 161 +CONFIG_FIT=y
 162 +CONFIG_AUTOBOOT_KEYED=y
 163 +CONFIG_AUTOBOOT_MENU_SHOW=y
 164 +CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-glinet-gl-mt6000.dtb"
 165 +CONFIG_LOGLEVEL=7
 166 +CONFIG_PRE_CONSOLE_BUFFER=y
 167 +CONFIG_LOG=y
 168 +CONFIG_BOARD_LATE_INIT=y
 169 +CONFIG_HUSH_PARSER=y
 170 +CONFIG_CMD_CPU=y
 171 +CONFIG_CMD_LICENSE=y
 172 +CONFIG_CMD_BOOTMENU=y
 173 +CONFIG_CMD_ASKENV=y
 174 +CONFIG_CMD_ERASEENV=y
 175 +CONFIG_CMD_ENV_FLAGS=y
 176 +CONFIG_CMD_STRINGS=y
 177 +CONFIG_CMD_DM=y
 178 +CONFIG_CMD_GPIO=y
 179 +CONFIG_CMD_PWM=y
 180 +CONFIG_CMD_GPT=y
 181 +CONFIG_CMD_MMC=y
 182 +CONFIG_CMD_PART=y
 183 +CONFIG_CMD_USB=y
 184 +CONFIG_CMD_DHCP=y
 185 +CONFIG_CMD_TFTPSRV=y
 186 +CONFIG_CMD_RARP=y
 187 +CONFIG_CMD_PING=y
 188 +CONFIG_CMD_CDP=y
 189 +CONFIG_CMD_SNTP=y
 190 +CONFIG_CMD_DNS=y
 191 +CONFIG_CMD_LINK_LOCAL=y
 192 +CONFIG_CMD_CACHE=y
 193 +CONFIG_CMD_PSTORE=y
 194 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 195 +CONFIG_CMD_UUID=y
 196 +CONFIG_CMD_HASH=y
 197 +CONFIG_CMD_SMC=y
 198 +CONFIG_OF_EMBED=y
 199 +CONFIG_ENV_OVERWRITE=y
 200 +CONFIG_ENV_IS_IN_MMC=y
 201 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 202 +CONFIG_USE_DEFAULT_ENV_FILE=y
 203 +CONFIG_DEFAULT_ENV_FILE="glinet_gl-mt6000_env"
 204 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 205 +CONFIG_VERSION_VARIABLE=y
 206 +CONFIG_NET_RANDOM_ETHADDR=y
 207 +CONFIG_NETCONSOLE=y
 208 +CONFIG_USE_IPADDR=y
 209 +CONFIG_IPADDR="192.168.1.1"
 210 +CONFIG_USE_SERVERIP=y
 211 +CONFIG_SERVERIP="192.168.1.254"
 212 +CONFIG_REGMAP=y
 213 +CONFIG_SYSCON=y
 214 +CONFIG_BUTTON=y
 215 +CONFIG_BUTTON_GPIO=y
 216 +CONFIG_CLK=y
 217 +CONFIG_GPIO_HOG=y
 218 +CONFIG_LED=y
 219 +CONFIG_LED_BLINK=y
 220 +CONFIG_LED_GPIO=y
 221 +CONFIG_SUPPORT_EMMC_BOOT=y
 222 +CONFIG_MMC_HS200_SUPPORT=y
 223 +CONFIG_MMC_MTK=y
 224 +CONFIG_PHY_FIXED=y
 225 +CONFIG_MEDIATEK_ETH=y
 226 +CONFIG_PHY=y
 227 +CONFIG_PHY_MTK_TPHY=y
 228 +CONFIG_PINCTRL=y
 229 +CONFIG_PINCONF=y
 230 +CONFIG_PINCTRL_MT7986=y
 231 +CONFIG_POWER_DOMAIN=y
 232 +CONFIG_MTK_POWER_DOMAIN=y
 233 +CONFIG_DM_REGULATOR=y
 234 +CONFIG_DM_REGULATOR_FIXED=y
 235 +CONFIG_DM_REGULATOR_GPIO=y
 236 +CONFIG_DM_PWM=y
 237 +CONFIG_PWM_MTK=y
 238 +CONFIG_RAM=y
 239 +CONFIG_DM_SERIAL=y
 240 +CONFIG_MTK_SERIAL=y
 241 +CONFIG_USB=y
 242 +CONFIG_USB_XHCI_HCD=y
 243 +CONFIG_USB_XHCI_MTK=y
 244 +CONFIG_USB_STORAGE=y
 245 +CONFIG_HEXDUMP=y
 246 +CONFIG_LMB_MAX_REGIONS=64
 247 --- /dev/null
 248 +++ b/glinet_gl-mt6000_env
 249 @@ -0,0 +1,25 @@
 250 +ipaddr=192.168.1.1
 251 +serverip=192.168.1.254
 252 +loadaddr=0x46000000
 253 +bootdelay=3
 254 +bootfile_bl2=openwrt-mediatek-filogic-glinet_gl-mt6000-preloader.bin
 255 +bootfile_fip=openwrt-mediatek-filogic-glinet_gl-mt6000-bl31-uboot.fip
 256 +bootfile_firmware=openwrt-mediatek-filogic-glinet_gl-mt6000-squashfs-factory.bin
 257 +bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
 258 +bootmenu_title=      *** U-Boot Boot Menu for GL-iNet GL-MT6000 ***
 259 +bootmenu_0=Startup system (Default).=run boot_system
 260 +bootmenu_1=Load Firmware via TFTP then write to eMMC.=run boot_tftp_firmware ; run bootmenu_confirm_return
 261 +bootmenu_2=Load BL31+U-Boot FIP via TFTP then write to eMMC.=run boot_tftp_write_fip ; run bootmenu_confirm_return
 262 +bootmenu_3=Load BL2 preloader via TFTP then write to eMMC.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
 263 +bootmenu_4=Reboot.=reset
 264 +bootmenu_5=Reset all settings to factory defaults.=run reset_factory ; reset
 265 +filesize_to_blk=setexpr cnt $filesize + 0x1ff && setexpr cnt $cnt / 0x200
 266 +mmc_read_kernel=mmc read $loadaddr $part_addr 0x100 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr $part_addr $image_size
 267 +boot_system=part start mmc 0 kernel part_addr && part size mmc 0 kernel part_size && run mmc_read_kernel && bootm
 268 +boot_tftp_firmware=tftpboot $loadaddr $bootfile_firmware && run emmc_write_firmware
 269 +boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run emmc_write_fip
 270 +boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run emmc_write_bl2
 271 +emmc_write_firmware=part start mmc 0 kernel part_addr && run filesize_to_blk && mmc write $loadaddr $part_addr $cnt
 272 +emmc_write_bl2=run filesize_to_blk && test 0x$cnt -le 0x800 && mmc partconf 0 1 1 1 &&  && mmc write $loadaddr 0x0 0x800 ; mmc partconf 0 1 1 0
 273 +emmc_write_fip=part start mmc 0 fip part_addr && part size mmc 0 fip part_size && run filesize_to_blk && test 0x$cnt -le 0x$part_size && mmc write $loadaddr $part_addr $cnt
 274 +reset_factory=eraseenv && reset