1 From 64d37d74519eb5d4dcff8e9164d18f524aa72c8d Mon Sep 17 00:00:00 2001
2 From: David Bauer <mail@david-bauer.net>
3 Date: Fri, 10 Jul 2020 14:58:30 +0200
4 Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S
6 This adds support for the NanoPi R2S from FriendlyArm.
10 Gigabit Ethernet (WAN)
11 Gigabit Ethernet (USB3) (LAN)
17 Signed-off-by: David Bauer <mail@david-bauer.net>
19 arch/arm/dts/Makefile | 1 +
20 arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 40 +++
21 arch/arm/dts/rk3328-nanopi-r2s.dts | 387 +++++++++++++++++++++
22 board/rockchip/evb_rk3328/MAINTAINERS | 7 +
23 configs/nanopi-r2s-rk3328_defconfig | 99 ++++++
24 5 files changed, 534 insertions(+)
25 create mode 100644 arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
26 create mode 100644 arch/arm/dts/rk3328-nanopi-r2s.dts
27 create mode 100644 configs/nanopi-r2s-rk3328_defconfig
29 --- a/arch/arm/dts/Makefile
30 +++ b/arch/arm/dts/Makefile
31 @@ -106,6 +106,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
33 dtb-$(CONFIG_ROCKCHIP_RK3328) += \
35 + rk3328-nanopi-r2s.dtb \
40 +++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
42 +// SPDX-License-Identifier: GPL-2.0+
44 + * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
45 + * (C) Copyright 2020 David Bauer
48 +#include "rk3328-u-boot.dtsi"
49 +#include "rk3328-sdram-ddr4-666.dtsi"
52 + u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
72 +/* Need this and all the pinctrl/gpio stuff above to set pinmux */
78 + snps,reset-active-low;
79 + snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
80 + snps,reset-delays-us = <0 10000 50000>;
83 +++ b/arch/arm/dts/rk3328-nanopi-r2s.dts
85 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
87 + * Copyright (c) 2020 David Bauer <mail@david-bauer.net>
92 +#include <dt-bindings/input/input.h>
93 +#include <dt-bindings/gpio/gpio.h>
94 +#include "rk3328.dtsi"
97 + model = "FriendlyElec NanoPi R2S";
98 + compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
101 + stdout-path = "serial2:1500000n8";
104 + gmac_clk: gmac-clock {
105 + compatible = "fixed-clock";
106 + clock-frequency = <125000000>;
107 + clock-output-names = "gmac_clk";
108 + #clock-cells = <0>;
112 + compatible = "gpio-keys";
113 + pinctrl-0 = <&reset_button_pin>;
114 + pinctrl-names = "default";
118 + gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
119 + linux,code = <KEY_RESTART>;
120 + debounce-interval = <50>;
124 + vcc_rtl8153: vcc-rtl8153-regulator {
125 + compatible = "regulator-fixed";
126 + gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
127 + pinctrl-names = "default";
128 + pinctrl-0 = <&rtl8153_en_drv>;
129 + regulator-always-on;
130 + regulator-name = "vcc_rtl8153";
131 + regulator-min-microvolt = <5000000>;
132 + regulator-max-microvolt = <5000000>;
133 + enable-active-high;
137 + compatible = "gpio-leds";
138 + pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>;
139 + pinctrl-names = "default";
142 + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
143 + label = "nanopi-r2s:green:lan";
147 + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
148 + label = "nanopi-r2s:red:sys";
152 + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>;
153 + label = "nanopi-r2s:green:wan";
157 + vcc_io_sdio: sdmmcio-regulator {
158 + compatible = "regulator-gpio";
159 + enable-active-high;
160 + gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
161 + pinctrl-0 = <&sdio_vcc_pin>;
162 + pinctrl-names = "default";
163 + regulator-name = "vcc_io_sdio";
164 + regulator-always-on;
165 + regulator-min-microvolt = <1800000>;
166 + regulator-max-microvolt = <3300000>;
167 + regulator-settling-time-us = <5000>;
168 + regulator-type = "voltage";
169 + startup-delay-us = <2000>;
170 + states = <1800000 0x1
172 + vin-supply = <&vcc_io_33>;
175 + vcc_sd: sdmmc-regulator {
176 + compatible = "regulator-fixed";
177 + gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
178 + pinctrl-0 = <&sdmmc0m1_gpio>;
179 + pinctrl-names = "default";
180 + regulator-name = "vcc_sd";
182 + regulator-min-microvolt = <3300000>;
183 + regulator-max-microvolt = <3300000>;
184 + vin-supply = <&vcc_io_33>;
188 + compatible = "regulator-fixed";
189 + regulator-name = "vdd_5v";
190 + regulator-always-on;
192 + regulator-min-microvolt = <5000000>;
193 + regulator-max-microvolt = <5000000>;
198 + cpu-supply = <&vdd_arm>;
202 + cpu-supply = <&vdd_arm>;
206 + cpu-supply = <&vdd_arm>;
210 + cpu-supply = <&vdd_arm>;
214 + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
215 + assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
216 + clock_in_out = "input";
217 + phy-handle = <&rtl8211e>;
218 + phy-mode = "rgmii";
219 + phy-supply = <&vcc_io_33>;
220 + pinctrl-0 = <&rgmiim1_pins>;
221 + pinctrl-names = "default";
228 + compatible = "snps,dwmac-mdio";
229 + #address-cells = <1>;
232 + rtl8211e: ethernet-phy@1 {
234 + pinctrl-0 = <ð_phy_reset_pin>;
235 + pinctrl-names = "default";
236 + reset-assert-us = <10000>;
237 + reset-deassert-us = <50000>;
238 + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
247 + compatible = "rockchip,rk805";
249 + interrupt-parent = <&gpio1>;
250 + interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
251 + #clock-cells = <1>;
252 + clock-output-names = "xin32k", "rk805-clkout2";
255 + pinctrl-0 = <&pmic_int_l>;
256 + pinctrl-names = "default";
257 + rockchip,system-power-controller;
260 + vcc1-supply = <&vdd_5v>;
261 + vcc2-supply = <&vdd_5v>;
262 + vcc3-supply = <&vdd_5v>;
263 + vcc4-supply = <&vdd_5v>;
264 + vcc5-supply = <&vcc_io_33>;
265 + vcc6-supply = <&vdd_5v>;
268 + vdd_log: DCDC_REG1 {
269 + regulator-name = "vdd_log";
270 + regulator-always-on;
272 + regulator-min-microvolt = <712500>;
273 + regulator-max-microvolt = <1450000>;
274 + regulator-ramp-delay = <12500>;
276 + regulator-state-mem {
277 + regulator-on-in-suspend;
278 + regulator-suspend-microvolt = <1000000>;
282 + vdd_arm: DCDC_REG2 {
283 + regulator-name = "vdd_arm";
284 + regulator-always-on;
286 + regulator-min-microvolt = <712500>;
287 + regulator-max-microvolt = <1450000>;
288 + regulator-ramp-delay = <12500>;
290 + regulator-state-mem {
291 + regulator-on-in-suspend;
292 + regulator-suspend-microvolt = <950000>;
296 + vcc_ddr: DCDC_REG3 {
297 + regulator-name = "vcc_ddr";
298 + regulator-always-on;
301 + regulator-state-mem {
302 + regulator-on-in-suspend;
306 + vcc_io_33: DCDC_REG4 {
307 + regulator-name = "vcc_io_33";
308 + regulator-always-on;
310 + regulator-min-microvolt = <3300000>;
311 + regulator-max-microvolt = <3300000>;
313 + regulator-state-mem {
314 + regulator-on-in-suspend;
315 + regulator-suspend-microvolt = <3300000>;
320 + regulator-name = "vcc_18";
321 + regulator-always-on;
323 + regulator-min-microvolt = <1800000>;
324 + regulator-max-microvolt = <1800000>;
326 + regulator-state-mem {
327 + regulator-on-in-suspend;
328 + regulator-suspend-microvolt = <1800000>;
332 + vcc18_emmc: LDO_REG2 {
333 + regulator-name = "vcc18_emmc";
334 + regulator-always-on;
336 + regulator-min-microvolt = <1800000>;
337 + regulator-max-microvolt = <1800000>;
339 + regulator-state-mem {
340 + regulator-on-in-suspend;
341 + regulator-suspend-microvolt = <1800000>;
346 + regulator-name = "vdd_10";
347 + regulator-always-on;
349 + regulator-min-microvolt = <1000000>;
350 + regulator-max-microvolt = <1000000>;
352 + regulator-state-mem {
353 + regulator-on-in-suspend;
354 + regulator-suspend-microvolt = <1000000>;
361 + rtl8153_en_drv: rtl8153-en-drv {
362 + rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
368 + pmuio-supply = <&vcc_io_33>;
369 + vccio1-supply = <&vcc_io_33>;
370 + vccio2-supply = <&vcc18_emmc>;
371 + vccio3-supply = <&vcc_io_sdio>;
372 + vccio4-supply = <&vcc_18>;
373 + vccio5-supply = <&vcc_io_33>;
374 + vccio6-supply = <&vcc_io_33>;
380 + reset_button_pin: reset-button-pin {
381 + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
386 + eth_phy_reset_pin: eth-phy-reset-pin {
387 + rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
392 + lan_led_pin: lan-led-pin {
393 + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
396 + sys_led_pin: sys-led-pin {
397 + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
400 + wan_led_pin: wan-led-pin {
401 + rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
406 + pmic_int_l: pmic-int-l {
407 + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
412 + sdio_vcc_pin: sdio-vcc-pin {
413 + rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
426 + pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
427 + pinctrl-names = "default";
432 + vmmc-supply = <&vcc_sd>;
433 + vqmmc-supply = <&vcc_io_sdio>;
438 + rockchip,hw-tshut-mode = <0>;
439 + rockchip,hw-tshut-polarity = <0>;
472 --- a/board/rockchip/evb_rk3328/MAINTAINERS
473 +++ b/board/rockchip/evb_rk3328/MAINTAINERS
474 @@ -5,6 +5,13 @@ F: board/rockchip/evb_rk3328
475 F: include/configs/evb_rk3328.h
476 F: configs/evb-rk3328_defconfig
479 +M: David Bauer <mail@david-bauer.net>
481 +F: configs/nanopi-r2s-rk3328_defconfig
482 +F: arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
483 +F: arch/arm/dts/rk3328-nanopi-r2s.dts
486 M: Loic Devulder <ldevulder@suse.com>
487 M: Chen-Yu Tsai <wens@csie.org>
489 +++ b/configs/nanopi-r2s-rk3328_defconfig
492 +CONFIG_ARCH_ROCKCHIP=y
493 +CONFIG_SYS_TEXT_BASE=0x00200000
494 +CONFIG_SPL_GPIO_SUPPORT=y
495 +CONFIG_ENV_OFFSET=0x3F8000
496 +CONFIG_ROCKCHIP_RK3328=y
497 +CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
498 +CONFIG_TPL_LIBCOMMON_SUPPORT=y
499 +CONFIG_TPL_LIBGENERIC_SUPPORT=y
500 +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
501 +CONFIG_SPL_STACK_R_ADDR=0x600000
502 +CONFIG_NR_DRAM_BANKS=1
503 +CONFIG_DEBUG_UART_BASE=0xFF130000
504 +CONFIG_DEBUG_UART_CLOCK=24000000
505 +CONFIG_SMBIOS_PRODUCT_NAME="nanopi_r2s_rk3328"
507 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
508 +# CONFIG_ANDROID_BOOT_IMAGE is not set
510 +CONFIG_FIT_VERBOSE=y
511 +CONFIG_SPL_LOAD_FIT=y
512 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2s.dtb"
513 +CONFIG_MISC_INIT_R=y
514 +# CONFIG_DISPLAY_CPUINFO is not set
515 +CONFIG_DISPLAY_BOARDINFO_LATE=y
516 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
517 +CONFIG_TPL_SYS_MALLOC_SIMPLE=y
518 +CONFIG_SPL_STACK_R=y
519 +CONFIG_SPL_I2C_SUPPORT=y
520 +CONFIG_SPL_POWER_SUPPORT=y
522 +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
527 +# CONFIG_CMD_SETEXPR is not set
529 +CONFIG_SPL_OF_CONTROL=y
530 +CONFIG_TPL_OF_CONTROL=y
531 +CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s"
532 +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
533 +CONFIG_TPL_OF_PLATDATA=y
534 +CONFIG_ENV_IS_IN_MMC=y
535 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
536 +CONFIG_NET_RANDOM_ETHADDR=y
546 +CONFIG_FASTBOOT_BUF_ADDR=0x800800
547 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
548 +CONFIG_ROCKCHIP_GPIO=y
549 +CONFIG_SYS_I2C_ROCKCHIP=y
551 +CONFIG_MMC_DW_ROCKCHIP=y
552 +CONFIG_SF_DEFAULT_SPEED=20000000
554 +CONFIG_ETH_DESIGNWARE=y
555 +CONFIG_GMAC_ROCKCHIP=y
557 +CONFIG_SPL_PINCTRL=y
560 +CONFIG_SPL_DM_REGULATOR=y
561 +CONFIG_REGULATOR_PWM=y
562 +CONFIG_DM_REGULATOR_FIXED=y
563 +CONFIG_SPL_DM_REGULATOR_FIXED=y
564 +CONFIG_REGULATOR_RK8XX=y
565 +CONFIG_PWM_ROCKCHIP=y
570 +CONFIG_BAUDRATE=1500000
571 +CONFIG_DEBUG_UART_SHIFT=2
573 +# CONFIG_TPL_SYSRESET is not set
575 +CONFIG_USB_XHCI_HCD=y
576 +CONFIG_USB_XHCI_DWC3=y
577 +CONFIG_USB_EHCI_HCD=y
578 +CONFIG_USB_EHCI_GENERIC=y
579 +CONFIG_USB_OHCI_HCD=y
580 +CONFIG_USB_OHCI_GENERIC=y
583 +# CONFIG_USB_DWC3_GADGET is not set
585 +CONFIG_USB_GADGET_DWC2_OTG=y
586 +CONFIG_SPL_TINY_MEMSET=y
587 +CONFIG_TPL_TINY_MEMSET=y
589 +CONFIG_SMBIOS_MANUFACTURER="pine64"