847b121a34f21b482825d5c6df8c1ea55545d258
[openwrt/staging/chunkeey.git] / package / boot / uboot-rockchip / src / of-platdata / nanopi-r2s-rk3328 / dt-structs-gen.h
1 /*
2 * DO NOT MODIFY
3 *
4 * This file was generated by dtoc from a .dtb (device tree binary) file.
5 */
6
7 #include <stdbool.h>
8 #include <linux/libfdt.h>
9 struct dtd_ns16550_serial {
10 fdt32_t clock_frequency;
11 struct phandle_1_arg clocks[2];
12 const char * dma_names[2];
13 fdt32_t dmas[4];
14 fdt32_t interrupts[3];
15 fdt32_t pinctrl_0;
16 const char * pinctrl_names;
17 fdt64_t reg[2];
18 fdt32_t reg_io_width;
19 fdt32_t reg_shift;
20 };
21 struct dtd_regulator_fixed {
22 fdt32_t gpio[3];
23 fdt32_t pinctrl_0;
24 const char * pinctrl_names;
25 bool regulator_boot_on;
26 fdt32_t regulator_max_microvolt;
27 fdt32_t regulator_min_microvolt;
28 const char * regulator_name;
29 fdt32_t vin_supply;
30 };
31 struct dtd_rockchip_gpio_bank {
32 struct phandle_1_arg clocks[1];
33 bool gpio_controller;
34 bool interrupt_controller;
35 fdt32_t interrupts[3];
36 fdt64_t reg[2];
37 };
38 struct dtd_rockchip_rk3288_dw_mshc {
39 fdt32_t bus_width;
40 bool cap_sd_highspeed;
41 struct phandle_1_arg clocks[4];
42 bool disable_wp;
43 fdt32_t fifo_depth;
44 fdt32_t interrupts[3];
45 fdt32_t max_frequency;
46 fdt32_t pinctrl_0[4];
47 const char * pinctrl_names;
48 fdt64_t reg[2];
49 bool sd_uhs_sdr104;
50 bool sd_uhs_sdr12;
51 bool sd_uhs_sdr25;
52 bool sd_uhs_sdr50;
53 bool u_boot_spl_fifo_mode;
54 fdt32_t vmmc_supply;
55 fdt32_t vqmmc_supply;
56 };
57 struct dtd_rockchip_rk3328_cru {
58 fdt64_t reg[2];
59 fdt32_t rockchip_grf;
60 };
61 struct dtd_rockchip_rk3328_dmc {
62 fdt64_t reg[12];
63 fdt32_t rockchip_sdram_params[196];
64 };
65 struct dtd_rockchip_rk3328_grf {
66 fdt64_t reg[2];
67 };
68 struct dtd_rockchip_rk3328_pinctrl {
69 bool ranges;
70 fdt32_t rockchip_grf;
71 };