package/boot/uboot-xburst/files/include/configs/nanonote.h

   1 /*
   2  * Authors: Xiangfu Liu <xiangfu.z@gmail.com>
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License
   6  * as published by the Free Software Foundation; either version
   7  * 3 of the License, or (at your option) any later version.
   8  */
   9
  10 /*
  11  * This file contains the configuration parameters for the NanoNote.
  12  */
  13 #ifndef __CONFIG_NANONOTE_H
  14 #define __CONFIG_NANONOTE_H
  15
  16 #define CONFIG_MIPS32           1  /* MIPS32 CPU core */
  17 #define CONFIG_JzRISC           1  /* JzRISC core */
  18 #define CONFIG_JZSOC            1  /* Jz SoC */
  19 #define CONFIG_JZ4740           1  /* Jz4740 SoC */
  20 #define CONFIG_NANONOTE         1
  21
  22 #define CONFIG_LCD              1  /* LCD support */
  23 #define LCD_BPP                 LCD_COLOR32     /*5:18,24,32 bits per pixel */
  24 #define CONFIG_SYS_WHITE_ON_BLACK       1
  25
  26 #define CONFIG_SYS_CPU_SPEED    336000000       /* CPU clock: 336 MHz */
  27 #define CONFIG_SYS_EXTAL                12000000        /* EXTAL freq: 12 MHz */
  28 #define CONFIG_SYS_HZ           (CONFIG_SYS_EXTAL / 256) /* incrementer freq */
  29 #define CONFIG_SYS_MIPS_TIMER_FREQ      CONFIG_SYS_CPU_SPEED
  30
  31 #define CONFIG_SYS_UART_BASE    UART0_BASE      /* Base of the UART channel */
  32 #define CONFIG_BAUDRATE         57600
  33 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  34
  35 #define CONFIG_MMC              1
  36 #define CONFIG_FAT              1
  37 #define CONFIG_DOS_PARTITION    1
  38 #define CONFIG_SKIP_LOWLEVEL_INIT       1
  39 #define CONFIG_BOARD_EARLY_INIT_F       1
  40 #define CONFIG_SYS_NO_FLASH     1
  41 #define CONFIG_ENV_OVERWRITE    1
  42
  43 #define CONFIG_BOOTP_MASK       (CONFIG_BOOTP_DEFAUL)
  44 #define CONFIG_BOOTDELAY        0
  45 #define CONFIG_BOOTFILE         "uImage"        /* file to load */
  46 /*
  47  * Command line configuration.
  48  */
  49 #define CONFIG_CMD_BOOTD        /* bootd                        */
  50 #define CONFIG_CMD_CONSOLE      /* coninfo                      */
  51 #define CONFIG_CMD_ECHO         /* echo arguments               */
  52
  53 #define CONFIG_CMD_LOADB        /* loadb                        */
  54 #define CONFIG_CMD_LOADS        /* loads                        */
  55 #define CONFIG_CMD_MEMORY       /* md mm nm mw cp cmp crc base loop mtest */
  56 #define CONFIG_CMD_MISC         /* Misc functions like sleep etc*/
  57 #define CONFIG_CMD_RUN          /* run command in env variable  */
  58 #define CONFIG_CMD_SAVEENV      /* saveenv                      */
  59 #define CONFIG_CMD_SETGETDCR    /* DCR support on 4xx           */
  60 #define CONFIG_CMD_SOURCE       /* "source" command support     */
  61
  62 #define CONFIG_CMD_NAND
  63 #define CONFIG_CMD_MMC
  64 #define CONFIG_CMD_FAT
  65
  66 /*
  67  * Serial download configuration
  68  */
  69 #define CONFIG_LOADS_ECHO       1       /* echo on for serial download */
  70 #define CONFIG_LOADS_BAUD_CHANGE        1       /* allow baudrate change */
  71
  72 /*
  73  * Miscellaneous configurable options
  74  */
  75 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
  76 #define CONFIG_SYS_PROMPT               "QI# "  /* Monitor Command Prompt */
  77 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
  78 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  79 /* Print Buffer Size */
  80 #define CONFIG_SYS_MAXARGS              16      /* max number of command args*/
  81
  82 #define CONFIG_SYS_MALLOC_LEN           896 * 1024
  83 #define CONFIG_SYS_BOOTPARAMS_LEN       128 * 1024
  84
  85 #define CONFIG_SYS_SDRAM_BASE           0x80000000     /* Cached addr */
  86 #define CONFIG_SYS_INIT_SP_OFFSET       0x400000
  87 #define CONFIG_SYS_LOAD_ADDR            0x80600000     /* default load address */
  88 #define CONFIG_SYS_MEMTEST_START        0x80100000
  89 #define CONFIG_SYS_MEMTEST_END          0x80800000
  90
  91 /*
  92  * Environment
  93  */
  94 #define CONFIG_ENV_IS_IN_NAND   1       /* use NAND for environment vars */
  95
  96 /*
  97  * NAND FLASH configuration
  98  */
  99 /* NAND Boot config code */
 100 #define JZ4740_NANDBOOT_CFG     JZ4740_NANDBOOT_B8R3
 101
 102 #define NANONOTE_NAND_SIZE      2 /* if board nand flash is 1GB, set to 1
 103                                    * if board nand flash is 2GB, set to 2
 104                                    * for change the PAGE_SIZE and BLOCK_SIZE
 105                                    * will delete when there is no 1GB flash
 106                                    */
 107
 108 #define CONFIG_SYS_NAND_PAGE_SIZE       (2048 * NANONOTE_NAND_SIZE)
 109 /* nand chip block size */
 110 #define CONFIG_SYS_NAND_BLOCK_SIZE      (256 * NANONOTE_NAND_SIZE << 10)
 111 /* nand bad block was marked at this page in a block, start from 0 */
 112 #define CONFIG_SYS_NAND_BADBLOCK_PAGE   127
 113 /* ECC offset position in oob area, default value is 6 if it isn't defined */
 114 #define CONFIG_SYS_NAND_ECC_POS (6 * NANONOTE_NAND_SIZE)
 115 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 116 #define NAND_MAX_CHIPS          1
 117 #define CONFIG_SYS_NAND_BASE           0xB8000000
 118 #define CONFIG_SYS_NAND_SELECT_DEVICE  1 /* nand driver supports mutipl.*/
 119 #define CONFIG_SYS_ONENAND_BASE CONFIG_SYS_NAND_BASE
 120
 121 /*
 122  * IPL (Initial Program Loader, integrated inside CPU)
 123  * Will load first 8k from NAND (SPL) into cache and execute it from there.
 124  *
 125  * SPL (Secondary Program Loader)
 126  * Will load special U-Boot version (NUB) from NAND and execute it. This SPL
 127  * has to fit into 8kByte. It sets up the CPU and configures the SDRAM
 128  * controller and the NAND controller so that the special U-Boot image can be
 129  * loaded from NAND to SDRAM.
 130  *
 131  * NUB (NAND U-Boot)
 132  * This NAND U-Boot (NUB) is a special U-Boot version which can be started
 133  * from RAM. Therefore it mustn't (re-)configure the SDRAM controller.
 134  *
 135  */
 136 #define CONFIG_SYS_NAND_U_BOOT_DST              0x80100000      /* Load NUB to this addr */
 137 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_NAND_U_BOOT_DST
 138 /* Start NUB from this addr*/
 139
 140 /*
 141  * Define the partitioning of the NAND chip (only RAM U-Boot is needed here)
 142  */
 143 #define CONFIG_SYS_NAND_U_BOOT_OFFS     (256 << 10)     /* Offset to RAM U-Boot image */
 144 #define CONFIG_SYS_NAND_U_BOOT_SIZE     (512 << 10)     /* Size of RAM U-Boot image */
 145
 146 #define CONFIG_ENV_SIZE         CONFIG_SYS_NAND_BLOCK_SIZE
 147 #define CONFIG_ENV_OFFSET       (CONFIG_SYS_NAND_BLOCK_SIZE + CONFIG_SYS_NAND_U_BOOT_SIZE + CONFIG_SYS_NAND_BLOCK_SIZE)
 148 /* environment starts here  */
 149 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 150
 151 /* in board/nanonote/config.mk TEXT_BAS = 0x88000000 */
 152 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE
 153
 154 /*
 155  * SDRAM Info.
 156  */
 157 #define CONFIG_NR_DRAM_BANKS    1
 158
 159 /*
 160  * Cache Configuration
 161  */
 162 #define CONFIG_SYS_DCACHE_SIZE  16384
 163 #define CONFIG_SYS_ICACHE_SIZE  16384
 164 #define CONFIG_SYS_CACHELINE_SIZE       32
 165
 166 /*
 167  * GPIO definition
 168  */
 169 #define GPIO_LCD_CS     (2 * 32 + 21)
 170 #define GPIO_DISP_OFF_N (3 * 32 + 21)
 171 #define GPIO_PWM        (3 * 32 + 27)
 172
 173 #define GPIO_AMP_EN     (3 * 32 + 4)
 174
 175 #define GPIO_SDPW_EN    (3 * 32 + 2)
 176 #define GPIO_SD_DETECT  (3 * 32 + 0)
 177
 178 #define GPIO_USB_DETECT (3 * 32 + 27)
 179 #define GPIO_BUZZ_PWM   (3 * 32 + 28)
 180
 181 #define GPIO_AUDIO_POP  (1 * 32 + 29)
 182 #define GPIO_COB_TEST   (1 * 32 + 30)
 183
 184 #define GPIO_KEYOUT_BASE        (2 * 32 + 10)
 185 #define GPIO_KEYIN_BASE (3 * 32 + 18)
 186 #define GPIO_KEYIN_8    (3 * 32 + 26)
 187
 188 #define GPIO_SD_CD_N    GPIO_SD_DETECT          /* SD Card insert detect */
 189 #define GPIO_SD_VCC_EN_N        GPIO_SDPW_EN    /* SD Card Power Enable */
 190
 191 #endif  /* __CONFIG_NANONOTE_H */