package/boot/uboot-xburst/files/include/configs/qi_lb60.h

   1 #ifndef __CONFIG_QI_LB60_H
   2 #define __CONFIG_QI_LB60_H
   3
   4 #include <configs/nanonote.h>
   5
   6 #define CONFIG_QI_LB60 1
   7
   8 #define CONFIG_BOOTARGS         "mem=32M console=ttyS0,57600n8 ubi.mtd=2 rootfstype=ubifs root=ubi0:rootfs rw rootwait"
   9 #define CONFIG_BOOTARGSFROMSD   "mem=32M console=ttyS0,57600n8 rootfstype=ext2 root=/dev/mmcblk0p2 rw rootwait"
  10 #define CONFIG_BOOTCOMMAND      "nand read 0x80600000 0x400000 0x200000;bootm"
  11 #define CONFIG_BOOTCOMMANDFROMSD        "mmc init; fatload mmc 0 0x80600000 uImage; bootm"
  12
  13 /* SDRAM paramters */
  14 #define SDRAM_BW16              1       /* Data bus width: 0-32bit, 1-16bit */
  15 #define SDRAM_BANK4             1       /* Banks each chip: 0-2bank, 1-4bank */
  16 #define SDRAM_ROW               13      /* Row address: 11 to 13 */
  17 #define SDRAM_COL               9       /* Column address: 8 to 12 */
  18 #define SDRAM_CASL              2       /* CAS latency: 2 or 3 */
  19
  20 /* SDRAM Timings, unit: ns */
  21 #define SDRAM_TRAS              45      /* RAS# Active Time */
  22 #define SDRAM_RCD               20      /* RAS# to CAS# Delay */
  23 #define SDRAM_TPC               20      /* RAS# Precharge Time */
  24 #define SDRAM_TRWL              7       /* Write Latency Time */
  25 #define SDRAM_TREF              15625   /* Refresh period: 8192 cycles/64ms */
  26
  27 #endif