package/kernel/mac80211/patches/ath/560-ath9k-dynack-set-max-timeout-according-to-channel-wi.patch

   1 From 3f737abb7d53cc80d619a3b4a30b6fa63cdc8df7 Mon Sep 17 00:00:00 2001
   2 From: Lorenzo Bianconi <lorenzo@kernel.org>
   3 Date: Tue, 20 Aug 2019 18:20:21 +0200
   4 Subject: [PATCH 3/4] ath9k: dynack: set max timeout according to channel width
   5
   6 Compute maximum configurable ackimeout/ctstimeout according to channel
   7 width (clockrate)
   8
   9 Tested-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
  10 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  11 ---
  12  drivers/net/wireless/ath/ath9k/dynack.c | 38 +++++++++++++++++++------
  13  1 file changed, 30 insertions(+), 8 deletions(-)
  14
  15 --- a/drivers/net/wireless/ath/ath9k/dynack.c
  16 +++ b/drivers/net/wireless/ath/ath9k/dynack.c
  17 @@ -20,12 +20,31 @@
  18
  19  #define COMPUTE_TO             (5 * HZ)
  20  #define LATEACK_DELAY          (10 * HZ)
  21 -#define LATEACK_TO             256
  22 -#define MAX_DELAY              300
  23  #define EWMA_LEVEL             96
  24  #define EWMA_DIV               128
  25
  26  /**
  27 + * ath_dynack_get_max_to - set max timeout according to channel width
  28 + * @ah: ath hw
  29 + *
  30 + */
  31 +static u32 ath_dynack_get_max_to(struct ath_hw *ah)
  32 +{
  33 +       const struct ath9k_channel *chan = ah->curchan;
  34 +
  35 +       if (!chan)
  36 +               return 300;
  37 +
  38 +       if (IS_CHAN_HT40(chan))
  39 +               return 300;
  40 +       if (IS_CHAN_HALF_RATE(chan))
  41 +               return 750;
  42 +       if (IS_CHAN_QUARTER_RATE(chan))
  43 +               return 1500;
  44 +       return 600;
  45 +}
  46 +
  47 +/**
  48   * ath_dynack_ewma - EWMA (Exponentially Weighted Moving Average) calculation
  49   *
  50   */
  51 @@ -126,15 +145,16 @@ static void ath_dynack_compute_ackto(str
  52   */
  53  static void ath_dynack_compute_to(struct ath_hw *ah)
  54  {
  55 -       u32 ackto, ack_ts;
  56 -       u8 *dst, *src;
  57 +       struct ath_dynack *da = &ah->dynack;
  58 +       u32 ackto, ack_ts, max_to;
  59         struct ieee80211_sta *sta;
  60 -       struct ath_node *an;
  61         struct ts_info *st_ts;
  62 -       struct ath_dynack *da = &ah->dynack;
  63 +       struct ath_node *an;
  64 +       u8 *dst, *src;
  65
  66         rcu_read_lock();
  67
  68 +       max_to = ath_dynack_get_max_to(ah);
  69         while (da->st_rbf.h_rb != da->st_rbf.t_rb &&
  70                da->ack_rbf.h_rb != da->ack_rbf.t_rb) {
  71                 ack_ts = da->ack_rbf.tstamp[da->ack_rbf.h_rb];
  72 @@ -150,7 +170,7 @@ static void ath_dynack_compute_to(struct
  73                 if (ack_ts > st_ts->tstamp + st_ts->dur) {
  74                         ackto = ack_ts - st_ts->tstamp - st_ts->dur;
  75
  76 -                       if (ackto < MAX_DELAY) {
  77 +                       if (ackto < max_to) {
  78                                 sta = ieee80211_find_sta_by_ifaddr(ah->hw, dst,
  79                                                                    src);
  80                                 if (sta) {
  81 @@ -207,8 +227,10 @@ void ath_dynack_sample_tx_ts(struct ath_
  82                 if (ieee80211_is_assoc_req(hdr->frame_control) ||
  83                     ieee80211_is_assoc_resp(hdr->frame_control) ||
  84                     ieee80211_is_auth(hdr->frame_control)) {
  85 +                       u32 max_to = ath_dynack_get_max_to(ah);
  86 +
  87                         ath_dbg(common, DYNACK, "late ack\n");
  88 -                       ath_dynack_set_timeout(ah, LATEACK_TO);
  89 +                       ath_dynack_set_timeout(ah, max_to);
  90                         if (sta) {
  91                                 struct ath_node *an;
  92