bc919c1c1c9b0f41d050018dc7167520a15cff28
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 //joelin 10/07/2004 for MXIC MX29LV320ABTC-90
25 #include <asm/danube.h>
29 #define FLASH_DELAY {int i; \
31 *((volatile u32 *)CFG_SDRAM_BASE_UNCACHE); \
38 flash_info_t flash_info
[CFG_MAX_FLASH_BANKS
]; /* info for FLASH chips */
40 /* NOTE - CONFIG_FLASH_16BIT means the CPU interface is 16-bit, it
41 * has nothing to do with the flash chip being 8-bit or 16-bit.
43 #ifdef CONFIG_FLASH_16BIT
44 typedef unsigned short FLASH_PORT_WIDTH
;
45 typedef volatile unsigned short FLASH_PORT_WIDTHV
;
46 #define FLASH_ID_MASK 0xFFFF
48 typedef unsigned long FLASH_PORT_WIDTH
;
49 typedef volatile unsigned long FLASH_PORT_WIDTHV
;
50 #define FLASH_ID_MASK 0xFFFFFFFF
53 #define FPW FLASH_PORT_WIDTH
54 #define FPWV FLASH_PORT_WIDTHV
56 #define ORMASK(size) ((-size) & OR_AM_MSK) // 0xffff8000
59 #define FLASH_CYCLE1 0x0555
60 #define FLASH_CYCLE2 0x02aa
62 #define FLASH_CYCLE1 0x0554 //joelin for MX29LV320AT/B 0x0555
63 #define FLASH_CYCLE2 0x02ab //joelin for MX29LV320AT/B 0x02aa
66 /*-----------------------------------------------------------------------
69 static ulong
flash_get_size(FPWV
*addr
, flash_info_t
*info
);
70 static void flash_reset(flash_info_t
*info
);
71 static int write_word_intel(flash_info_t
*info
, FPWV
*dest
, FPW data
);
72 static int write_word_amd(flash_info_t
*info
, FPWV
*dest
, FPW data
);
73 static void flash_get_offsets(ulong base
, flash_info_t
*info
);
74 static flash_info_t
*flash_get_info(ulong base
);
76 /*-----------------------------------------------------------------------
79 * sets up flash_info and returns size of FLASH (bytes)
81 unsigned long flash_init (void)
83 unsigned long size
= 0;
86 printf("%s:%s[%d]\n", __FILE__
, __func__
, __LINE__
);
87 /* Init: no FLASHes known */
88 for (i
=0; i
< CFG_MAX_FLASH_BANKS
; ++i
) { // 1 bank
89 ulong flashbase
= (i
== 0) ? PHYS_FLASH_1
: PHYS_FLASH_2
; // 0xb0000000, 0xb4000000
91 printf("%s:%s[%d]\n", __FILE__
, __func__
, __LINE__
);
92 volatile ulong
* buscon
= (ulong
*)
93 ((i
== 0) ? DANUBE_EBU_BUSCON0
: DANUBE_EBU_BUSCON1
);
95 /* Disable write protection */
96 // *buscon &= ~AMAZON_EBU_BUSCON0_WRDIS;
97 /* Enable write protection */
98 *buscon
|= DANUBE_EBU_BUSCON0_WRDIS
;
99 printf("%s:%s[%d]\n", __FILE__
, __func__
, __LINE__
);
102 memset(&flash_info
[i
], 0, sizeof(flash_info_t
));
104 printf("%s:%s[%d]\n", __FILE__
, __func__
, __LINE__
);
107 flash_get_size((FPW
*)flashbase
, &flash_info
[i
]);
109 if (flash_info
[i
].flash_id
== FLASH_UNKNOWN
) {
110 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n",
111 i
, flash_info
[i
].size
);
114 size
+= flash_info
[i
].size
;
117 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE // TEXT_BASE >= 0xB3000000
118 /* monitor protection ON by default */ /* only use software protection, info->protect[i]=0/1 */
119 /* flash_protect(FLAG_PROTECT_SET,
121 CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
122 flash_get_info(CFG_MONITOR_BASE));
124 flash_protect(FLAG_PROTECT_CLEAR
, // clear protect
126 CFG_MONITOR_BASE
+CFG_MONITOR_LEN
-1,
127 flash_get_info(CFG_MONITOR_BASE
));
131 #ifdef CFG_ENV_IS_IN_FLASH /* 1 */
132 /* ENV protection ON by default */
133 /* flash_protect(FLAG_PROTECT_SET,
135 CFG_ENV_ADDR+CFG_ENV_SIZE-1,
136 flash_get_info(CFG_ENV_ADDR));
138 flash_protect(FLAG_PROTECT_CLEAR
,
140 CFG_ENV_ADDR
+CFG_ENV_SIZE
-1,
141 flash_get_info(CFG_ENV_ADDR
));
149 /*-----------------------------------------------------------------------
151 static void flash_reset(flash_info_t
*info
)
153 FPWV
*base
= (FPWV
*)(info
->start
[0]);
155 (*DANUBE_EBU_BUSCON0
)&=(~0x80000000); // enable writing
156 (*DANUBE_EBU_BUSCON1
)&=(~0x80000000); // enable writing
158 /* Put FLASH back in read mode */
159 if ((info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_INTEL
){
160 *base
= (FPW
)0x00FF00FF; /* Intel Read Mode */
163 else if ((info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_AMD
){
164 *base
= (FPW
)0x00F000F0; /* AMD Read Mode */
165 asm("SYNC"); //joelin
167 else if ((info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_MX
){
168 *base
= (FPW
)0x00F000F0; /* MXIC Read Mode */
169 asm("SYNC"); //joelin
172 (*DANUBE_EBU_BUSCON0
)|=0x80000000; // disable writing
173 (*DANUBE_EBU_BUSCON1
)|=0x80000000; // disable writing
177 /*-----------------------------------------------------------------------
179 static void flash_get_offsets (ulong base
, flash_info_t
*info
)
183 /* set up sector start address table */
184 if ((info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_INTEL
185 && (info
->flash_id
& FLASH_BTYPE
)) {
186 int bootsect_size
; /* number of bytes/boot sector */
187 int sect_size
; /* number of bytes/regular sector */
189 bootsect_size
= 0x00002000 * (sizeof(FPW
)/2);
190 sect_size
= 0x00010000 * (sizeof(FPW
)/2);
192 /* set sector offsets for bottom boot block type */
193 for (i
= 0; i
< 8; ++i
) {
194 info
->start
[i
] = base
+ (i
* bootsect_size
);
196 for (i
= 8; i
< info
->sector_count
; i
++) {
197 info
->start
[i
] = base
+ ((i
- 7) * sect_size
);
200 else if ((info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_AMD
201 && (info
->flash_id
& FLASH_TYPEMASK
) == FLASH_AM640U
) {
203 int sect_size
; /* number of bytes/sector */
205 sect_size
= 0x00010000 * (sizeof(FPW
)/2);
207 /* set up sector start address table (uniform sector type) */
208 for( i
= 0; i
< info
->sector_count
; i
++ )
209 info
->start
[i
] = base
+ (i
* sect_size
);
211 else if(((info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_INTEL
)
212 && ((info
->flash_id
& FLASH_TYPEMASK
)==FLASH_28F128J3A
)){
215 for(i
=0;i
< info
->sector_count
; i
++)
216 info
->start
[i
]= base
+ (i
*sect_size
);
218 else if(((info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_INTEL
)
219 && ((info
->flash_id
& FLASH_TYPEMASK
)==FLASH_28F320J3A
)){
222 for(i
=0;i
< info
->sector_count
; i
++)
223 info
->start
[i
]= base
+ (i
*sect_size
);
225 //joelin add for MX29LV320AB-- SA0~SA7:sector size=8K bytes ,SA9~SA70 :sector size=64k bytes
226 else if(((info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_MX
)
227 && ((info
->flash_id
& FLASH_TYPEMASK
)==FLASH_29LV320AB
)){
228 int bootsect_size
; /* number of bytes/boot sector */
229 int sect_size
; /* number of bytes/regular sector */
231 bootsect_size
= 0x00002000 * (sizeof(FPW
)/2);
232 sect_size
= 0x00010000 * (sizeof(FPW
)/2);
234 /* set sector offsets for bottom boot block type */
235 for (i
= 0; i
< 8; ++i
) {
236 info
->start
[i
] = base
+ (i
* bootsect_size
);
238 for (i
= 8; i
< info
->sector_count
; i
++) {
239 info
->start
[i
] = base
+ ((i
- 7) * sect_size
);
242 else if(((info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_AMD
)
243 && ((info
->flash_id
& FLASH_TYPEMASK
)==FLASH_29LV320B
)){
244 int bootsect_size
; /* number of bytes/boot sector */
245 int sect_size
; /* number of bytes/regular sector */
247 bootsect_size
= 0x00002000 * (sizeof(FPW
)/2);
248 sect_size
= 0x00010000 * (sizeof(FPW
)/2);
250 /* set sector offsets for bottom boot block type */
251 for (i
= 0; i
< 8; ++i
) {
252 info
->start
[i
] = base
+ (i
* bootsect_size
);
254 for (i
= 8; i
< info
->sector_count
; i
++) {
255 info
->start
[i
] = base
+ ((i
- 7) * sect_size
);
258 //joelin add for MX29LV160BB-- SA0=16K,SA1,SA2=8K,SA3=32K bytes ,SA4~SA34 :sector size=64k bytes
259 else if(((info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_MX
)
260 && ((info
->flash_id
& FLASH_TYPEMASK
)==FLASH_29LV160BB
)){
261 int bootsect_size
; /* number of bytes/boot sector */
262 int sect_size
; /* number of bytes/regular sector */
264 bootsect_size
= 0x00002000 * (sizeof(FPW
)/2);
265 sect_size
= 0x00010000 * (sizeof(FPW
)/2);
266 /* set sector offsets for bottom boot block type */
268 info
->start
[0] = base
; //SA0=16K bytes
269 info
->start
[1] = info
->start
[0] + (1 * 0x00004000 * (sizeof(FPW
)/2)); //SA1=8K bytes
270 info
->start
[2] = info
->start
[1] + (1 * 0x00002000 * (sizeof(FPW
)/2)); //SA2=8K bytes
271 info
->start
[3] = info
->start
[2] + (1 * 0x00002000 * (sizeof(FPW
)/2)); //SA3=32K bytes
273 for (i
= 4; i
< info
->sector_count
; i
++) {
274 info
->start
[i
] = base
+ ((i
- 3) * sect_size
);
277 //liupeng add for MX29LV640BB-- SA0~SA7:sector size=8k bytes ,SA8~SA134 :sector size=64k bytes
278 else if(((info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_MX
)
279 && ((info
->flash_id
& FLASH_TYPEMASK
)==FLASH_29LV640BB
)){
280 int bootsect_size
; /* number of bytes/boot sector */
281 int sect_size
; /* number of bytes/regular sector */
283 bootsect_size
= 0x00002000 * (sizeof(FPW
)/2);
284 sect_size
= 0x00010000 * (sizeof(FPW
)/2);
286 /* set sector offsets for bottom boot block type */
287 for (i
= 0; i
< 8; ++i
) {
288 info
->start
[i
] = base
+ (i
* bootsect_size
);
290 for (i
= 8; i
< info
->sector_count
; i
++) {
291 info
->start
[i
] = base
+ ((i
- 7) * sect_size
);
295 printf("flash get offsets fail\n");
299 /*-----------------------------------------------------------------------
302 static flash_info_t
*flash_get_info(ulong base
)
307 for (i
= 0; i
< CFG_MAX_FLASH_BANKS
; i
++) {
308 info
= & flash_info
[i
];
309 if (info
->start
[0] <= base
&& base
< info
->start
[0] + info
->size
)
313 return i
== CFG_MAX_FLASH_BANKS
? 0 : info
;
316 /*-----------------------------------------------------------------------
319 void flash_print_info (flash_info_t
*info
)
325 uchar botbootletter
[] = "B";
326 uchar topbootletter
[] = "T";
327 uchar botboottype
[] = "bottom boot sector";
328 uchar topboottype
[] = "top boot sector";
330 if (info
->flash_id
== FLASH_UNKNOWN
) {
331 printf ("missing or unknown FLASH type\n");
335 switch (info
->flash_id
& FLASH_VENDMASK
) {
336 case FLASH_MAN_AMD
: printf ("AMD "); break;
337 case FLASH_MAN_BM
: printf ("BRIGHT MICRO "); break;
338 case FLASH_MAN_FUJ
: printf ("FUJITSU "); break;
339 case FLASH_MAN_SST
: printf ("SST "); break;
340 case FLASH_MAN_STM
: printf ("STM "); break;
341 case FLASH_MAN_INTEL
: printf ("INTEL "); break;
342 case FLASH_MAN_MX
: printf ("MXIC "); break;
343 default: printf ("Unknown Vendor "); break;
346 /* check for top or bottom boot, if it applies */
347 if (info
->flash_id
& FLASH_BTYPE
) {
348 boottype
= botboottype
;
349 bootletter
= botbootletter
;
352 boottype
= topboottype
;
353 bootletter
= topbootletter
;
356 switch (info
->flash_id
& FLASH_TYPEMASK
) {
358 fmt
= "29LV641D (64 Mbit, uniform sectors)\n";
360 case FLASH_28F800C3B
:
361 case FLASH_28F800C3T
:
362 fmt
= "28F800C3%s (8 Mbit, %s)\n";
364 case FLASH_INTEL800B
:
365 case FLASH_INTEL800T
:
366 fmt
= "28F800B3%s (8 Mbit, %s)\n";
368 case FLASH_28F160C3B
:
369 case FLASH_28F160C3T
:
370 fmt
= "28F160C3%s (16 Mbit, %s)\n";
372 case FLASH_INTEL160B
:
373 case FLASH_INTEL160T
:
374 fmt
= "28F160B3%s (16 Mbit, %s)\n";
376 case FLASH_28F320C3B
:
377 case FLASH_28F320C3T
:
378 fmt
= "28F320C3%s (32 Mbit, %s)\n";
380 case FLASH_INTEL320B
:
381 case FLASH_INTEL320T
:
382 fmt
= "28F320B3%s (32 Mbit, %s)\n";
384 case FLASH_28F640C3B
:
385 case FLASH_28F640C3T
:
386 fmt
= "28F640C3%s (64 Mbit, %s)\n";
388 case FLASH_INTEL640B
:
389 case FLASH_INTEL640T
:
390 fmt
= "28F640B3%s (64 Mbit, %s)\n";
392 case FLASH_28F128J3A
:
393 fmt
= "28F128J3A (128 Mbit, 128 uniform sectors)\n";
395 case FLASH_28F320J3A
:
396 fmt
= "28F320J3A (32 Mbit, 32 uniform sectors)\n";
398 case FLASH_29LV640BB
: //liupeng for MXIC FLASH_29LV640BB
399 fmt
= "29LV640BB (64 Mbit, boot sector SA0~SA126 size 64k bytes,other sectors SA127~SA135 size 8k bytes)\n";
401 case FLASH_29LV320B
: //joelin for MXIC FLASH_29LV320AB
402 case FLASH_29LV320AB
: //joelin for MXIC FLASH_29LV320AB
403 fmt
= "29LV320AB (32 Mbit, boot sector SA0~SA7 size 8K bytes,other sectors SA8~SA70 size 64K bytes)\n";
405 case FLASH_29LV160BB
: //joelin for MXIC FLASH_29LV160BB
406 fmt
= "29LV160BB (16 Mbit, boot sector SA0 size 16K bytes,SA1,SA2 size 8K bytes,SA3 size 32k bytes,other sectors SA4~SA34 size 64K bytes)\n";
409 fmt
= "Unknown Chip Type\n";
413 printf (fmt
, bootletter
, boottype
);
415 printf (" Size: %ld MB in %d Sectors\n",
419 printf (" Sector Start Addresses:");
421 for (i
=0; i
<info
->sector_count
; ++i
) {
426 printf (" %08lX%s", info
->start
[i
],
427 info
->protect
[i
] ? " (RO)" : " ");
433 /*-----------------------------------------------------------------------
437 * The following code cannot be run from FLASH!
440 ulong
flash_get_size (FPWV
*addr
, flash_info_t
*info
)
442 (*DANUBE_EBU_BUSCON0
)=0x1d7ff; //value from Aikann, should be used on the real chip
443 (*EBU_ADDR_SEL_0
) = 0x10000031; //starting address from 0xb0000000
445 (*DANUBE_EBU_BUSCON0
)&=(~0x80000000); // enable writing
446 (*DANUBE_EBU_BUSCON1
)&=(~0x80000000); // enable writing
447 /* Write auto select command: read Manufacturer ID */
449 /* Write auto select command sequence and test FLASH answer */
450 addr
[FLASH_CYCLE1
] = (FPW
)0x00AA00AA; /* for AMD, Intel ignores this */
452 addr
[FLASH_CYCLE2
] = (FPW
)0x00550055; /* for AMD, Intel ignores this */
454 addr
[FLASH_CYCLE1
] = (FPW
)0x00900090; /* selects Intel or AMD */
457 /* The manufacturer codes are only 1 byte, so just use 1 byte.
458 * This works for any bus width and any FLASH device width.
461 printf("\n type is %08lx", addr
[1] & 0xff); //joelin 10/06/2004 flash type
462 printf("\n type is %08lx", addr
[0] & 0xff); //joelin 10/06/2004 flash type
464 switch (addr
[1] & 0xff) {
465 case (uchar
)AMD_MANUFACT
:
466 printf("%s:%s[%d]\n", __FILE__
, __func__
, __LINE__
);
467 info
->flash_id
= FLASH_MAN_AMD
;
470 case (uchar
)INTEL_MANUFACT
: // 0x0089
471 printf("%s:%s[%d]\n", __FILE__
, __func__
, __LINE__
);
472 info
->flash_id
= FLASH_MAN_INTEL
; //0x00300000
476 case (uchar
)MX_MANUFACT
: // 0x00c2
477 printf("%s:%s[%d]\n", __FILE__
, __func__
, __LINE__
);
478 info
->flash_id
= FLASH_MAN_MX
;//0x00030000
482 printf("%s:%s[%d]\n", __FILE__
, __func__
, __LINE__
);
483 info
->flash_id
= FLASH_UNKNOWN
;
484 info
->sector_count
= 0;
488 info->flash_id = FLASH_MAN_INTEL; //0x00300000
492 printf("%s:%s[%d] %08lx\n", __FILE__
, __func__
, __LINE__
, addr
[0]);
493 /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */
494 if (info
->flash_id
!= FLASH_UNKNOWN
) switch (addr
[0]) {
495 case (FPW
)EON_ID_EN29LV320B
:
496 printf("%s:%s[%d]\n", __FILE__
, __func__
, __LINE__
);
497 info
->flash_id
+= FLASH_29LV320B
;
498 info
->sector_count
= 71;
499 info
->size
= 0x00400000 * (sizeof(FPW
)/2);
501 case (FPW
)AMD_ID_LV640U
: /* 29LV640 and 29LV641 have same ID */
502 info
->flash_id
+= FLASH_AM640U
;
503 info
->sector_count
= 128;
504 info
->size
= 0x00800000 * (sizeof(FPW
)/2);
505 break; /* => 8 or 16 MB */
507 case (FPW
)INTEL_ID_28F800C3B
:
508 info
->flash_id
+= FLASH_28F800C3B
;
509 info
->sector_count
= 23;
510 info
->size
= 0x00100000 * (sizeof(FPW
)/2);
511 break; /* => 1 or 2 MB */
513 case (FPW
)INTEL_ID_28F800B3B
:
514 info
->flash_id
+= FLASH_INTEL800B
;
515 info
->sector_count
= 23;
516 info
->size
= 0x00100000 * (sizeof(FPW
)/2);
517 break; /* => 1 or 2 MB */
519 case (FPW
)INTEL_ID_28F160C3B
:
520 info
->flash_id
+= FLASH_28F160C3B
;
521 info
->sector_count
= 39;
522 info
->size
= 0x00200000 * (sizeof(FPW
)/2);
523 break; /* => 2 or 4 MB */
525 case (FPW
)INTEL_ID_28F160B3B
:
526 info
->flash_id
+= FLASH_INTEL160B
;
527 info
->sector_count
= 39;
528 info
->size
= 0x00200000 * (sizeof(FPW
)/2);
529 break; /* => 2 or 4 MB */
531 case (FPW
)INTEL_ID_28F320C3B
:
532 info
->flash_id
+= FLASH_28F320C3B
;
533 info
->sector_count
= 71;
534 info
->size
= 0x00400000 * (sizeof(FPW
)/2);
535 break; /* => 4 or 8 MB */
537 case (FPW
)INTEL_ID_28F320B3B
:
538 info
->flash_id
+= FLASH_INTEL320B
;
539 info
->sector_count
= 71;
540 info
->size
= 0x00400000 * (sizeof(FPW
)/2);
541 break; /* => 4 or 8 MB */
543 case (FPW
)INTEL_ID_28F640C3B
:
544 info
->flash_id
+= FLASH_28F640C3B
;
545 info
->sector_count
= 135;
546 info
->size
= 0x00800000 * (sizeof(FPW
)/2);
547 break; /* => 8 or 16 MB */
549 case (FPW
)INTEL_ID_28F640B3B
:
550 info
->flash_id
+= FLASH_INTEL640B
;
551 info
->sector_count
= 135;
552 info
->size
= 0x00800000 * (sizeof(FPW
)/2);
553 break; /* => 8 or 16 MB */
555 case (FPW
)INTEL_ID_28F128J3A
:
556 info
->flash_id
+=FLASH_28F128J3A
;
557 info
->sector_count
= 128;
558 info
->size
= 0x01000000 * (sizeof(FPW
)/2);
559 break; /* => 16 MB */
560 case (FPW
)INTEL_ID_28F320J3A
:
561 info
->flash_id
+= FLASH_28F320J3A
;
562 info
->sector_count
= 32;
563 info
->size
= 0x00400000 * (sizeof(FPW
)/2);
566 case (FPW
)MX_ID_29LV320AB
:
567 info
->flash_id
+= FLASH_29LV320AB
;
568 info
->sector_count
= 71;
569 info
->size
= 0x00400000 * (sizeof(FPW
)/2);
573 case (FPW
)MX_ID_29LV160BB
:
574 info
->flash_id
+= FLASH_29LV160BB
;
575 info
->sector_count
= 35;
576 info
->size
= 0x00200000 * (sizeof(FPW
)/2);
580 case (FPW
)MX_ID_29LV640BB
:
581 info
->flash_id
+= FLASH_29LV640BB
;
582 info
->sector_count
= 135;
583 info
->size
= 0x00800000 * (sizeof(FPW
)/2);
586 info
->flash_id
= FLASH_UNKNOWN
;
587 info
->sector_count
= 0;
589 return (0); /* => no or unknown flash */
591 info->flash_id += FLASH_28F320J3A;
592 info->sector_count = 32;
593 info->size = 0x00400000 * (sizeof(FPW)/2);
598 (*DANUBE_EBU_BUSCON0
)|=0x80000000; // disable writing
599 (*DANUBE_EBU_BUSCON1
)|=0x80000000; // disable writing
601 flash_get_offsets((ulong
)addr
, info
);
603 /* Put FLASH back in read mode */
609 /*-----------------------------------------------------------------------
612 int flash_erase (flash_info_t
*info
, int s_first
, int s_last
)
615 int flag
, prot
, sect
;
616 int intel
= (info
->flash_id
& FLASH_VENDMASK
) == FLASH_MAN_INTEL
;
617 ulong start
, now
, last
;
619 if ((s_first
< 0) || (s_first
> s_last
)) {
620 if (info
->flash_id
== FLASH_UNKNOWN
) {
621 printf ("- missing\n");
623 printf ("- no sectors to erase\n");
628 switch (info
->flash_id
& FLASH_TYPEMASK
) {
629 case FLASH_INTEL800B
:
630 case FLASH_INTEL160B
:
631 case FLASH_INTEL320B
:
632 case FLASH_INTEL640B
:
633 case FLASH_28F800C3B
:
634 case FLASH_28F160C3B
:
635 case FLASH_28F320C3B
:
636 case FLASH_28F640C3B
:
637 case FLASH_28F128J3A
:
638 case FLASH_28F320J3A
:
640 case FLASH_29LV640BB
: //liupeng for MXIC MX29LV640BB
642 case FLASH_29LV320AB
: //joelin for MXIC MX29LV320AB
643 case FLASH_29LV160BB
: //joelin for MXIC MX29LV160BB
647 printf ("Can't erase unknown flash type %08lx - aborted\n",
653 for (sect
=s_first
; sect
<=s_last
; ++sect
) {
654 if (info
->protect
[sect
]) {
660 printf ("- Warning: %d protected sectors will not be erased!\n",
668 /* Start erase on unprotected sectors */
669 for (sect
= s_first
; sect
<=s_last
&& rcode
== 0; sect
++) {
671 if (info
->protect
[sect
] != 0) /* protected, skip it */
674 /* Disable interrupts which might cause a timeout here */
675 flag
= disable_interrupts();
677 (*DANUBE_EBU_BUSCON0
)&=(~0x80000000); // enable writing
678 (*DANUBE_EBU_BUSCON1
)&=(~0x80000000); // enable writing
680 addr
= (FPWV
*)(info
->start
[sect
]);
682 *addr
= (FPW
)0x00500050; /* clear status register */
683 *addr
= (FPW
)0x00200020; /* erase setup */
684 *addr
= (FPW
)0x00D000D0; /* erase confirm */
688 /* must be AMD style if not Intel */
689 FPWV
*base
; /* first address in bank */
691 base
= (FPWV
*)(info
->start
[0]);
692 base
[FLASH_CYCLE1
] = (FPW
)0x00AA00AA; /* unlock */
693 base
[FLASH_CYCLE2
] = (FPW
)0x00550055; /* unlock */
694 base
[FLASH_CYCLE1
] = (FPW
)0x00800080; /* erase mode */
695 base
[FLASH_CYCLE1
] = (FPW
)0x00AA00AA; /* unlock */
696 base
[FLASH_CYCLE2
] = (FPW
)0x00550055; /* unlock */
697 *addr
= (FPW
)0x00300030; /* erase sector */
700 /* re-enable interrupts if necessary */
704 start
= get_timer(0);
706 /* wait at least 50us for AMD, 80us for Intel.
711 while ((*addr
& (FPW
)0x00800080) != (FPW
)0x00800080) {
712 if ((now
= get_timer(start
)) > CFG_FLASH_ERASE_TOUT
) {
713 printf ("Erase Timeout\n");
717 *addr
= (FPW
)0x00B000B0;
720 flash_reset(info
); /* reset to read mode */
721 rcode
= 1; /* failed */
725 /* show that we're waiting */
726 if ((get_timer(last
)) > CFG_HZ
) {/* every second */
734 switch (info
->flash_id
& FLASH_VENDMASK
) {
735 case FLASH_MAN_MX
: //joelin for MXIC
738 if((*addr
& (FPW
)0x00200020) != (FPW
)0x0)
739 printf("Erase Error\n");
745 /* show that we're waiting */
746 if ((get_timer(last
)) > CFG_HZ
) { /* every second */
751 //flash_reset(info); /* reset to read mode */
754 (*DANUBE_EBU_BUSCON0
)|=0x80000000; // disable writing
755 (*DANUBE_EBU_BUSCON1
)|=0x80000000; // disable writing
757 flash_reset(info
); /* Homebox Black with JS28F128J3D75 had trouble reading after erase */
763 /*-----------------------------------------------------------------------
764 * Copy memory to flash, returns:
767 * 2 - Flash not erased
769 int write_buff (flash_info_t
*info
, uchar
*src
, ulong addr
, ulong cnt
)
771 FPW data
= 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
772 int bytes
; /* number of bytes to program in current word */
773 int left
; /* number of bytes left to program */
776 for (left
= cnt
, res
= 0;
777 left
> 0 && res
== 0;
778 addr
+= sizeof(data
), left
-= sizeof(data
) - bytes
) {
780 bytes
= addr
& (sizeof(data
) - 1);
781 addr
&= ~(sizeof(data
) - 1);
783 /* combine source and destination data so can program
784 * an entire word of 16 or 32 bits
786 for (i
= 0; i
< sizeof(data
); i
++) {
788 if (i
< bytes
|| i
- bytes
>= left
)
789 data
+= *((uchar
*)addr
+ i
);
794 /* write one word to the flash */
795 switch (info
->flash_id
& FLASH_VENDMASK
) {
797 case FLASH_MAN_MX
: //joelin for MXIC
798 res
= write_word_amd(info
, (FPWV
*)addr
, data
);
800 case FLASH_MAN_INTEL
:
801 res
= write_word_intel(info
, (FPWV
*)addr
, data
);
804 /* unknown flash type, error! */
805 printf ("missing or unknown FLASH type\n");
806 res
= 1; /* not really a timeout, but gives error */
814 /*-----------------------------------------------------------------------
815 * Write a word to Flash for AMD FLASH
816 * A word is 16 or 32 bits, whichever the bus width of the flash bank
817 * (not an individual chip) is.
822 * 2 - Flash not erased
824 static int write_word_amd (flash_info_t
*info
, FPWV
*dest
, FPW data
)
828 int res
= 0; /* result, assume success */
829 FPWV
*base
; /* first address in flash bank */
831 /* Check if Flash is (sufficiently) erased */
832 if ((*dest
& data
) != data
) {
836 base
= (FPWV
*)(info
->start
[0]);
838 /* Disable interrupts which might cause a timeout here */
839 flag
= disable_interrupts();
841 (*DANUBE_EBU_BUSCON0
)&=(~0x80000000); // enable writing
842 (*DANUBE_EBU_BUSCON1
)&=(~0x80000000); // enable writing
845 base
[FLASH_CYCLE1
] = (FPW
)0x00AA00AA; /* unlock */
846 base
[FLASH_CYCLE2
] = (FPW
)0x00550055; /* unlock */
847 base
[FLASH_CYCLE1
] = (FPW
)0x00A000A0; /* selects program mode */
849 *dest
= data
; /* start programming the data */
851 /* re-enable interrupts if necessary */
855 start
= get_timer (0);
857 /* data polling for D7 */
858 while (res
== 0 && (*dest
& (FPW
)0x00800080) != (data
& (FPW
)0x00800080)) {
859 if (get_timer(start
) > CFG_FLASH_WRITE_TOUT
) {
860 *dest
= (FPW
)0x00F000F0; /* reset bank */
865 (*DANUBE_EBU_BUSCON0
)|=0x80000000; // disable writing
866 (*DANUBE_EBU_BUSCON1
)|=0x80000000; // disable writing
871 /*-----------------------------------------------------------------------
872 * Write a word to Flash for Intel FLASH
873 * A word is 16 or 32 bits, whichever the bus width of the flash bank
874 * (not an individual chip) is.
879 * 2 - Flash not erased
881 static int write_word_intel (flash_info_t
*info
, FPWV
*dest
, FPW data
)
885 int res
= 0; /* result, assume success */
887 /* Check if Flash is (sufficiently) erased */
888 if ((*dest
& data
) != data
) {
892 /* Disable interrupts which might cause a timeout here */
893 flag
= disable_interrupts();
895 (*DANUBE_EBU_BUSCON0
)&=(~0x80000000); // enable writing
896 (*DANUBE_EBU_BUSCON1
)&=(~0x80000000); // enable writing
898 *dest
= (FPW
)0x00500050; /* clear status register */
899 *dest
= (FPW
)0x00FF00FF; /* make sure in read mode */
900 *dest
= (FPW
)0x00400040; /* program setup */
901 *dest
= data
; /* start programming the data */
904 /* re-enable interrupts if necessary */
908 start
= get_timer (0);
910 while (res
== 0 && (*dest
& (FPW
)0x00800080) != (FPW
)0x00800080) {
911 if (get_timer(start
) > CFG_FLASH_WRITE_TOUT
) {
912 *dest
= (FPW
)0x00B000B0; /* Suspend program */
917 if (res
== 0 && (*dest
& (FPW
)0x00100010))
918 res
= 1; /* write failed, time out error is close enough */
920 *dest
= (FPW
)0x00500050; /* clear status register */
923 (*DANUBE_EBU_BUSCON0
)|=0x80000000; // disable writing
924 (*DANUBE_EBU_BUSCON1
)|=0x80000000; // disable writing