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USB probe rewrite, really needs testing
[openwrt/svn-archive/archive.git] / target / linux / adm5120-2.6 / files / drivers / usb / host / adm5120-hcd.c
1 /*
2 * HCD driver for ADM5120 SoC
3 *
4 * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
5 *
6 * Based on the ADMtek 2.4 driver
7 * (C) Copyright 2003 Junius Chen <juniusc@admtek.com.tw>
8 * Which again was based on the ohci and uhci drivers.
9 */
10
11 #include <linux/module.h>
12 #include <linux/delay.h>
13 #include <linux/debugfs.h>
14 #include <linux/seq_file.h>
15 #include <linux/errno.h>
16 #include <linux/init.h>
17 #include <linux/list.h>
18 #include <linux/usb.h>
19 #include <linux/platform_device.h>
20
21 #include <asm/io.h>
22 #include <asm/irq.h>
23 #include <asm/system.h>
24 #include <asm/byteorder.h>
25 #include <asm/mach-adm5120/adm5120_info.h>
26
27 #include "../core/hcd.h"
28
29 MODULE_DESCRIPTION("ADM5120 USB Host Controller Driver");
30 MODULE_LICENSE("GPL");
31 MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)");
32
33 #define ADMHCD_REG_CONTROL 0x00
34 #define ADMHCD_REG_INTSTATUS 0x04
35 #define ADMHCD_REG_INTENABLE 0x08
36 #define ADMHCD_REG_HOSTCONTROL 0x10
37 #define ADMHCD_REG_FMINTERVAL 0x18
38 #define ADMHCD_REG_FMNUMBER 0x1c
39 #define ADMHCD_REG_LSTHRESH 0x70
40 #define ADMHCD_REG_RHDESCR 0x74
41 #define ADMHCD_REG_PORTSTATUS0 0x78
42 #define ADMHCD_REG_PORTSTATUS1 0x7c
43 #define ADMHCD_REG_HOSTHEAD 0x80
44
45
46 #define ADMHCD_NUMPORTS 2
47
48 #define ADMHCD_HOST_EN 0x00000001 /* Host enable */
49 #define ADMHCD_SW_INTREQ 0x00000002 /* request software int */
50 #define ADMHCD_SW_RESET 0x00000008 /* Reset */
51
52 #define ADMHCD_INT_TD 0x00100000 /* TD completed */
53 #define ADMHCD_INT_SW 0x20000000 /* software interrupt */
54 #define ADMHCD_INT_FATAL 0x40000000 /* Fatal interrupt */
55 #define ADMHCD_INT_ACT 0x80000000 /* Interrupt active */
56
57 #define ADMHCD_STATE_RST 0x00000000 /* bus state reset */
58 #define ADMHCD_STATE_RES 0x00000001 /* bus state resume */
59 #define ADMHCD_STATE_OP 0x00000002 /* bus state operational */
60 #define ADMHCD_STATE_SUS 0x00000003 /* bus state suspended */
61 #define ADMHCD_DMA_EN 0x00000004 /* enable dma engine */
62
63 #define ADMHCD_NPS 0x00000020 /* No Power Switch */
64 #define ADMHCD_LPSC 0x04000000 /* Local power switch change */
65
66 #define ADMHCD_CCS 0x00000001 /* current connect status */
67 #define ADMHCD_PES 0x00000002 /* port enable status */
68 #define ADMHCD_PSS 0x00000004 /* port suspend status */
69 #define ADMHCD_POCI 0x00000008 /* port overcurrent indicator */
70 #define ADMHCD_PRS 0x00000010 /* port reset status */
71 #define ADMHCD_PPS 0x00000100 /* port power status */
72 #define ADMHCD_LSDA 0x00000200 /* low speed device attached */
73 #define ADMHCD_CSC 0x00010000 /* connect status change */
74 #define ADMHCD_PESC 0x00020000 /* enable status change */
75 #define ADMHCD_PSSC 0x00040000 /* suspend status change */
76 #define ADMHCD_OCIC 0x00080000 /* overcurrent change*/
77 #define ADMHCD_PRSC 0x00100000 /* reset status change */
78
79
80 struct admhcd_ed {
81 /* Don't change first four, they used for DMA */
82 u32 control;
83 struct admhcd_td *tail;
84 struct admhcd_td *head;
85 struct admhcd_ed *next;
86 /* the rest is for the driver only: */
87 struct admhcd_td *cur;
88 struct usb_host_endpoint *ep;
89 struct urb *urb;
90 struct admhcd_ed *real;
91 } __attribute__ ((packed));
92
93 #define ADMHCD_ED_EPSHIFT 7 /* Shift for endpoint number */
94 #define ADMHCD_ED_INT 0x00000800 /* Is this an int endpoint */
95 #define ADMHCD_ED_SPEED 0x00002000 /* Is it a high speed dev? */
96 #define ADMHCD_ED_SKIP 0x00004000 /* Skip this ED */
97 #define ADMHCD_ED_FORMAT 0x00008000 /* Is this an isoc endpoint */
98 #define ADMHCD_ED_MAXSHIFT 16 /* Shift for max packet size */
99
100 struct admhcd_td {
101 /* Don't change first four, they are used for DMA */
102 u32 control;
103 u32 buffer;
104 u32 buflen;
105 struct admhcd_td *next;
106 /* the rest is for the driver only: */
107 struct urb *urb;
108 struct admhcd_td *real;
109 } __attribute__ ((packed));
110
111 #define ADMHCD_TD_OWN 0x80000000
112 #define ADMHCD_TD_TOGGLE 0x00000000
113 #define ADMHCD_TD_DATA0 0x01000000
114 #define ADMHCD_TD_DATA1 0x01800000
115 #define ADMHCD_TD_OUT 0x00200000
116 #define ADMHCD_TD_IN 0x00400000
117 #define ADMHCD_TD_SETUP 0x00000000
118 #define ADMHCD_TD_ISO 0x00010000
119 #define ADMHCD_TD_R 0x00040000
120 #define ADMHCD_TD_INTEN 0x00010000
121
122 static int admhcd_td_err[16] = {
123 0, /* No */
124 -EREMOTEIO, /* CRC */
125 -EREMOTEIO, /* bit stuff */
126 -EREMOTEIO, /* data toggle */
127 -EPIPE, /* stall */
128 -ETIMEDOUT, /* timeout */
129 -EPROTO, /* pid err */
130 -EPROTO, /* unexpected pid */
131 -EREMOTEIO, /* data overrun */
132 -EREMOTEIO, /* data underrun */
133 -ETIMEDOUT, /* 1010 */
134 -ETIMEDOUT, /* 1011 */
135 -EREMOTEIO, /* buffer overrun */
136 -EREMOTEIO, /* buffer underrun */
137 -ETIMEDOUT, /* 1110 */
138 -ETIMEDOUT, /* 1111 */
139 };
140
141 #define ADMHCD_TD_ERRMASK 0x38000000
142 #define ADMHCD_TD_ERRSHIFT 27
143
144 #define TD(td) ((struct admhcd_td *)(((u32)(td)) & ~0xf))
145 #define ED(ed) ((struct admhcd_ed *)(((u32)(ed)) & ~0xf))
146
147 struct admhcd {
148 spinlock_t lock;
149
150 void __iomem *addr_reg;
151 void __iomem *data_reg;
152 /* Root hub registers */
153 u32 rhdesca;
154 u32 rhdescb;
155 u32 rhstatus;
156 u32 rhport[2];
157
158 /* async schedule: control, bulk */
159 struct list_head async;
160 u32 base;
161 u32 dma_en;
162 unsigned long flags;
163
164 };
165
166 static inline struct admhcd *hcd_to_admhcd(struct usb_hcd *hcd)
167 {
168 return (struct admhcd *)(hcd->hcd_priv);
169 }
170
171 static inline struct usb_hcd *admhcd_to_hcd(struct admhcd *admhcd)
172 {
173 return container_of((void *)admhcd, struct usb_hcd, hcd_priv);
174 }
175
176 static char hcd_name[] = "adm5120-hcd";
177
178 static u32 admhcd_reg_get(struct admhcd *ahcd, int reg)
179 {
180 return *(volatile u32 *)KSEG1ADDR(ahcd->base+reg);
181 }
182
183 static void admhcd_reg_set(struct admhcd *ahcd, int reg, u32 val)
184 {
185 *(volatile u32 *)KSEG1ADDR(ahcd->base+reg) = val;
186 }
187
188 static void admhcd_lock(struct admhcd *ahcd)
189 {
190 spin_lock_irqsave(&ahcd->lock, ahcd->flags);
191 ahcd->dma_en = admhcd_reg_get(ahcd, ADMHCD_REG_HOSTCONTROL) &
192 ADMHCD_DMA_EN;
193 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
194 }
195
196 static void admhcd_unlock(struct admhcd *ahcd)
197 {
198 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL,
199 ADMHCD_STATE_OP | ahcd->dma_en);
200 spin_unlock_irqrestore(&ahcd->lock, ahcd->flags);
201 }
202
203 static struct admhcd_td *admhcd_td_alloc(struct admhcd_ed *ed, struct urb *urb)
204 {
205 struct admhcd_td *tdn, *td;
206
207 tdn = kmalloc(sizeof(struct admhcd_td), GFP_ATOMIC);
208 if (!tdn)
209 return NULL;
210 tdn->real = tdn;
211 tdn = (struct admhcd_td *)KSEG1ADDR(tdn);
212 memset(tdn, 0, sizeof(struct admhcd_td));
213 if (ed->cur == NULL) {
214 ed->cur = tdn;
215 ed->head = tdn;
216 ed->tail = tdn;
217 td = tdn;
218 } else {
219 /* Supply back the old tail and link in new td as tail */
220 td = TD(ed->tail);
221 TD(ed->tail)->next = tdn;
222 ed->tail = tdn;
223 }
224 td->urb = urb;
225
226 return td;
227 }
228
229 static void admhcd_td_free(struct admhcd_ed *ed, struct urb *urb)
230 {
231 struct admhcd_td *td, **tdp;
232
233 if (urb == NULL)
234 ed->control |= ADMHCD_ED_SKIP;
235 tdp = &ed->cur;
236 td = ed->cur;
237 do {
238 if (td->urb == urb)
239 break;
240 tdp = &td->next;
241 td = TD(td->next);
242 } while (td);
243 while (td && td->urb == urb) {
244 *tdp = TD(td->next);
245 kfree(td->real);
246 td = *tdp;
247 }
248 }
249
250 /* Find an endpoint's descriptor, if needed allocate a new one and link it
251 in the DMA chain
252 */
253 static struct admhcd_ed *admhcd_get_ed(struct admhcd *ahcd,
254 struct usb_host_endpoint *ep, struct urb *urb)
255 {
256 struct admhcd_ed *hosthead;
257 struct admhcd_ed *found = NULL, *ed = NULL;
258 unsigned int pipe = urb->pipe;
259
260 admhcd_lock(ahcd);
261 hosthead = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
262 if (hosthead) {
263 for (ed = hosthead;; ed = ED(ed->next)) {
264 if (ed->ep == ep) {
265 found = ed;
266 break;
267 }
268 if (ED(ed->next) == hosthead)
269 break;
270 }
271 }
272 if (!found) {
273 found = kmalloc(sizeof(struct admhcd_ed), GFP_ATOMIC);
274 if (!found)
275 goto out;
276 memset(found, 0, sizeof(struct admhcd_ed));
277 found->real = found;
278 found->ep = ep;
279 found = (struct admhcd_ed *)KSEG1ADDR(found);
280 found->control = usb_pipedevice(pipe) |
281 (usb_pipeendpoint(pipe) << ADMHCD_ED_EPSHIFT) |
282 (usb_pipeint(pipe) ? ADMHCD_ED_INT : 0) |
283 (urb->dev->speed == USB_SPEED_FULL ? ADMHCD_ED_SPEED : 0) |
284 (usb_pipeisoc(pipe) ? ADMHCD_ED_FORMAT : 0) |
285 (usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)) << ADMHCD_ED_MAXSHIFT);
286 /* Alloc first dummy td */
287 admhcd_td_alloc(found, NULL);
288 if (hosthead) {
289 found->next = hosthead;
290 ed->next = found;
291 } else {
292 found->next = found;
293 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)found);
294 }
295 }
296 out:
297 admhcd_unlock(ahcd);
298 return found;
299 }
300
301 static struct admhcd_td *admhcd_td_fill(u32 control, struct admhcd_td *td,
302 dma_addr_t data, int len)
303 {
304 td->buffer = data;
305 td->buflen = len;
306 td->control = control;
307 return TD(td->next);
308 }
309
310 static void admhcd_ed_start(struct admhcd *ahcd, struct admhcd_ed *ed)
311 {
312 struct admhcd_td *td = ed->cur;
313
314 if (ed->urb)
315 return;
316 if (td->urb) {
317 ed->urb = td->urb;
318 while (1) {
319 td->control |= ADMHCD_TD_OWN;
320 if (TD(td->next)->urb != td->urb) {
321 td->buflen |= ADMHCD_TD_INTEN;
322 break;
323 }
324 td = TD(td->next);
325 }
326 }
327 ed->head = TD(ed->head);
328 ahcd->dma_en |= ADMHCD_DMA_EN;
329 }
330
331 static irqreturn_t adm5120hcd_irq(struct usb_hcd *hcd)
332 {
333 struct admhcd *ahcd = hcd_to_admhcd(hcd);
334 u32 intstatus;
335
336 intstatus = admhcd_reg_get(ahcd, ADMHCD_REG_INTSTATUS);
337 if (intstatus & ADMHCD_INT_FATAL) {
338 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_FATAL);
339 //
340 }
341 if (intstatus & ADMHCD_INT_SW) {
342 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_SW);
343 //
344 }
345 if (intstatus & ADMHCD_INT_TD) {
346 struct admhcd_ed *ed, *head;
347
348 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_TD);
349
350 head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
351 ed = head;
352 if (ed) do {
353 /* Is it a finished TD? */
354 if (ed->urb && !(ed->cur->control & ADMHCD_TD_OWN)) {
355 struct admhcd_td *td;
356 int error;
357
358 td = ed->cur;
359 error = (td->control & ADMHCD_TD_ERRMASK) >>
360 ADMHCD_TD_ERRSHIFT;
361 ed->urb->status = admhcd_td_err[error];
362 admhcd_td_free(ed, ed->urb);
363 // Calculate real length!!!
364 ed->urb->actual_length = ed->urb->transfer_buffer_length;
365 ed->urb->hcpriv = NULL;
366 usb_hcd_giveback_urb(hcd, ed->urb);
367 ed->urb = NULL;
368 }
369 admhcd_ed_start(ahcd, ed);
370 ed = ED(ed->next);
371 } while (ed != head);
372 }
373
374 return IRQ_HANDLED;
375 }
376
377 static int admhcd_urb_enqueue(struct usb_hcd *hcd, struct usb_host_endpoint *ep,
378 struct urb *urb, gfp_t mem_flags)
379 {
380 struct admhcd *ahcd = hcd_to_admhcd(hcd);
381 struct admhcd_ed *ed;
382 struct admhcd_td *td;
383 int size = 0, i, zero = 0, ret = 0;
384 unsigned int pipe = urb->pipe, toggle = 0;
385 dma_addr_t data = (dma_addr_t)urb->transfer_buffer;
386 int data_len = urb->transfer_buffer_length;
387
388 ed = admhcd_get_ed(ahcd, ep, urb);
389 if (!ed)
390 return -ENOMEM;
391
392 switch(usb_pipetype(pipe)) {
393 case PIPE_CONTROL:
394 size = 2;
395 case PIPE_INTERRUPT:
396 case PIPE_BULK:
397 default:
398 size += urb->transfer_buffer_length / 4096;
399 if (urb->transfer_buffer_length % 4096)
400 size++;
401 if (size == 0)
402 size++;
403 else if (urb->transfer_flags & URB_ZERO_PACKET &&
404 !(urb->transfer_buffer_length %
405 usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)))) {
406 size++;
407 zero = 1;
408 }
409 break;
410 case PIPE_ISOCHRONOUS:
411 size = urb->number_of_packets;
412 break;
413 }
414
415 admhcd_lock(ahcd);
416 /* Remember the first td */
417 td = admhcd_td_alloc(ed, urb);
418 if (!td) {
419 ret = -ENOMEM;
420 goto out;
421 }
422 /* Allocate additionall tds first */
423 for (i = 1; i < size; i++) {
424 if (admhcd_td_alloc(ed, urb) == NULL) {
425 admhcd_td_free(ed, urb);
426 ret = -ENOMEM;
427 goto out;
428 }
429 }
430
431 if (usb_gettoggle(urb->dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)))
432 toggle = ADMHCD_TD_TOGGLE;
433 else {
434 toggle = ADMHCD_TD_DATA0;
435 usb_settoggle(urb->dev, usb_pipeendpoint(pipe),
436 usb_pipeout(pipe), 1);
437 }
438
439 switch(usb_pipetype(pipe)) {
440 case PIPE_CONTROL:
441 td = admhcd_td_fill(ADMHCD_TD_SETUP | ADMHCD_TD_DATA0,
442 td, (dma_addr_t)urb->setup_packet, 8);
443 while (data_len > 0) {
444 td = admhcd_td_fill(ADMHCD_TD_DATA1
445 | ADMHCD_TD_R |
446 (usb_pipeout(pipe) ?
447 ADMHCD_TD_OUT : ADMHCD_TD_IN), td,
448 data, data_len % 4097);
449 data_len -= 4096;
450 }
451 admhcd_td_fill(ADMHCD_TD_DATA1 | (usb_pipeout(pipe) ?
452 ADMHCD_TD_IN : ADMHCD_TD_OUT), td,
453 data, 0);
454 break;
455 case PIPE_INTERRUPT:
456 case PIPE_BULK:
457 //info ok for interrupt?
458 i = 0;
459 while(data_len > 4096) {
460 td = admhcd_td_fill((usb_pipeout(pipe) ?
461 ADMHCD_TD_OUT :
462 ADMHCD_TD_IN | ADMHCD_TD_R) |
463 (i ? ADMHCD_TD_TOGGLE : toggle), td,
464 data, 4096);
465 data += 4096;
466 data_len -= 4096;
467 i++;
468 }
469 td = admhcd_td_fill((usb_pipeout(pipe) ?
470 ADMHCD_TD_OUT : ADMHCD_TD_IN) |
471 (i ? ADMHCD_TD_TOGGLE : toggle), td, data, data_len);
472 i++;
473 if (zero)
474 admhcd_td_fill((usb_pipeout(pipe) ?
475 ADMHCD_TD_OUT : ADMHCD_TD_IN) |
476 (i ? ADMHCD_TD_TOGGLE : toggle), td, 0, 0);
477 break;
478 case PIPE_ISOCHRONOUS:
479 for (i = 0; i < urb->number_of_packets; i++) {
480 td = admhcd_td_fill(ADMHCD_TD_ISO |
481 ((urb->start_frame + i) & 0xffff), td,
482 data + urb->iso_frame_desc[i].offset,
483 urb->iso_frame_desc[i].length);
484 }
485 break;
486 }
487 urb->hcpriv = ed;
488 admhcd_ed_start(ahcd, ed);
489 out:
490 admhcd_unlock(ahcd);
491 return ret;
492 }
493
494 static int admhcd_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
495 {
496 struct admhcd *ahcd = hcd_to_admhcd(hcd);
497 struct admhcd_ed *ed;
498
499 admhcd_lock(ahcd);
500
501 ed = urb->hcpriv;
502 if (ed && ed->urb != urb)
503 admhcd_td_free(ed, urb);
504
505 admhcd_unlock(ahcd);
506 return 0;
507 }
508
509 static void admhcd_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
510 {
511 struct admhcd *ahcd = hcd_to_admhcd(hcd);
512 struct admhcd_ed *ed, *edt, *head;
513
514 admhcd_lock(ahcd);
515
516 head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
517 if (!head)
518 goto out;
519 for (ed = head; ED(ed->next) != head; ed = ED(ed->next))
520 if (ed->ep == ep)
521 break;
522 if (ed->ep != ep)
523 goto out;
524 while (ed->cur)
525 admhcd_td_free(ed, ed->cur->urb);
526 if (head == ed) {
527 if (ED(ed->next) == ed) {
528 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0);
529 ahcd->dma_en = 0;
530 goto out_free;
531 }
532 head = ED(ed->next);
533 for (edt = head; ED(edt->next) != head; edt = ED(edt->next));
534 edt->next = ED(ed->next);
535 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)ed->next);
536 goto out_free;
537 }
538 for (edt = head; edt->next != ed; edt = edt->next);
539 edt->next = ed->next;
540 out_free:
541 kfree(ed->real);
542 out:
543 admhcd_unlock(ahcd);
544 }
545
546 static int admhcd_get_frame_number(struct usb_hcd *hcd)
547 {
548 struct admhcd *ahcd = hcd_to_admhcd(hcd);
549
550 return admhcd_reg_get(ahcd, ADMHCD_REG_FMNUMBER) & 0x0000ffff;
551 }
552
553 static int admhcd_hub_status_data(struct usb_hcd *hcd, char *buf)
554 {
555 struct admhcd *ahcd = hcd_to_admhcd(hcd);
556 int port;
557
558 *buf = 0;
559 for (port = 0; port < ADMHCD_NUMPORTS; port++) {
560 if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4) &
561 (ADMHCD_CSC | ADMHCD_PESC | ADMHCD_PSSC | ADMHCD_OCIC |
562 ADMHCD_PRSC))
563 *buf |= (1 << (port + 1));
564 }
565 return !!*buf;
566 }
567
568 static __u8 root_hub_hub_des[] = {
569 0x09, /* __u8 bLength; */
570 0x29, /* __u8 bDescriptorType; Hub-descriptor */
571 0x02, /* __u8 bNbrPorts; */
572 0x0a, 0x00, /* __u16 wHubCharacteristics; */
573 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
574 0x00, /* __u8 bHubContrCurrent; 0mA */
575 0x00, /* __u8 DeviceRemovable; */
576 0xff, /* __u8 PortPwrCtrlMask; */
577 };
578
579 static int admhcd_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
580 u16 wIndex, char *buf, u16 wLength)
581 {
582 struct admhcd *ahcd = hcd_to_admhcd(hcd);
583 int retval = 0, len;
584 unsigned int port = wIndex -1;
585
586 switch (typeReq) {
587
588 case GetHubStatus:
589 *(__le32 *)buf = cpu_to_le32(0);
590 break;
591 case GetPortStatus:
592 if (port >= ADMHCD_NUMPORTS)
593 goto err;
594 *(__le32 *)buf = cpu_to_le32(
595 admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4));
596 break;
597 case SetHubFeature: /* We don't implement these */
598 case ClearHubFeature:
599 switch (wValue) {
600 case C_HUB_OVER_CURRENT:
601 case C_HUB_LOCAL_POWER:
602 break;
603 default:
604 goto err;
605 }
606 case SetPortFeature:
607 if (port >= ADMHCD_NUMPORTS)
608 goto err;
609
610 switch (wValue) {
611 case USB_PORT_FEAT_SUSPEND:
612 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
613 ADMHCD_PSS);
614 break;
615 case USB_PORT_FEAT_RESET:
616 if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4)
617 & ADMHCD_CCS) {
618 admhcd_reg_set(ahcd,
619 ADMHCD_REG_PORTSTATUS0 + port*4,
620 ADMHCD_PRS | ADMHCD_CSC);
621 mdelay(50);
622 admhcd_reg_set(ahcd,
623 ADMHCD_REG_PORTSTATUS0 + port*4,
624 ADMHCD_PES | ADMHCD_CSC);
625 }
626 break;
627 case USB_PORT_FEAT_POWER:
628 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
629 ADMHCD_PPS);
630 break;
631 default:
632 goto err;
633 }
634 break;
635 case ClearPortFeature:
636 if (port >= ADMHCD_NUMPORTS)
637 goto err;
638
639 switch (wValue) {
640 case USB_PORT_FEAT_ENABLE:
641 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
642 ADMHCD_CCS);
643 break;
644 case USB_PORT_FEAT_C_ENABLE:
645 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
646 ADMHCD_PESC);
647 break;
648 case USB_PORT_FEAT_SUSPEND:
649 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
650 ADMHCD_POCI);
651 break;
652 case USB_PORT_FEAT_C_SUSPEND:
653 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
654 ADMHCD_PSSC);
655 case USB_PORT_FEAT_POWER:
656 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
657 ADMHCD_LSDA);
658 break;
659 case USB_PORT_FEAT_C_CONNECTION:
660 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
661 ADMHCD_CSC);
662 break;
663 case USB_PORT_FEAT_C_OVER_CURRENT:
664 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
665 ADMHCD_OCIC);
666 break;
667 case USB_PORT_FEAT_C_RESET:
668 admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
669 ADMHCD_PRSC);
670 break;
671 default:
672 goto err;
673 }
674 break;
675 case GetHubDescriptor:
676 len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
677 memcpy(buf, root_hub_hub_des, len);
678 break;
679 default:
680 err:
681 retval = -EPIPE;
682 }
683
684 return retval;
685 }
686
687 static struct hc_driver adm5120_hc_driver = {
688 .description = hcd_name,
689 .product_desc = "ADM5120 HCD",
690 .hcd_priv_size = sizeof(struct admhcd),
691 .irq = adm5120hcd_irq,
692 .flags = HCD_USB11,
693 .urb_enqueue = admhcd_urb_enqueue,
694 .urb_dequeue = admhcd_urb_dequeue,
695 .endpoint_disable = admhcd_endpoint_disable,
696 .get_frame_number = admhcd_get_frame_number,
697 .hub_status_data = admhcd_hub_status_data,
698 .hub_control = admhcd_hub_control,
699 };
700
701 #define resource_len(r) (((r)->end - (r)->start) + 1)
702
703 static int __init adm5120hcd_probe(struct platform_device *pdev)
704 {
705 struct usb_hcd *hcd;
706 struct admhcd *ahcd;
707 struct resource *addr, *data;
708 void __iomem *addr_reg;
709 void __iomem *data_reg;
710
711 int err = 0, irq;
712
713 if (pdev->num_resources < 3) {
714 err = -ENODEV;
715 goto out;
716 }
717
718 if (pdev->dev.dma_mask) {
719 printk(KERN_DEBUG "no we won't dma\n");
720 return -EINVAL;
721 }
722
723 irq = platform_get_irq(pdev, 0);
724 data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
725 addr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
726
727 if (!addr || !data || irq < 0) {
728 err = -ENODEV;
729 goto out;
730 }
731
732 if (!request_mem_region(addr->start, 2, hcd_name)) {
733 err = -EBUSY;
734 goto out;
735 }
736
737 addr_reg = ioremap(addr->start, resource_len(addr));
738 if (addr_reg == NULL) {
739 err = -ENOMEM;
740 goto out_mem;
741 }
742 if (!request_mem_region(data->start, 2, hcd_name)) {
743 err = -EBUSY;
744 goto out_unmap;
745 }
746
747 data_reg = ioremap(data->start, resource_len(data));
748 if (data_reg == NULL) {
749 err = -ENOMEM;
750 goto out_mem;
751 }
752
753 hcd = usb_create_hcd(&adm5120_hc_driver, &pdev->dev, pdev->dev.bus_id);
754 if (!hcd)
755 goto out_mem;
756
757 hcd->rsrc_start = addr->start;
758 ahcd = hcd_to_admhcd(hcd);
759
760 spin_lock_init(&ahcd->lock);
761 INIT_LIST_HEAD(&ahcd->async);
762
763 ahcd->data_reg = data_reg;
764 ahcd->addr_reg = addr_reg;
765
766 hcd->product_desc = "ADM5120 HCD";
767
768 /* Initialise the HCD registers */
769 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
770 mdelay(10);
771
772 admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_SW_RESET);
773
774 while (admhcd_reg_get(ahcd, ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET)
775 mdelay(1);
776
777 admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_HOST_EN);
778 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0x00000000);
779 admhcd_reg_set(ahcd, ADMHCD_REG_FMINTERVAL, 0x20002edf);
780 admhcd_reg_set(ahcd, ADMHCD_REG_LSTHRESH, 0x628);
781 admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE,
782 ADMHCD_INT_ACT | ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
783 admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS,
784 ADMHCD_INT_ACT | ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
785 admhcd_reg_set(ahcd, ADMHCD_REG_RHDESCR, ADMHCD_NPS | ADMHCD_LPSC);
786 admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
787
788 err = usb_add_hcd(hcd, irq, IRQF_DISABLED);
789 if (err)
790 goto out_dev;
791
792 return 0;
793
794 out_dev:
795 usb_put_hcd(hcd);
796 out_unmap:
797 iounmap(addr_reg);
798 out_mem:
799 release_mem_region(pdev->resource[0].start, pdev->resource[0].end - pdev->resource[0].start);
800 out:
801 return err;
802 }
803
804 static int __init_or_module adm5120hcd_remove(struct platform_device *pdev)
805 {
806 struct usb_hcd *hcd = platform_get_drvdata(pdev);
807 struct admhcd *ahcd;
808
809 if (!hcd)
810 return 0;
811 ahcd = hcd_to_admhcd(hcd);
812 usb_remove_hcd(hcd);
813
814 usb_put_hcd(hcd);
815 return 0;
816 }
817
818 static struct platform_driver adm5120hcd_driver = {
819 .probe = adm5120hcd_probe,
820 .remove = adm5120hcd_remove,
821 .driver = {
822 .name = "adm5120-hcd",
823 .owner = THIS_MODULE,
824 },
825 };
826
827 static int __init adm5120hcd_init(void)
828 {
829 if (usb_disabled())
830 return -ENODEV;
831 if (!adm5120_board.has_usb)
832 return -ENODEV;
833
834 return platform_driver_register(&adm5120hcd_driver);
835 }
836
837 static void __exit adm5120hcd_exit(void)
838 {
839 platform_driver_unregister(&adm5120hcd_driver);
840 }
841
842 module_init(adm5120hcd_init);
843 module_exit(adm5120hcd_exit);
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