2 * Atheros AR71xx SoC platform devices
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * Parts of this file are based on Atheros' 2.6.15 BSP
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/platform_device.h>
19 #include <linux/serial_8250.h>
21 #include <asm/mips_machine.h>
22 #include <asm/mach-ar71xx/ar71xx.h>
23 #include <asm/mach-ar71xx/platform.h>
25 static u8 ar71xx_mac_base
[ETH_ALEN
] __initdata
;
28 * OHCI (USB full speed host controller)
30 static struct resource ar71xx_usb_ohci_resources
[] = {
32 .start
= AR71XX_OHCI_BASE
,
33 .end
= AR71XX_OHCI_BASE
+ AR71XX_OHCI_SIZE
- 1,
34 .flags
= IORESOURCE_MEM
,
37 .start
= AR71XX_MISC_IRQ_OHCI
,
38 .end
= AR71XX_MISC_IRQ_OHCI
,
39 .flags
= IORESOURCE_IRQ
,
43 static u64 ar71xx_ohci_dmamask
= DMA_BIT_MASK(32);
44 static struct platform_device ar71xx_usb_ohci_device
= {
45 .name
= "ar71xx-ohci",
47 .resource
= ar71xx_usb_ohci_resources
,
48 .num_resources
= ARRAY_SIZE(ar71xx_usb_ohci_resources
),
50 .dma_mask
= &ar71xx_ohci_dmamask
,
51 .coherent_dma_mask
= DMA_BIT_MASK(32),
56 * EHCI (USB full speed host controller)
58 static struct resource ar71xx_usb_ehci_resources
[] = {
60 .start
= AR71XX_EHCI_BASE
,
61 .end
= AR71XX_EHCI_BASE
+ AR71XX_EHCI_SIZE
- 1,
62 .flags
= IORESOURCE_MEM
,
65 .start
= AR71XX_CPU_IRQ_USB
,
66 .end
= AR71XX_CPU_IRQ_USB
,
67 .flags
= IORESOURCE_IRQ
,
71 static u64 ar71xx_ehci_dmamask
= DMA_BIT_MASK(32);
72 static struct platform_device ar71xx_usb_ehci_device
= {
73 .name
= "ar71xx-ehci",
75 .resource
= ar71xx_usb_ehci_resources
,
76 .num_resources
= ARRAY_SIZE(ar71xx_usb_ehci_resources
),
78 .dma_mask
= &ar71xx_ehci_dmamask
,
79 .coherent_dma_mask
= DMA_BIT_MASK(32),
83 #define AR71XX_USB_RESET_MASK \
84 (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
85 | RESET_MODULE_USB_OHCI_DLL)
87 void __init
ar71xx_add_device_usb(void)
89 ar71xx_device_stop(AR71XX_USB_RESET_MASK
);
91 ar71xx_device_start(AR71XX_USB_RESET_MASK
);
93 /* Turning on the Buff and Desc swap bits */
94 ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG
, 0xf0000);
96 /* WAR for HW bug. Here it adjusts the duration between two SOFS */
97 ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ
, 0x20c00);
101 platform_device_register(&ar71xx_usb_ohci_device
);
102 platform_device_register(&ar71xx_usb_ehci_device
);
105 #ifdef CONFIG_AR71XX_EARLY_SERIAL
106 static void __init
ar71xx_add_device_uart(void) {};
108 static struct resource ar71xx_uart_resources
[] = {
110 .start
= AR71XX_UART_BASE
,
111 .end
= AR71XX_UART_BASE
+ AR71XX_UART_SIZE
- 1,
112 .flags
= IORESOURCE_MEM
,
116 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
117 static struct plat_serial8250_port ar71xx_uart_data
[] = {
119 .mapbase
= AR71XX_UART_BASE
,
120 .irq
= AR71XX_MISC_IRQ_UART
,
121 .flags
= AR71XX_UART_FLAGS
,
122 .iotype
= UPIO_MEM32
,
125 /* terminating entry */
129 static struct platform_device ar71xx_uart_device
= {
130 .name
= "serial8250",
131 .id
= PLAT8250_DEV_PLATFORM
,
132 .resource
= ar71xx_uart_resources
,
133 .num_resources
= ARRAY_SIZE(ar71xx_uart_resources
),
135 .platform_data
= ar71xx_uart_data
139 static void __init
ar71xx_add_device_uart(void)
141 ar71xx_uart_data
[0].uartclk
= ar71xx_ahb_freq
;
142 platform_device_register(&ar71xx_uart_device
);
144 #endif /* CONFIG_AR71XX_EARLY_SERIAL */
146 static struct resource ar71xx_eth0_resources
[] = {
149 .flags
= IORESOURCE_MEM
,
150 .start
= AR71XX_GE0_BASE
,
151 .end
= AR71XX_GE0_BASE
+ AR71XX_GE0_SIZE
- 1,
154 .flags
= IORESOURCE_MEM
,
155 .start
= AR71XX_MII_BASE
+ MII_REG_MII0_CTRL
,
156 .end
= AR71XX_MII_BASE
+ MII_REG_MII0_CTRL
+ 3,
159 .flags
= IORESOURCE_IRQ
,
160 .start
= AR71XX_CPU_IRQ_GE0
,
161 .end
= AR71XX_CPU_IRQ_GE0
,
165 static struct ag71xx_platform_data ar71xx_eth0_data
= {
166 .reset_bit
= RESET_MODULE_GE0_MAC
,
167 .flush_reg
= DDR_REG_FLUSH_GE0
,
170 static struct platform_device ar71xx_eth0_device
= {
173 .resource
= ar71xx_eth0_resources
,
174 .num_resources
= ARRAY_SIZE(ar71xx_eth0_resources
),
176 .platform_data
= &ar71xx_eth0_data
,
180 static struct resource ar71xx_eth1_resources
[] = {
183 .flags
= IORESOURCE_MEM
,
184 .start
= AR71XX_GE1_BASE
,
185 .end
= AR71XX_GE1_BASE
+ AR71XX_GE1_SIZE
- 1,
188 .flags
= IORESOURCE_MEM
,
189 .start
= AR71XX_MII_BASE
+ MII_REG_MII1_CTRL
,
190 .end
= AR71XX_MII_BASE
+ MII_REG_MII1_CTRL
+ 3,
193 .flags
= IORESOURCE_IRQ
,
194 .start
= AR71XX_CPU_IRQ_GE1
,
195 .end
= AR71XX_CPU_IRQ_GE1
,
199 static struct ag71xx_platform_data ar71xx_eth1_data
= {
200 .reset_bit
= RESET_MODULE_GE1_MAC
,
201 .flush_reg
= DDR_REG_FLUSH_GE1
,
204 static struct platform_device ar71xx_eth1_device
= {
207 .resource
= ar71xx_eth1_resources
,
208 .num_resources
= ARRAY_SIZE(ar71xx_eth1_resources
),
210 .platform_data
= &ar71xx_eth1_data
,
214 void __init
ar71xx_add_device_eth(unsigned int id
, phy_interface_t phy_if_mode
,
217 struct platform_device
*pdev
;
221 switch (phy_if_mode
) {
222 case PHY_INTERFACE_MODE_MII
:
223 ar71xx_eth0_data
.mii_if
= MII0_CTRL_IF_MII
;
225 case PHY_INTERFACE_MODE_GMII
:
226 ar71xx_eth0_data
.mii_if
= MII0_CTRL_IF_GMII
;
228 case PHY_INTERFACE_MODE_RGMII
:
229 ar71xx_eth0_data
.mii_if
= MII0_CTRL_IF_RGMII
;
231 case PHY_INTERFACE_MODE_RMII
:
232 ar71xx_eth0_data
.mii_if
= MII0_CTRL_IF_RMII
;
237 memcpy(ar71xx_eth0_data
.mac_addr
, ar71xx_mac_base
, ETH_ALEN
);
238 ar71xx_eth0_data
.phy_if_mode
= phy_if_mode
;
239 ar71xx_eth0_data
.phy_mask
= phy_mask
;
240 pdev
= &ar71xx_eth0_device
;
243 switch (phy_if_mode
) {
244 case PHY_INTERFACE_MODE_RMII
:
245 ar71xx_eth1_data
.mii_if
= MII1_CTRL_IF_RMII
;
247 case PHY_INTERFACE_MODE_RGMII
:
248 ar71xx_eth1_data
.mii_if
= MII1_CTRL_IF_RGMII
;
253 memcpy(ar71xx_eth1_data
.mac_addr
, ar71xx_mac_base
, ETH_ALEN
);
254 ar71xx_eth1_data
.mac_addr
[5] += id
;
255 ar71xx_eth1_data
.phy_if_mode
= phy_if_mode
;
256 ar71xx_eth1_data
.phy_mask
= phy_mask
;
257 pdev
= &ar71xx_eth1_device
;
265 platform_device_register(pdev
);
268 static struct resource ar71xx_spi_resources
[] = {
270 .start
= AR71XX_SPI_BASE
,
271 .end
= AR71XX_SPI_BASE
+ AR71XX_SPI_SIZE
- 1,
272 .flags
= IORESOURCE_MEM
,
276 static struct platform_device ar71xx_spi_device
= {
277 .name
= "ar71xx-spi",
279 .resource
= ar71xx_spi_resources
,
280 .num_resources
= ARRAY_SIZE(ar71xx_spi_resources
),
283 void __init
ar71xx_add_device_spi(struct ar71xx_spi_platform_data
*pdata
,
284 struct spi_board_info
const *info
,
287 ar71xx_gpio_function_enable(GPIO_FUNC_SPI_EN
);
289 spi_register_board_info(info
, n
);
290 ar71xx_spi_device
.dev
.platform_data
= pdata
;
291 platform_device_register(&ar71xx_spi_device
);
294 void __init
ar71xx_set_mac_base(char *mac_str
)
299 t
= sscanf(mac_str
, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
300 &tmp
[0], &tmp
[1], &tmp
[2], &tmp
[3], &tmp
[4], &tmp
[5]);
303 memcpy(ar71xx_mac_base
, tmp
, ETH_ALEN
);
305 printk(KERN_DEBUG
"AR71XX: failed to parse mac address "
306 "\"%s\"\n", mac_str
);
309 static int __init
ar71xx_machine_setup(void)
311 ar71xx_print_cmdline();
315 ar71xx_add_device_uart();
317 mips_machine_setup();
321 arch_initcall(ar71xx_machine_setup
);