2 * D-Link DIR-825 rev. C1 board support
4 * Copyright (C) 2013 Alexander Stadler
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
11 #include <linux/pci.h>
12 #include <linux/phy.h>
13 #include <linux/gpio.h>
14 #include <linux/platform_device.h>
15 #include <linux/ath9k_platform.h>
16 #include <linux/ar8216_platform.h>
18 #include <asm/mach-ath79/ar71xx_regs.h>
21 #include "dev-ap9x-pci.h"
23 #include "dev-gpio-buttons.h"
24 #include "dev-leds-gpio.h"
25 #include "dev-m25p80.h"
29 #include "machtypes.h"
31 #define DIR825C1_GPIO_LED_BLUE_USB 11
32 #define DIR825C1_GPIO_LED_AMBER_POWER 14
33 #define DIR825C1_GPIO_LED_BLUE_POWER 22
34 #define DIR825C1_GPIO_LED_BLUE_WPS 15
35 #define DIR825C1_GPIO_LED_AMBER_PLANET 19
36 #define DIR825C1_GPIO_LED_BLUE_PLANET 18
37 #define DIR825C1_GPIO_LED_WLAN_2G 13
39 #define DIR825C1_GPIO_WAN_LED_ENABLE 20
41 #define DIR825C1_GPIO_BTN_RESET 17
42 #define DIR825C1_GPIO_BTN_WPS 16
44 #define DIR825C1_KEYS_POLL_INTERVAL 20 /* msecs */
45 #define DIR825C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825C1_KEYS_POLL_INTERVAL)
47 #define DIR825C1_MAC0_OFFSET 0x4
48 #define DIR825C1_MAC1_OFFSET 0x18
49 #define DIR825C1_WMAC_CALDATA_OFFSET 0x1000
50 #define DIR825C1_PCIE_CALDATA_OFFSET 0x5000
52 static struct gpio_led dir825c1_leds_gpio
[] __initdata
= {
54 .name
= "d-link:blue:usb",
55 .gpio
= DIR825C1_GPIO_LED_BLUE_USB
,
59 .name
= "d-link:amber:power",
60 .gpio
= DIR825C1_GPIO_LED_AMBER_POWER
,
64 .name
= "d-link:blue:power",
65 .gpio
= DIR825C1_GPIO_LED_BLUE_POWER
,
69 .name
= "d-link:blue:wps",
70 .gpio
= DIR825C1_GPIO_LED_BLUE_WPS
,
74 .name
= "d-link:amber:planet",
75 .gpio
= DIR825C1_GPIO_LED_AMBER_PLANET
,
79 .name
= "d-link:blue:wlan2g",
80 .gpio
= DIR825C1_GPIO_LED_WLAN_2G
,
85 static struct gpio_led dir835a1_leds_gpio
[] __initdata
= {
87 .name
= "d-link:amber:power",
88 .gpio
= DIR825C1_GPIO_LED_AMBER_POWER
,
92 .name
= "d-link:green:power",
93 .gpio
= DIR825C1_GPIO_LED_BLUE_POWER
,
97 .name
= "d-link:blue:wps",
98 .gpio
= DIR825C1_GPIO_LED_BLUE_WPS
,
102 .name
= "d-link:amber:planet",
103 .gpio
= DIR825C1_GPIO_LED_AMBER_PLANET
,
107 .name
= "d-link:green:planet",
108 .gpio
= DIR825C1_GPIO_LED_BLUE_PLANET
,
113 static struct gpio_keys_button dir825c1_gpio_keys
[] __initdata
= {
115 .desc
= "Soft reset",
118 .debounce_interval
= DIR825C1_KEYS_DEBOUNCE_INTERVAL
,
119 .gpio
= DIR825C1_GPIO_BTN_RESET
,
123 .desc
= "WPS button",
125 .code
= KEY_WPS_BUTTON
,
126 .debounce_interval
= DIR825C1_KEYS_DEBOUNCE_INTERVAL
,
127 .gpio
= DIR825C1_GPIO_BTN_WPS
,
132 static struct ar8327_pad_cfg dir825c1_ar8327_pad0_cfg
= {
133 .mode
= AR8327_PAD_MAC_RGMII
,
134 .txclk_delay_en
= true,
135 .rxclk_delay_en
= true,
136 .txclk_delay_sel
= AR8327_CLK_DELAY_SEL1
,
137 .rxclk_delay_sel
= AR8327_CLK_DELAY_SEL2
,
140 static struct ar8327_led_cfg dir825c1_ar8327_led_cfg
= {
141 .led_ctrl0
= 0x00000000,
142 .led_ctrl1
= 0xc737c737,
143 .led_ctrl2
= 0x00000000,
144 .led_ctrl3
= 0x00c30c00,
148 static struct ar8327_platform_data dir825c1_ar8327_data
= {
149 .pad0_cfg
= &dir825c1_ar8327_pad0_cfg
,
152 .speed
= AR8327_PORT_SPEED_1000
,
157 .led_cfg
= &dir825c1_ar8327_led_cfg
,
160 static struct mdio_board_info dir825c1_mdio0_info
[] = {
162 .bus_id
= "ag71xx-mdio.0",
164 .platform_data
= &dir825c1_ar8327_data
,
168 static void __init
dir825c1_generic_setup(void)
170 u8
*mac
= (u8
*) KSEG1ADDR(0x1ffe0000);
171 u8
*art
= (u8
*) KSEG1ADDR(0x1fff0000);
172 u8 mac0
[ETH_ALEN
], mac1
[ETH_ALEN
];
173 u8 wmac0
[ETH_ALEN
], wmac1
[ETH_ALEN
];
175 ath79_parse_ascii_mac(mac
+ DIR825C1_MAC0_OFFSET
, mac0
);
176 ath79_parse_ascii_mac(mac
+ DIR825C1_MAC1_OFFSET
, mac1
);
178 ath79_register_m25p80(NULL
);
180 ath79_register_gpio_keys_polled(-1, DIR825C1_KEYS_POLL_INTERVAL
,
181 ARRAY_SIZE(dir825c1_gpio_keys
),
184 ath79_init_mac(wmac0
, mac0
, 0);
185 ath79_register_wmac(art
+ DIR825C1_WMAC_CALDATA_OFFSET
, wmac0
);
187 ath79_init_mac(wmac1
, mac1
, 1);
188 ap91_pci_init(art
+ DIR825C1_PCIE_CALDATA_OFFSET
, wmac1
);
190 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0
);
192 mdiobus_register_board_info(dir825c1_mdio0_info
,
193 ARRAY_SIZE(dir825c1_mdio0_info
));
195 ath79_register_mdio(0, 0x0);
197 ath79_init_mac(ath79_eth0_data
.mac_addr
, mac0
, 0);
199 /* GMAC0 is connected to an AR8327N switch */
200 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
201 ath79_eth0_data
.phy_mask
= BIT(0);
202 ath79_eth0_data
.mii_bus_dev
= &ath79_mdio0_device
.dev
;
203 ath79_eth0_pll_data
.pll_1000
= 0x06000000;
204 ath79_register_eth(0);
206 ath79_register_usb();
209 static void __init
dir825c1_setup(void)
211 ath79_gpio_output_select(DIR825C1_GPIO_LED_BLUE_USB
,
212 AR934X_GPIO_OUT_GPIO
);
214 gpio_request_one(DIR825C1_GPIO_WAN_LED_ENABLE
,
215 GPIOF_OUT_INIT_LOW
, "WAN LED enable");
217 ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825c1_leds_gpio
),
220 ap9x_pci_setup_wmac_led_pin(0, 13);
221 ap9x_pci_setup_wmac_led_pin(1, 32);
223 dir825c1_generic_setup();
226 static void __init
dir835a1_setup(void)
228 dir825c1_ar8327_data
.led_cfg
= NULL
;
230 ath79_register_leds_gpio(-1, ARRAY_SIZE(dir835a1_leds_gpio
),
233 dir825c1_generic_setup();
236 MIPS_MACHINE(ATH79_MACH_DIR_825_C1
, "DIR-825-C1",
237 "D-Link DIR-825 rev. C1",
240 MIPS_MACHINE(ATH79_MACH_DIR_835_A1
, "DIR-835-A1",
241 "D-Link DIR-835 rev. A1",