target/linux/ar71xx/patches-4.1/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch

   1 --- a/arch/mips/ath79/gpio.c
   2 +++ b/arch/mips/ath79/gpio.c
   3 @@ -186,6 +186,7 @@ static void __iomem *ath79_gpio_get_func
   4                 reg = AR71XX_GPIO_REG_FUNC;
   5         else if (soc_is_ar934x() ||
   6                  soc_is_qca953x() ||
   7 +                soc_is_qca955x() ||
   8                  soc_is_qca956x() ||
   9                  soc_is_tp9343())
  10                 reg = AR934X_GPIO_REG_FUNC;
  11 @@ -223,15 +224,30 @@ void __init ath79_gpio_output_select(uns
  12  {
  13         void __iomem *base = ath79_gpio_base;
  14         unsigned long flags;
  15 -       unsigned int reg;
  16 +       unsigned int reg, reg_base;
  17 +       unsigned long gpio_count;
  18         u32 t, s;
  19
  20 -       BUG_ON(!soc_is_ar934x() && !soc_is_qca953x() && !soc_is_qca956x());
  21 +       if (soc_is_ar934x()) {
  22 +               gpio_count = AR934X_GPIO_COUNT;
  23 +               reg_base = AR934X_GPIO_REG_OUT_FUNC0;
  24 +       } else if (soc_is_qca953x()) {
  25 +               gpio_count = QCA953X_GPIO_COUNT;
  26 +               reg_base = QCA953X_GPIO_REG_OUT_FUNC0;
  27 +       } else if (soc_is_qca955x()) {
  28 +               gpio_count = QCA955X_GPIO_COUNT;
  29 +               reg_base = QCA955X_GPIO_REG_OUT_FUNC0;
  30 +       } else if (soc_is_qca956x()) {
  31 +               gpio_count = QCA956X_GPIO_COUNT;
  32 +               reg_base = QCA956X_GPIO_REG_OUT_FUNC0;
  33 +       } else {
  34 +               BUG();
  35 +       }
  36
  37 -       if (gpio >= AR934X_GPIO_COUNT)
  38 +       if (gpio >= gpio_count)
  39                 return;
  40
  41 -       reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4);
  42 +       reg = reg_base + 4 * (gpio / 4);
  43         s = 8 * (gpio % 4);
  44
  45         spin_lock_irqsave(&ath79_gpio_lock, flags);
  46 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
  47 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
  48 @@ -875,6 +875,14 @@
  49  #define QCA953X_GPIO_OUT_MUX_LED_LINK4         44
  50  #define QCA953X_GPIO_OUT_MUX_LED_LINK5         45
  51
  52 +#define QCA955X_GPIO_REG_OUT_FUNC0     0x2c
  53 +#define QCA955X_GPIO_REG_OUT_FUNC1     0x30
  54 +#define QCA955X_GPIO_REG_OUT_FUNC2     0x34
  55 +#define QCA955X_GPIO_REG_OUT_FUNC3     0x38
  56 +#define QCA955X_GPIO_REG_OUT_FUNC4     0x3c
  57 +#define QCA955X_GPIO_REG_OUT_FUNC5     0x40
  58 +#define QCA955X_GPIO_REG_FUNC          0x6c
  59 +
  60  #define QCA956X_GPIO_REG_OUT_FUNC0     0x2c
  61  #define QCA956X_GPIO_REG_OUT_FUNC1     0x30
  62  #define QCA956X_GPIO_REG_OUT_FUNC2     0x34
  63 @@ -1014,6 +1022,8 @@
  64  #define AR934X_GPIO_OUT_EXT_LNA0       46
  65  #define AR934X_GPIO_OUT_EXT_LNA1       47
  66
  67 +#define QCA955X_GPIO_OUT_GPIO          0
  68 +
  69  /*
  70   * MII_CTRL block
  71   */