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[openwrt/svn-archive/archive.git] / target / linux / at91 / patches-2.6.25 / 000-at91patches.patch
1 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/Kconfig linux-2.6/arch/arm/mach-at91/Kconfig
2 --- linux-2.6.25/arch/arm/mach-at91/Kconfig 2008-05-03 00:15:44.000000000 +0200
3 +++ linux-2.6/arch/arm/mach-at91/Kconfig 2008-04-25 21:15:43.000000000 +0200
4 @@ -12,18 +12,28 @@
5
6 config ARCH_AT91SAM9260
7 bool "AT91SAM9260 or AT91SAM9XE"
8 + select GENERIC_TIME
9 + select GENERIC_CLOCKEVENTS
10
11 config ARCH_AT91SAM9261
12 bool "AT91SAM9261"
13 + select GENERIC_TIME
14 + select GENERIC_CLOCKEVENTS
15
16 config ARCH_AT91SAM9263
17 bool "AT91SAM9263"
18 + select GENERIC_TIME
19 + select GENERIC_CLOCKEVENTS
20
21 config ARCH_AT91SAM9RL
22 bool "AT91SAM9RL"
23 + select GENERIC_TIME
24 + select GENERIC_CLOCKEVENTS
25
26 config ARCH_AT91CAP9
27 bool "AT91CAP9"
28 + select GENERIC_TIME
29 + select GENERIC_CLOCKEVENTS
30
31 config ARCH_AT91X40
32 bool "AT91x40"
33 @@ -45,7 +55,7 @@
34 depends on ARCH_AT91RM9200
35 help
36 Select this if you are using Ajeco's 1ARM Single Board Computer.
37 - <http://www.ajeco.fi/products.htm>
38 + <http://www.ajeco.fi/eng/products_e.htm>
39
40 config ARCH_AT91RM9200DK
41 bool "Atmel AT91RM9200-DK Development board"
42 @@ -94,7 +104,7 @@
43 depends on ARCH_AT91RM9200
44 help
45 Select this if you are using KwikByte's KB920x board.
46 - <http://kwikbyte.com/KB9202_description_new.htm>
47 + <http://www.kwikbyte.com/KB9202.html>
48
49 config MACH_PICOTUX2XX
50 bool "picotux 200"
51 @@ -109,6 +119,38 @@
52 help
53 Select this if you are using Sperry-Sun's KAFA board.
54
55 +config MACH_CHUB
56 + bool "Promwad Chub board"
57 + depends on ARCH_AT91RM9200
58 + help
59 + Select this if you are using Promwad's Chub board.
60 +
61 +config MACH_HOMEMATIC
62 + bool "eQ-3 HomeMatic"
63 + depends on ARCH_AT91RM9200
64 + help
65 + Select this if you are using eQ-3's HomeMatic device.
66 + <http://www.eq-3.com>
67 +
68 +config MACH_ECBAT91
69 + bool "emQbit ECB_AT91 SBC"
70 + depends on ARCH_AT91RM9200
71 + help
72 + Select this if you are using emQbit's ECB_AT91 board.
73 + <http://wiki.emqbit.com/free-ecb-at91>
74 +
75 +config MACH_SWEDATMS
76 + bool "Sweda TMS Board"
77 + depends on ARCH_AT91RM9200
78 + help
79 + Select this if you are using Sweda TMS-100 board.
80 +
81 +config MACH_TT9200
82 + bool "Toptech TT9200"
83 + depends on ARCH_AT91RM9200
84 + help
85 + Select this if you are using Toptech's TT9200 board.
86 +
87 endif
88
89 # ----------------------------------------------------------
90 @@ -133,6 +175,34 @@
91 Select this if you are using Atmel's AT91SAM9260-EK or AT91SAM9XE Evaluation Kit
92 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3933>
93
94 +config MACH_CAM60
95 + bool "KwikByte KB9260 (CAM60) board"
96 + depends on ARCH_AT91SAM9260
97 + help
98 + Select this if you are using KwikByte's KB9260 (CAM60) board based on the Atmel AT91SAM9260.
99 + <http://www.kwikbyte.com/KB9260.html>
100 +
101 +config MACH_SAM9_L9260
102 + bool "Olimex SAM9-L9260 board"
103 + depends on ARCH_AT91SAM9260
104 + help
105 + Select this if you are using Olimex's SAM9-L9260 board based on the Atmel AT91SAM9260.
106 + <http://www.olimex.com/dev/sam9-L9260.html>
107 +
108 +config MACH_USB_A9260
109 + bool "CALAO USB-A9260"
110 + depends on ARCH_AT91SAM9260
111 + help
112 + Select this if you are using a Calao Systems USB-A9260.
113 + <http://www.calao-systems.com>
114 +
115 +config MACH_QIL_A9260
116 + bool "CALAO QIL-A9260 board"
117 + depends on ARCH_AT91SAM9260
118 + help
119 + Select this if you are using a Calao Systems QIL-A9260 Board.
120 + <http://www.calao-systems.com>
121 +
122 endif
123
124 # ----------------------------------------------------------
125 @@ -163,6 +233,13 @@
126 Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
127 <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
128
129 +config MACH_USB_A9263
130 + bool "CALAO USB-A9263"
131 + depends on ARCH_AT91SAM9263
132 + help
133 + Select this if you are using a Calao Systems USB-A9263.
134 + <http://www.calao-systems.com>
135 +
136 endif
137
138 # ----------------------------------------------------------
139 @@ -216,7 +293,7 @@
140
141 config MTD_AT91_DATAFLASH_CARD
142 bool "Enable DataFlash Card support"
143 - depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91CAP9ADK)
144 + depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_ECBAT91 || MACH_SAM9_L9260 || MACH_AT91CAP9ADK)
145 help
146 Enable support for the DataFlash card.
147
148 @@ -237,6 +314,19 @@
149 Select this if you need to program one or more of the PCK0..PCK3
150 programmable clock outputs.
151
152 +config AT91_SLOW_CLOCK
153 + bool "Suspend-to-RAM disables main oscillator"
154 + depends on SUSPEND
155 + help
156 + Select this if you want Suspend-to-RAM to save the most power
157 + possible (without powering off the CPU) by disabling the PLLs
158 + and main oscillator so that only the 32 KiHz clock is available.
159 +
160 + When only that slow-clock is available, some peripherals lose
161 + functionality. Many can't issue wakeup events unless faster
162 + clocks are available. Some lose their operating state and
163 + need to be completely re-initialized.
164 +
165 config AT91_TIMER_HZ
166 int "Kernel HZ (jiffies per second)"
167 range 32 1024
168 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/Makefile linux-2.6/arch/arm/mach-at91/Makefile
169 --- linux-2.6.25/arch/arm/mach-at91/Makefile 2008-05-03 00:15:44.000000000 +0200
170 +++ linux-2.6/arch/arm/mach-at91/Makefile 2008-04-25 21:15:43.000000000 +0200
171 @@ -28,16 +28,26 @@
172 obj-$(CONFIG_MACH_KB9200) += board-kb9202.o
173 obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o
174 obj-$(CONFIG_MACH_KAFA) += board-kafa.o
175 +obj-$(CONFIG_MACH_CHUB) += board-chub.o
176 obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o
177 +obj-$(CONFIG_MACH_HOMEMATIC) += board-homematic.o
178 +obj-$(CONFIG_MACH_ECBAT91) += board-ecbat91.o
179 +obj-$(CONFIG_MACH_SWEDATMS) += board-tms.o
180 +obj-$(CONFIG_MACH_TT9200) += board-tt9200.o
181
182 # AT91SAM9260 board-specific support
183 obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o
184 +obj-$(CONFIG_MACH_CAM60) += board-cam60.o
185 +obj-$(CONFIG_MACH_SAM9_L9260) += board-sam9-l9260.o
186 +obj-$(CONFIG_MACH_USB_A9260) += board-usb-a9260.o
187 +obj-$(CONFIG_MACH_QIL_A9260) += board-qil-a9260.o
188
189 # AT91SAM9261 board-specific support
190 obj-$(CONFIG_MACH_AT91SAM9261EK) += board-sam9261ek.o
191
192 # AT91SAM9263 board-specific support
193 obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o
194 +obj-$(CONFIG_MACH_USB_A9263) += board-usb-a9263.o
195
196 # AT91SAM9RL board-specific support
197 obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o
198 @@ -50,9 +60,11 @@
199
200 # Drivers
201 obj-y += leds.o
202 +obj-$(CONFIG_FB_S1D13XXX) += ics1523.o
203
204 # Power Management
205 obj-$(CONFIG_PM) += pm.o
206 +obj-$(CONFIG_AT91_SLOW_CLOCK) += pm_slowclock.o
207
208 ifeq ($(CONFIG_PM_DEBUG),y)
209 CFLAGS_pm.o += -DDEBUG
210 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/at91cap9.c linux-2.6/arch/arm/mach-at91/at91cap9.c
211 --- linux-2.6.25/arch/arm/mach-at91/at91cap9.c 2008-05-03 00:15:44.000000000 +0200
212 +++ linux-2.6/arch/arm/mach-at91/at91cap9.c 2008-05-05 22:01:39.000000000 +0200
213 @@ -13,12 +13,15 @@
214 */
215
216 #include <linux/module.h>
217 +#include <linux/pm.h>
218
219 #include <asm/mach/arch.h>
220 #include <asm/mach/map.h>
221 +#include <asm/arch/cpu.h>
222 #include <asm/arch/at91cap9.h>
223 #include <asm/arch/at91_pmc.h>
224 #include <asm/arch/at91_rstc.h>
225 +#include <asm/arch/at91_shdwc.h>
226
227 #include "generic.h"
228 #include "clock.h"
229 @@ -288,6 +291,12 @@
230 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
231 }
232
233 +static void at91cap9_poweroff(void)
234 +{
235 + at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
236 +}
237 +
238 +
239 /* --------------------------------------------------------------------
240 * AT91CAP9 processor initialization
241 * -------------------------------------------------------------------- */
242 @@ -298,6 +307,7 @@
243 iotable_init(at91cap9_io_desc, ARRAY_SIZE(at91cap9_io_desc));
244
245 at91_arch_reset = at91cap9_reset;
246 + pm_power_off = at91cap9_poweroff;
247 at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
248
249 /* Init clock subsystem */
250 @@ -308,6 +318,12 @@
251
252 /* Register GPIO subsystem */
253 at91_gpio_init(at91cap9_gpio, 4);
254 +
255 + /* Remember the silicon revision */
256 + if (cpu_is_at91cap9_revB())
257 + system_rev = 0xB;
258 + else if (cpu_is_at91cap9_revC())
259 + system_rev = 0xC;
260 }
261
262 /* --------------------------------------------------------------------
263 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/at91cap9_devices.c linux-2.6/arch/arm/mach-at91/at91cap9_devices.c
264 --- linux-2.6.25/arch/arm/mach-at91/at91cap9_devices.c 2008-05-03 00:15:44.000000000 +0200
265 +++ linux-2.6/arch/arm/mach-at91/at91cap9_devices.c 2008-05-05 22:01:39.000000000 +0200
266 @@ -13,18 +13,20 @@
267 */
268 #include <asm/mach/arch.h>
269 #include <asm/mach/map.h>
270 +#include <asm/mach/irq.h>
271
272 #include <linux/dma-mapping.h>
273 #include <linux/platform_device.h>
274 -#include <linux/mtd/physmap.h>
275 +#include <linux/i2c-gpio.h>
276
277 #include <video/atmel_lcdc.h>
278
279 #include <asm/arch/board.h>
280 +#include <asm/arch/cpu.h>
281 #include <asm/arch/gpio.h>
282 #include <asm/arch/at91cap9.h>
283 -#include <asm/arch/at91sam926x_mc.h>
284 #include <asm/arch/at91cap9_matrix.h>
285 +#include <asm/arch/at91sam9_smc.h>
286
287 #include "generic.h"
288
289 @@ -69,6 +71,9 @@
290 if (!data)
291 return;
292
293 + if (cpu_is_at91cap9_revB())
294 + set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH);
295 +
296 /* Enable VBus control for UHP ports */
297 for (i = 0; i < data->ports; i++) {
298 if (data->vbus_pin[i])
299 @@ -84,6 +89,110 @@
300
301
302 /* --------------------------------------------------------------------
303 + * USB HS Device (Gadget)
304 + * -------------------------------------------------------------------- */
305 +
306 +#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
307 +
308 +static struct resource usba_udc_resources[] = {
309 + [0] = {
310 + .start = AT91CAP9_UDPHS_FIFO,
311 + .end = AT91CAP9_UDPHS_FIFO + SZ_512K - 1,
312 + .flags = IORESOURCE_MEM,
313 + },
314 + [1] = {
315 + .start = AT91CAP9_BASE_UDPHS,
316 + .end = AT91CAP9_BASE_UDPHS + SZ_1K - 1,
317 + .flags = IORESOURCE_MEM,
318 + },
319 + [2] = {
320 + .start = AT91CAP9_ID_UDPHS,
321 + .end = AT91CAP9_ID_UDPHS,
322 + .flags = IORESOURCE_IRQ,
323 + },
324 +};
325 +
326 +#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
327 + [idx] = { \
328 + .name = nam, \
329 + .index = idx, \
330 + .fifo_size = maxpkt, \
331 + .nr_banks = maxbk, \
332 + .can_dma = dma, \
333 + .can_isoc = isoc, \
334 + }
335 +
336 +static struct usba_ep_data usba_udc_ep[] = {
337 + EP("ep0", 0, 64, 1, 0, 0),
338 + EP("ep1", 1, 1024, 3, 1, 1),
339 + EP("ep2", 2, 1024, 3, 1, 1),
340 + EP("ep3", 3, 1024, 2, 1, 1),
341 + EP("ep4", 4, 1024, 2, 1, 1),
342 + EP("ep5", 5, 1024, 2, 1, 0),
343 + EP("ep6", 6, 1024, 2, 1, 0),
344 + EP("ep7", 7, 1024, 2, 0, 0),
345 +};
346 +
347 +#undef EP
348 +
349 +/*
350 + * pdata doesn't have room for any endpoints, so we need to
351 + * append room for the ones we need right after it.
352 + */
353 +static struct {
354 + struct usba_platform_data pdata;
355 + struct usba_ep_data ep[8];
356 +} usba_udc_data;
357 +
358 +static struct platform_device at91_usba_udc_device = {
359 + .name = "atmel_usba_udc",
360 + .id = -1,
361 + .dev = {
362 + .platform_data = &usba_udc_data.pdata,
363 + },
364 + .resource = usba_udc_resources,
365 + .num_resources = ARRAY_SIZE(usba_udc_resources),
366 +};
367 +
368 +void __init at91_add_device_usba(struct usba_platform_data *data)
369 +{
370 + if (cpu_is_at91cap9_revB()) {
371 + set_irq_type(AT91CAP9_ID_UDPHS, IRQT_HIGH);
372 + at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS |
373 + AT91_MATRIX_UDPHS_BYPASS_LOCK);
374 + }
375 + else
376 + at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS);
377 +
378 + /*
379 + * Invalid pins are 0 on AT91, but the usba driver is shared
380 + * with AVR32, which use negative values instead. Once/if
381 + * gpio_is_valid() is ported to AT91, revisit this code.
382 + */
383 + usba_udc_data.pdata.vbus_pin = -EINVAL;
384 + usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
385 + memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));;
386 +
387 + if (data && data->vbus_pin > 0) {
388 + at91_set_gpio_input(data->vbus_pin, 0);
389 + at91_set_deglitch(data->vbus_pin, 1);
390 + usba_udc_data.pdata.vbus_pin = data->vbus_pin;
391 + }
392 +
393 + /* Pullup pin is handled internally by USB device peripheral */
394 +
395 + /* Clocks */
396 + at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
397 + at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
398 +
399 + platform_device_register(&at91_usba_udc_device);
400 +}
401 +#else
402 +void __init at91_add_device_usba(struct usba_platform_data *data) {}
403 +#endif
404 +
405 +
406 +/* --------------------------------------------------------------------
407 * Ethernet
408 * -------------------------------------------------------------------- */
409
410 @@ -246,7 +355,7 @@
411 }
412
413 mmc0_data = *data;
414 - at91_clock_associate("mci0_clk", &at91cap9_mmc1_device.dev, "mci_clk");
415 + at91_clock_associate("mci0_clk", &at91cap9_mmc0_device.dev, "mci_clk");
416 platform_device_register(&at91cap9_mmc0_device);
417 } else { /* MCI1 */
418 /* CLK */
419 @@ -283,10 +392,15 @@
420 #define NAND_BASE AT91_CHIPSELECT_3
421
422 static struct resource nand_resources[] = {
423 - {
424 + [0] = {
425 .start = NAND_BASE,
426 .end = NAND_BASE + SZ_256M - 1,
427 .flags = IORESOURCE_MEM,
428 + },
429 + [1] = {
430 + .start = AT91_BASE_SYS + AT91_ECC,
431 + .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
432 + .flags = IORESOURCE_MEM,
433 }
434 };
435
436 @@ -344,6 +458,7 @@
437 void __init at91_add_device_nand(struct at91_nand_data *data) {}
438 #endif
439
440 +
441 /* --------------------------------------------------------------------
442 * TWI (i2c)
443 * -------------------------------------------------------------------- */
444 @@ -532,17 +647,64 @@
445
446
447 /* --------------------------------------------------------------------
448 + * Timer/Counter block
449 + * -------------------------------------------------------------------- */
450 +
451 +#ifdef CONFIG_ATMEL_TCLIB
452 +
453 +static struct resource tcb_resources[] = {
454 + [0] = {
455 + .start = AT91CAP9_BASE_TCB0,
456 + .end = AT91CAP9_BASE_TCB0 + SZ_16K - 1,
457 + .flags = IORESOURCE_MEM,
458 + },
459 + [1] = {
460 + .start = AT91CAP9_ID_TCB,
461 + .end = AT91CAP9_ID_TCB,
462 + .flags = IORESOURCE_IRQ,
463 + },
464 +};
465 +
466 +static struct platform_device at91cap9_tcb_device = {
467 + .name = "atmel_tcb",
468 + .id = 0,
469 + .resource = tcb_resources,
470 + .num_resources = ARRAY_SIZE(tcb_resources),
471 +};
472 +
473 +static void __init at91_add_device_tc(void)
474 +{
475 + /* this chip has one clock and irq for all three TC channels */
476 + at91_clock_associate("tcb_clk", &at91cap9_tcb_device.dev, "t0_clk");
477 + platform_device_register(&at91cap9_tcb_device);
478 +}
479 +#else
480 +static void __init at91_add_device_tc(void) { }
481 +#endif
482 +
483 +
484 +/* --------------------------------------------------------------------
485 * RTT
486 * -------------------------------------------------------------------- */
487
488 +static struct resource rtt_resources[] = {
489 + {
490 + .start = AT91_BASE_SYS + AT91_RTT,
491 + .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
492 + .flags = IORESOURCE_MEM,
493 + }
494 +};
495 +
496 static struct platform_device at91cap9_rtt_device = {
497 .name = "at91_rtt",
498 - .id = -1,
499 - .num_resources = 0,
500 + .id = 0,
501 + .resource = rtt_resources,
502 + .num_resources = ARRAY_SIZE(rtt_resources),
503 };
504
505 static void __init at91_add_device_rtt(void)
506 {
507 + device_init_wakeup(&at91cap9_rtt_device.dev, 1);
508 platform_device_register(&at91cap9_rtt_device);
509 }
510
511 @@ -660,6 +822,9 @@
512 if (!data)
513 return;
514
515 + if (cpu_is_at91cap9_revB())
516 + set_irq_type(AT91CAP9_ID_LCDC, IRQT_HIGH);
517 +
518 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
519 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
520 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
521 @@ -990,7 +1155,7 @@
522 at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
523 }
524
525 -static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
526 +static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
527 struct platform_device *atmel_default_console_device; /* the serial console device */
528
529 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
530 @@ -1031,8 +1196,6 @@
531 {
532 if (portnr < ATMEL_MAX_UART)
533 atmel_default_console_device = at91_uarts[portnr];
534 - if (!atmel_default_console_device)
535 - printk(KERN_INFO "AT91: No default serial console defined.\n");
536 }
537
538 void __init at91_add_device_serial(void)
539 @@ -1043,6 +1206,9 @@
540 if (at91_uarts[i])
541 platform_device_register(at91_uarts[i]);
542 }
543 +
544 + if (!atmel_default_console_device)
545 + printk(KERN_INFO "AT91: No default serial console defined.\n");
546 }
547 #else
548 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
549 @@ -1060,6 +1226,7 @@
550 {
551 at91_add_device_rtt();
552 at91_add_device_watchdog();
553 + at91_add_device_tc();
554 return 0;
555 }
556
557 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/at91rm9200_devices.c linux-2.6/arch/arm/mach-at91/at91rm9200_devices.c
558 --- linux-2.6.25/arch/arm/mach-at91/at91rm9200_devices.c 2008-05-03 00:15:44.000000000 +0200
559 +++ linux-2.6/arch/arm/mach-at91/at91rm9200_devices.c 2008-04-25 21:15:43.000000000 +0200
560 @@ -513,7 +513,18 @@
561 * SPI
562 * -------------------------------------------------------------------- */
563
564 -#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
565 +#if defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE) /* legacy SPI driver */
566 +#define SPI_DEVNAME "at91_spi"
567 +
568 +#elif defined(CONFIG_SPI_AT91) || defined(CONFIG_SPI_AT91_MODULE) /* SPI bitbanging driver */
569 +#define SPI_DEVNAME "at91_spi"
570 +
571 +#elif defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) /* new SPI driver */
572 +#define SPI_DEVNAME "atmel_spi"
573 +
574 +#endif
575 +
576 +#ifdef SPI_DEVNAME
577 static u64 spi_dmamask = DMA_BIT_MASK(32);
578
579 static struct resource spi_resources[] = {
580 @@ -530,7 +541,7 @@
581 };
582
583 static struct platform_device at91rm9200_spi_device = {
584 - .name = "atmel_spi",
585 + .name = SPI_DEVNAME,
586 .id = 0,
587 .dev = {
588 .dma_mask = &spi_dmamask,
589 @@ -563,6 +574,12 @@
590 else
591 at91_set_gpio_output(cs_pin, 1);
592
593 +#if defined(CONFIG_AT91_SPI) || defined(CONFIG_AT91_SPI_MODULE)
594 + /*
595 + * Force peripheral mode when using the legacy SPI driver.
596 + */
597 + at91_set_A_periph(cs_pin, 0);
598 +#endif
599
600 /* pass chip-select pin to driver */
601 devices[i].controller_data = (void *) cs_pin;
602 @@ -577,6 +594,90 @@
603
604
605 /* --------------------------------------------------------------------
606 + * Timer/Counter blocks
607 + * -------------------------------------------------------------------- */
608 +
609 +#ifdef CONFIG_ATMEL_TCLIB
610 +
611 +static struct resource tcb0_resources[] = {
612 + [0] = {
613 + .start = AT91RM9200_BASE_TCB0,
614 + .end = AT91RM9200_BASE_TCB0 + SZ_16K - 1,
615 + .flags = IORESOURCE_MEM,
616 + },
617 + [1] = {
618 + .start = AT91RM9200_ID_TC0,
619 + .end = AT91RM9200_ID_TC0,
620 + .flags = IORESOURCE_IRQ,
621 + },
622 + [2] = {
623 + .start = AT91RM9200_ID_TC1,
624 + .end = AT91RM9200_ID_TC1,
625 + .flags = IORESOURCE_IRQ,
626 + },
627 + [3] = {
628 + .start = AT91RM9200_ID_TC2,
629 + .end = AT91RM9200_ID_TC2,
630 + .flags = IORESOURCE_IRQ,
631 + },
632 +};
633 +
634 +static struct platform_device at91rm9200_tcb0_device = {
635 + .name = "atmel_tcb",
636 + .id = 0,
637 + .resource = tcb0_resources,
638 + .num_resources = ARRAY_SIZE(tcb0_resources),
639 +};
640 +
641 +static struct resource tcb1_resources[] = {
642 + [0] = {
643 + .start = AT91RM9200_BASE_TCB1,
644 + .end = AT91RM9200_BASE_TCB1 + SZ_16K - 1,
645 + .flags = IORESOURCE_MEM,
646 + },
647 + [1] = {
648 + .start = AT91RM9200_ID_TC3,
649 + .end = AT91RM9200_ID_TC3,
650 + .flags = IORESOURCE_IRQ,
651 + },
652 + [2] = {
653 + .start = AT91RM9200_ID_TC4,
654 + .end = AT91RM9200_ID_TC4,
655 + .flags = IORESOURCE_IRQ,
656 + },
657 + [3] = {
658 + .start = AT91RM9200_ID_TC5,
659 + .end = AT91RM9200_ID_TC5,
660 + .flags = IORESOURCE_IRQ,
661 + },
662 +};
663 +
664 +static struct platform_device at91rm9200_tcb1_device = {
665 + .name = "atmel_tcb",
666 + .id = 1,
667 + .resource = tcb1_resources,
668 + .num_resources = ARRAY_SIZE(tcb1_resources),
669 +};
670 +
671 +static void __init at91_add_device_tc(void)
672 +{
673 + /* this chip has a separate clock and irq for each TC channel */
674 + at91_clock_associate("tc0_clk", &at91rm9200_tcb0_device.dev, "t0_clk");
675 + at91_clock_associate("tc1_clk", &at91rm9200_tcb0_device.dev, "t1_clk");
676 + at91_clock_associate("tc2_clk", &at91rm9200_tcb0_device.dev, "t2_clk");
677 + platform_device_register(&at91rm9200_tcb0_device);
678 +
679 + at91_clock_associate("tc3_clk", &at91rm9200_tcb1_device.dev, "t0_clk");
680 + at91_clock_associate("tc4_clk", &at91rm9200_tcb1_device.dev, "t1_clk");
681 + at91_clock_associate("tc5_clk", &at91rm9200_tcb1_device.dev, "t2_clk");
682 + platform_device_register(&at91rm9200_tcb1_device);
683 +}
684 +#else
685 +static void __init at91_add_device_tc(void) { }
686 +#endif
687 +
688 +
689 +/* --------------------------------------------------------------------
690 * RTC
691 * -------------------------------------------------------------------- */
692
693 @@ -589,6 +690,7 @@
694
695 static void __init at91_add_device_rtc(void)
696 {
697 + device_init_wakeup(&at91rm9200_rtc_device.dev, 1);
698 platform_device_register(&at91rm9200_rtc_device);
699 }
700 #else
701 @@ -1019,7 +1121,7 @@
702 at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
703 }
704
705 -static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
706 +static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
707 struct platform_device *atmel_default_console_device; /* the serial console device */
708
709 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
710 @@ -1110,8 +1212,6 @@
711 {
712 if (portnr < ATMEL_MAX_UART)
713 atmel_default_console_device = at91_uarts[portnr];
714 - if (!atmel_default_console_device)
715 - printk(KERN_INFO "AT91: No default serial console defined.\n");
716 }
717
718 void __init at91_add_device_serial(void)
719 @@ -1122,6 +1222,9 @@
720 if (at91_uarts[i])
721 platform_device_register(at91_uarts[i]);
722 }
723 +
724 + if (!atmel_default_console_device)
725 + printk(KERN_INFO "AT91: No default serial console defined.\n");
726 }
727 #else
728 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
729 @@ -1141,6 +1244,7 @@
730 {
731 at91_add_device_rtc();
732 at91_add_device_watchdog();
733 + at91_add_device_tc();
734 return 0;
735 }
736
737 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/at91rm9200_time.c linux-2.6/arch/arm/mach-at91/at91rm9200_time.c
738 --- linux-2.6.25/arch/arm/mach-at91/at91rm9200_time.c 2008-05-03 00:15:33.000000000 +0200
739 +++ linux-2.6/arch/arm/mach-at91/at91rm9200_time.c 2008-04-25 21:15:43.000000000 +0200
740 @@ -136,8 +136,6 @@
741 u32 alm;
742 int status = 0;
743
744 - BUG_ON(delta < 2);
745 -
746 /* Use "raw" primitives so we behave correctly on RT kernels. */
747 raw_local_irq_save(flags);
748
749 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/at91sam9260.c linux-2.6/arch/arm/mach-at91/at91sam9260.c
750 --- linux-2.6.25/arch/arm/mach-at91/at91sam9260.c 2008-05-03 00:15:44.000000000 +0200
751 +++ linux-2.6/arch/arm/mach-at91/at91sam9260.c 2008-04-25 21:15:43.000000000 +0200
752 @@ -11,6 +11,7 @@
753 */
754
755 #include <linux/module.h>
756 +#include <linux/pm.h>
757
758 #include <asm/mach/arch.h>
759 #include <asm/mach/map.h>
760 @@ -18,6 +19,7 @@
761 #include <asm/arch/at91sam9260.h>
762 #include <asm/arch/at91_pmc.h>
763 #include <asm/arch/at91_rstc.h>
764 +#include <asm/arch/at91_shdwc.h>
765
766 #include "generic.h"
767 #include "clock.h"
768 @@ -267,6 +269,11 @@
769 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
770 }
771
772 +static void at91sam9260_poweroff(void)
773 +{
774 + at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
775 +}
776 +
777
778 /* --------------------------------------------------------------------
779 * AT91SAM9260 processor initialization
780 @@ -304,6 +311,7 @@
781 iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc));
782
783 at91_arch_reset = at91sam9260_reset;
784 + pm_power_off = at91sam9260_poweroff;
785 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
786 | (1 << AT91SAM9260_ID_IRQ2);
787
788 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/at91sam9260_devices.c linux-2.6/arch/arm/mach-at91/at91sam9260_devices.c
789 --- linux-2.6.25/arch/arm/mach-at91/at91sam9260_devices.c 2008-05-03 00:15:44.000000000 +0200
790 +++ linux-2.6/arch/arm/mach-at91/at91sam9260_devices.c 2008-04-25 21:15:43.000000000 +0200
791 @@ -19,8 +19,8 @@
792 #include <asm/arch/board.h>
793 #include <asm/arch/gpio.h>
794 #include <asm/arch/at91sam9260.h>
795 -#include <asm/arch/at91sam926x_mc.h>
796 #include <asm/arch/at91sam9260_matrix.h>
797 +#include <asm/arch/at91sam9_smc.h>
798
799 #include "generic.h"
800
801 @@ -288,10 +288,15 @@
802 #define NAND_BASE AT91_CHIPSELECT_3
803
804 static struct resource nand_resources[] = {
805 - {
806 + [0] = {
807 .start = NAND_BASE,
808 .end = NAND_BASE + SZ_256M - 1,
809 .flags = IORESOURCE_MEM,
810 + },
811 + [1] = {
812 + .start = AT91_BASE_SYS + AT91_ECC,
813 + .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
814 + .flags = IORESOURCE_MEM,
815 }
816 };
817
818 @@ -540,6 +545,90 @@
819
820
821 /* --------------------------------------------------------------------
822 + * Timer/Counter blocks
823 + * -------------------------------------------------------------------- */
824 +
825 +#ifdef CONFIG_ATMEL_TCLIB
826 +
827 +static struct resource tcb0_resources[] = {
828 + [0] = {
829 + .start = AT91SAM9260_BASE_TCB0,
830 + .end = AT91SAM9260_BASE_TCB0 + SZ_16K - 1,
831 + .flags = IORESOURCE_MEM,
832 + },
833 + [1] = {
834 + .start = AT91SAM9260_ID_TC0,
835 + .end = AT91SAM9260_ID_TC0,
836 + .flags = IORESOURCE_IRQ,
837 + },
838 + [2] = {
839 + .start = AT91SAM9260_ID_TC1,
840 + .end = AT91SAM9260_ID_TC1,
841 + .flags = IORESOURCE_IRQ,
842 + },
843 + [3] = {
844 + .start = AT91SAM9260_ID_TC2,
845 + .end = AT91SAM9260_ID_TC2,
846 + .flags = IORESOURCE_IRQ,
847 + },
848 +};
849 +
850 +static struct platform_device at91sam9260_tcb0_device = {
851 + .name = "atmel_tcb",
852 + .id = 0,
853 + .resource = tcb0_resources,
854 + .num_resources = ARRAY_SIZE(tcb0_resources),
855 +};
856 +
857 +static struct resource tcb1_resources[] = {
858 + [0] = {
859 + .start = AT91SAM9260_BASE_TCB1,
860 + .end = AT91SAM9260_BASE_TCB1 + SZ_16K - 1,
861 + .flags = IORESOURCE_MEM,
862 + },
863 + [1] = {
864 + .start = AT91SAM9260_ID_TC3,
865 + .end = AT91SAM9260_ID_TC3,
866 + .flags = IORESOURCE_IRQ,
867 + },
868 + [2] = {
869 + .start = AT91SAM9260_ID_TC4,
870 + .end = AT91SAM9260_ID_TC4,
871 + .flags = IORESOURCE_IRQ,
872 + },
873 + [3] = {
874 + .start = AT91SAM9260_ID_TC5,
875 + .end = AT91SAM9260_ID_TC5,
876 + .flags = IORESOURCE_IRQ,
877 + },
878 +};
879 +
880 +static struct platform_device at91sam9260_tcb1_device = {
881 + .name = "atmel_tcb",
882 + .id = 1,
883 + .resource = tcb1_resources,
884 + .num_resources = ARRAY_SIZE(tcb1_resources),
885 +};
886 +
887 +static void __init at91_add_device_tc(void)
888 +{
889 + /* this chip has a separate clock and irq for each TC channel */
890 + at91_clock_associate("tc0_clk", &at91sam9260_tcb0_device.dev, "t0_clk");
891 + at91_clock_associate("tc1_clk", &at91sam9260_tcb0_device.dev, "t1_clk");
892 + at91_clock_associate("tc2_clk", &at91sam9260_tcb0_device.dev, "t2_clk");
893 + platform_device_register(&at91sam9260_tcb0_device);
894 +
895 + at91_clock_associate("tc3_clk", &at91sam9260_tcb1_device.dev, "t0_clk");
896 + at91_clock_associate("tc4_clk", &at91sam9260_tcb1_device.dev, "t1_clk");
897 + at91_clock_associate("tc5_clk", &at91sam9260_tcb1_device.dev, "t2_clk");
898 + platform_device_register(&at91sam9260_tcb1_device);
899 +}
900 +#else
901 +static void __init at91_add_device_tc(void) { }
902 +#endif
903 +
904 +
905 +/* --------------------------------------------------------------------
906 * RTT
907 * -------------------------------------------------------------------- */
908
909 @@ -553,13 +642,14 @@
910
911 static struct platform_device at91sam9260_rtt_device = {
912 .name = "at91_rtt",
913 - .id = -1,
914 + .id = 0,
915 .resource = rtt_resources,
916 .num_resources = ARRAY_SIZE(rtt_resources),
917 };
918
919 static void __init at91_add_device_rtt(void)
920 {
921 + device_init_wakeup(&at91sam9260_rtt_device.dev, 1);
922 platform_device_register(&at91sam9260_rtt_device);
923 }
924
925 @@ -962,7 +1052,7 @@
926 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
927 }
928
929 -static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
930 +static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
931 struct platform_device *atmel_default_console_device; /* the serial console device */
932
933 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
934 @@ -1073,8 +1163,6 @@
935 {
936 if (portnr < ATMEL_MAX_UART)
937 atmel_default_console_device = at91_uarts[portnr];
938 - if (!atmel_default_console_device)
939 - printk(KERN_INFO "AT91: No default serial console defined.\n");
940 }
941
942 void __init at91_add_device_serial(void)
943 @@ -1085,6 +1173,9 @@
944 if (at91_uarts[i])
945 platform_device_register(at91_uarts[i]);
946 }
947 +
948 + if (!atmel_default_console_device)
949 + printk(KERN_INFO "AT91: No default serial console defined.\n");
950 }
951 #else
952 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
953 @@ -1103,6 +1194,7 @@
954 {
955 at91_add_device_rtt();
956 at91_add_device_watchdog();
957 + at91_add_device_tc();
958 return 0;
959 }
960
961 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/at91sam9261.c linux-2.6/arch/arm/mach-at91/at91sam9261.c
962 --- linux-2.6.25/arch/arm/mach-at91/at91sam9261.c 2008-05-03 00:15:44.000000000 +0200
963 +++ linux-2.6/arch/arm/mach-at91/at91sam9261.c 2008-04-25 21:15:43.000000000 +0200
964 @@ -11,12 +11,14 @@
965 */
966
967 #include <linux/module.h>
968 +#include <linux/pm.h>
969
970 #include <asm/mach/arch.h>
971 #include <asm/mach/map.h>
972 #include <asm/arch/at91sam9261.h>
973 #include <asm/arch/at91_pmc.h>
974 #include <asm/arch/at91_rstc.h>
975 +#include <asm/arch/at91_shdwc.h>
976
977 #include "generic.h"
978 #include "clock.h"
979 @@ -245,6 +247,11 @@
980 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
981 }
982
983 +static void at91sam9261_poweroff(void)
984 +{
985 + at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
986 +}
987 +
988
989 /* --------------------------------------------------------------------
990 * AT91SAM9261 processor initialization
991 @@ -256,6 +263,7 @@
992 iotable_init(at91sam9261_io_desc, ARRAY_SIZE(at91sam9261_io_desc));
993
994 at91_arch_reset = at91sam9261_reset;
995 + pm_power_off = at91sam9261_poweroff;
996 at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
997 | (1 << AT91SAM9261_ID_IRQ2);
998
999 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/at91sam9261_devices.c linux-2.6/arch/arm/mach-at91/at91sam9261_devices.c
1000 --- linux-2.6.25/arch/arm/mach-at91/at91sam9261_devices.c 2008-05-03 00:15:44.000000000 +0200
1001 +++ linux-2.6/arch/arm/mach-at91/at91sam9261_devices.c 2008-04-25 21:15:43.000000000 +0200
1002 @@ -24,7 +24,7 @@
1003 #include <asm/arch/gpio.h>
1004 #include <asm/arch/at91sam9261.h>
1005 #include <asm/arch/at91sam9261_matrix.h>
1006 -#include <asm/arch/at91sam926x_mc.h>
1007 +#include <asm/arch/at91sam9_smc.h>
1008
1009 #include "generic.h"
1010
1011 @@ -548,6 +548,55 @@
1012
1013
1014 /* --------------------------------------------------------------------
1015 + * Timer/Counter block
1016 + * -------------------------------------------------------------------- */
1017 +
1018 +#ifdef CONFIG_ATMEL_TCLIB
1019 +
1020 +static struct resource tcb_resources[] = {
1021 + [0] = {
1022 + .start = AT91SAM9261_BASE_TCB0,
1023 + .end = AT91SAM9261_BASE_TCB0 + SZ_16K - 1,
1024 + .flags = IORESOURCE_MEM,
1025 + },
1026 + [1] = {
1027 + .start = AT91SAM9261_ID_TC0,
1028 + .end = AT91SAM9261_ID_TC0,
1029 + .flags = IORESOURCE_IRQ,
1030 + },
1031 + [2] = {
1032 + .start = AT91SAM9261_ID_TC1,
1033 + .end = AT91SAM9261_ID_TC1,
1034 + .flags = IORESOURCE_IRQ,
1035 + },
1036 + [3] = {
1037 + .start = AT91SAM9261_ID_TC2,
1038 + .end = AT91SAM9261_ID_TC2,
1039 + .flags = IORESOURCE_IRQ,
1040 + },
1041 +};
1042 +
1043 +static struct platform_device at91sam9261_tcb_device = {
1044 + .name = "atmel_tcb",
1045 + .id = 0,
1046 + .resource = tcb_resources,
1047 + .num_resources = ARRAY_SIZE(tcb_resources),
1048 +};
1049 +
1050 +static void __init at91_add_device_tc(void)
1051 +{
1052 + /* this chip has a separate clock and irq for each TC channel */
1053 + at91_clock_associate("tc0_clk", &at91sam9261_tcb_device.dev, "t0_clk");
1054 + at91_clock_associate("tc1_clk", &at91sam9261_tcb_device.dev, "t1_clk");
1055 + at91_clock_associate("tc2_clk", &at91sam9261_tcb_device.dev, "t2_clk");
1056 + platform_device_register(&at91sam9261_tcb_device);
1057 +}
1058 +#else
1059 +static void __init at91_add_device_tc(void) { }
1060 +#endif
1061 +
1062 +
1063 +/* --------------------------------------------------------------------
1064 * RTT
1065 * -------------------------------------------------------------------- */
1066
1067 @@ -561,13 +610,14 @@
1068
1069 static struct platform_device at91sam9261_rtt_device = {
1070 .name = "at91_rtt",
1071 - .id = -1,
1072 + .id = 0,
1073 .resource = rtt_resources,
1074 .num_resources = ARRAY_SIZE(rtt_resources),
1075 };
1076
1077 static void __init at91_add_device_rtt(void)
1078 {
1079 + device_init_wakeup(&at91sam9261_rtt_device.dev, 1);
1080 platform_device_register(&at91sam9261_rtt_device);
1081 }
1082
1083 @@ -938,7 +988,7 @@
1084 at91_set_B_periph(AT91_PIN_PA16, 0); /* CTS2 */
1085 }
1086
1087 -static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1088 +static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1089 struct platform_device *atmel_default_console_device; /* the serial console device */
1090
1091 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
1092 @@ -1019,8 +1069,6 @@
1093 {
1094 if (portnr < ATMEL_MAX_UART)
1095 atmel_default_console_device = at91_uarts[portnr];
1096 - if (!atmel_default_console_device)
1097 - printk(KERN_INFO "AT91: No default serial console defined.\n");
1098 }
1099
1100 void __init at91_add_device_serial(void)
1101 @@ -1031,6 +1079,9 @@
1102 if (at91_uarts[i])
1103 platform_device_register(at91_uarts[i]);
1104 }
1105 +
1106 + if (!atmel_default_console_device)
1107 + printk(KERN_INFO "AT91: No default serial console defined.\n");
1108 }
1109 #else
1110 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1111 @@ -1050,6 +1101,7 @@
1112 {
1113 at91_add_device_rtt();
1114 at91_add_device_watchdog();
1115 + at91_add_device_tc();
1116 return 0;
1117 }
1118
1119 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/at91sam9263.c linux-2.6/arch/arm/mach-at91/at91sam9263.c
1120 --- linux-2.6.25/arch/arm/mach-at91/at91sam9263.c 2008-05-03 00:15:44.000000000 +0200
1121 +++ linux-2.6/arch/arm/mach-at91/at91sam9263.c 2008-04-25 21:15:43.000000000 +0200
1122 @@ -11,12 +11,14 @@
1123 */
1124
1125 #include <linux/module.h>
1126 +#include <linux/pm.h>
1127
1128 #include <asm/mach/arch.h>
1129 #include <asm/mach/map.h>
1130 #include <asm/arch/at91sam9263.h>
1131 #include <asm/arch/at91_pmc.h>
1132 #include <asm/arch/at91_rstc.h>
1133 +#include <asm/arch/at91_shdwc.h>
1134
1135 #include "generic.h"
1136 #include "clock.h"
1137 @@ -271,6 +273,11 @@
1138 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
1139 }
1140
1141 +static void at91sam9263_poweroff(void)
1142 +{
1143 + at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
1144 +}
1145 +
1146
1147 /* --------------------------------------------------------------------
1148 * AT91SAM9263 processor initialization
1149 @@ -282,6 +289,7 @@
1150 iotable_init(at91sam9263_io_desc, ARRAY_SIZE(at91sam9263_io_desc));
1151
1152 at91_arch_reset = at91sam9263_reset;
1153 + pm_power_off = at91sam9263_poweroff;
1154 at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
1155
1156 /* Init clock subsystem */
1157 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/at91sam9263_devices.c linux-2.6/arch/arm/mach-at91/at91sam9263_devices.c
1158 --- linux-2.6.25/arch/arm/mach-at91/at91sam9263_devices.c 2008-05-03 00:15:44.000000000 +0200
1159 +++ linux-2.6/arch/arm/mach-at91/at91sam9263_devices.c 2008-04-25 21:16:23.000000000 +0200
1160 @@ -22,8 +22,8 @@
1161 #include <asm/arch/board.h>
1162 #include <asm/arch/gpio.h>
1163 #include <asm/arch/at91sam9263.h>
1164 -#include <asm/arch/at91sam926x_mc.h>
1165 #include <asm/arch/at91sam9263_matrix.h>
1166 +#include <asm/arch/at91sam9_smc.h>
1167
1168 #include "generic.h"
1169
1170 @@ -308,7 +308,7 @@
1171 }
1172
1173 mmc0_data = *data;
1174 - at91_clock_associate("mci0_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
1175 + at91_clock_associate("mci0_clk", &at91sam9263_mmc0_device.dev, "mci_clk");
1176 platform_device_register(&at91sam9263_mmc0_device);
1177 } else { /* MCI1 */
1178 /* CLK */
1179 @@ -358,10 +358,15 @@
1180 #define NAND_BASE AT91_CHIPSELECT_3
1181
1182 static struct resource nand_resources[] = {
1183 - {
1184 + [0] = {
1185 .start = NAND_BASE,
1186 .end = NAND_BASE + SZ_256M - 1,
1187 .flags = IORESOURCE_MEM,
1188 + },
1189 + [1] = {
1190 + .start = AT91_BASE_SYS + AT91_ECC0,
1191 + .end = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1,
1192 + .flags = IORESOURCE_MEM,
1193 }
1194 };
1195
1196 @@ -783,6 +788,43 @@
1197
1198
1199 /* --------------------------------------------------------------------
1200 + * Timer/Counter block
1201 + * -------------------------------------------------------------------- */
1202 +
1203 +#ifdef CONFIG_ATMEL_TCLIB
1204 +
1205 +static struct resource tcb_resources[] = {
1206 + [0] = {
1207 + .start = AT91SAM9263_BASE_TCB0,
1208 + .end = AT91SAM9263_BASE_TCB0 + SZ_16K - 1,
1209 + .flags = IORESOURCE_MEM,
1210 + },
1211 + [1] = {
1212 + .start = AT91SAM9263_ID_TCB,
1213 + .end = AT91SAM9263_ID_TCB,
1214 + .flags = IORESOURCE_IRQ,
1215 + },
1216 +};
1217 +
1218 +static struct platform_device at91sam9263_tcb_device = {
1219 + .name = "atmel_tcb",
1220 + .id = 0,
1221 + .resource = tcb_resources,
1222 + .num_resources = ARRAY_SIZE(tcb_resources),
1223 +};
1224 +
1225 +static void __init at91_add_device_tc(void)
1226 +{
1227 + /* this chip has one clock and irq for all three TC channels */
1228 + at91_clock_associate("tcb_clk", &at91sam9263_tcb_device.dev, "t0_clk");
1229 + platform_device_register(&at91sam9263_tcb_device);
1230 +}
1231 +#else
1232 +static void __init at91_add_device_tc(void) { }
1233 +#endif
1234 +
1235 +
1236 +/* --------------------------------------------------------------------
1237 * RTT
1238 * -------------------------------------------------------------------- */
1239
1240 @@ -818,7 +860,9 @@
1241
1242 static void __init at91_add_device_rtt(void)
1243 {
1244 + device_init_wakeup(&at91sam9263_rtt0_device.dev, 1);
1245 platform_device_register(&at91sam9263_rtt0_device);
1246 + device_init_wakeup(&at91sam9263_rtt1_device.dev, 1);
1247 platform_device_register(&at91sam9263_rtt1_device);
1248 }
1249
1250 @@ -933,9 +977,6 @@
1251 }
1252
1253 /*
1254 - * Return the device node so that board init code can use it as the
1255 - * parent for the device node reflecting how it's used on this board.
1256 - *
1257 * SSC controllers are accessed through library code, instead of any
1258 * kind of all-singing/all-dancing driver. For example one could be
1259 * used by a particular I2S audio codec's driver, while another one
1260 @@ -1146,7 +1187,7 @@
1261 at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
1262 }
1263
1264 -static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1265 +static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1266 struct platform_device *atmel_default_console_device; /* the serial console device */
1267
1268 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
1269 @@ -1227,8 +1268,6 @@
1270 {
1271 if (portnr < ATMEL_MAX_UART)
1272 atmel_default_console_device = at91_uarts[portnr];
1273 - if (!atmel_default_console_device)
1274 - printk(KERN_INFO "AT91: No default serial console defined.\n");
1275 }
1276
1277 void __init at91_add_device_serial(void)
1278 @@ -1239,9 +1278,12 @@
1279 if (at91_uarts[i])
1280 platform_device_register(at91_uarts[i]);
1281 }
1282 +
1283 + if (!atmel_default_console_device)
1284 + printk(KERN_INFO "AT91: No default serial console defined.\n");
1285 }
1286 #else
1287 -void __init at91_init_serial(struct at91_uart_config *config) {}
1288 +void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1289 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1290 void __init at91_set_serial_console(unsigned portnr) {}
1291 void __init at91_add_device_serial(void) {}
1292 @@ -1257,6 +1299,7 @@
1293 {
1294 at91_add_device_rtt();
1295 at91_add_device_watchdog();
1296 + at91_add_device_tc();
1297 return 0;
1298 }
1299
1300 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/at91sam926x_time.c linux-2.6/arch/arm/mach-at91/at91sam926x_time.c
1301 --- linux-2.6.25/arch/arm/mach-at91/at91sam926x_time.c 2008-05-03 00:15:44.000000000 +0200
1302 +++ linux-2.6/arch/arm/mach-at91/at91sam926x_time.c 2008-04-25 21:15:43.000000000 +0200
1303 @@ -1,23 +1,20 @@
1304 /*
1305 - * linux/arch/arm/mach-at91/at91sam926x_time.c
1306 + * at91sam926x_time.c - Periodic Interval Timer (PIT) for at91sam926x
1307 *
1308 * Copyright (C) 2005-2006 M. Amine SAYA, ATMEL Rousset, France
1309 * Revision 2005 M. Nicolas Diremdjian, ATMEL Rousset, France
1310 + * Converted to ClockSource/ClockEvents by David Brownell.
1311 *
1312 * This program is free software; you can redistribute it and/or modify
1313 * it under the terms of the GNU General Public License version 2 as
1314 * published by the Free Software Foundation.
1315 */
1316 -
1317 -#include <linux/init.h>
1318 #include <linux/interrupt.h>
1319 #include <linux/irq.h>
1320 #include <linux/kernel.h>
1321 -#include <linux/sched.h>
1322 -#include <linux/time.h>
1323 +#include <linux/clk.h>
1324 +#include <linux/clockchips.h>
1325
1326 -#include <asm/hardware.h>
1327 -#include <asm/io.h>
1328 #include <asm/mach/time.h>
1329
1330 #include <asm/arch/at91_pit.h>
1331 @@ -26,85 +23,167 @@
1332 #define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
1333 #define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20)
1334
1335 +static u32 pit_cycle; /* write-once */
1336 +static u32 pit_cnt; /* access only w/system irq blocked */
1337 +
1338 +
1339 /*
1340 - * Returns number of microseconds since last timer interrupt. Note that interrupts
1341 - * will have been disabled by do_gettimeofday()
1342 - * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
1343 + * Clocksource: just a monotonic counter of MCK/16 cycles.
1344 + * We don't care whether or not PIT irqs are enabled.
1345 */
1346 -static unsigned long at91sam926x_gettimeoffset(void)
1347 +static cycle_t read_pit_clk(void)
1348 {
1349 - unsigned long elapsed;
1350 - unsigned long t = at91_sys_read(AT91_PIT_PIIR);
1351 + unsigned long flags;
1352 + u32 elapsed;
1353 + u32 t;
1354 +
1355 + raw_local_irq_save(flags);
1356 + elapsed = pit_cnt;
1357 + t = at91_sys_read(AT91_PIT_PIIR);
1358 + raw_local_irq_restore(flags);
1359 +
1360 + elapsed += PIT_PICNT(t) * pit_cycle;
1361 + elapsed += PIT_CPIV(t);
1362 + return elapsed;
1363 +}
1364 +
1365 +static struct clocksource pit_clk = {
1366 + .name = "pit",
1367 + .rating = 175,
1368 + .read = read_pit_clk,
1369 + .shift = 20,
1370 + .flags = CLOCK_SOURCE_IS_CONTINUOUS,
1371 +};
1372 +
1373
1374 - elapsed = (PIT_PICNT(t) * LATCH) + PIT_CPIV(t); /* hardware clock cycles */
1375 +/*
1376 + * Clockevent device: interrupts every 1/HZ (== pit_cycles * MCK/16)
1377 + */
1378 +static void
1379 +pit_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
1380 +{
1381 + unsigned long flags;
1382
1383 - return (unsigned long)(elapsed * jiffies_to_usecs(1)) / LATCH;
1384 + switch (mode) {
1385 + case CLOCK_EVT_MODE_PERIODIC:
1386 + /* update clocksource counter, then enable the IRQ */
1387 + raw_local_irq_save(flags);
1388 + pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
1389 + at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
1390 + | AT91_PIT_PITIEN);
1391 + raw_local_irq_restore(flags);
1392 + break;
1393 + case CLOCK_EVT_MODE_ONESHOT:
1394 + BUG();
1395 + /* FALLTHROUGH */
1396 + case CLOCK_EVT_MODE_SHUTDOWN:
1397 + case CLOCK_EVT_MODE_UNUSED:
1398 + /* disable irq, leaving the clocksource active */
1399 + at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
1400 + break;
1401 + case CLOCK_EVT_MODE_RESUME:
1402 + break;
1403 + }
1404 }
1405
1406 +static struct clock_event_device pit_clkevt = {
1407 + .name = "pit",
1408 + .features = CLOCK_EVT_FEAT_PERIODIC,
1409 + .shift = 32,
1410 + .rating = 100,
1411 + .cpumask = CPU_MASK_CPU0,
1412 + .set_mode = pit_clkevt_mode,
1413 +};
1414 +
1415 +
1416 /*
1417 * IRQ handler for the timer.
1418 */
1419 -static irqreturn_t at91sam926x_timer_interrupt(int irq, void *dev_id)
1420 +static irqreturn_t at91sam926x_pit_interrupt(int irq, void *dev_id)
1421 {
1422 - volatile long nr_ticks;
1423
1424 - if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS) { /* This is a shared interrupt */
1425 - /* Get number to ticks performed before interrupt and clear PIT interrupt */
1426 + /* The PIT interrupt may be disabled, and is shared */
1427 + if ((pit_clkevt.mode == CLOCK_EVT_MODE_PERIODIC)
1428 + && (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)) {
1429 + unsigned nr_ticks;
1430 +
1431 + /* Get number of ticks performed before irq, and ack it */
1432 nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
1433 do {
1434 - timer_tick();
1435 + pit_cnt += pit_cycle;
1436 + pit_clkevt.event_handler(&pit_clkevt);
1437 nr_ticks--;
1438 } while (nr_ticks);
1439
1440 return IRQ_HANDLED;
1441 - } else
1442 - return IRQ_NONE; /* not handled */
1443 + }
1444 +
1445 + return IRQ_NONE;
1446 }
1447
1448 -static struct irqaction at91sam926x_timer_irq = {
1449 +static struct irqaction at91sam926x_pit_irq = {
1450 .name = "at91_tick",
1451 .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
1452 - .handler = at91sam926x_timer_interrupt
1453 + .handler = at91sam926x_pit_interrupt
1454 };
1455
1456 -void at91sam926x_timer_reset(void)
1457 +static void at91sam926x_pit_reset(void)
1458 {
1459 - /* Disable timer */
1460 + /* Disable timer and irqs */
1461 at91_sys_write(AT91_PIT_MR, 0);
1462
1463 - /* Clear any pending interrupts */
1464 - (void) at91_sys_read(AT91_PIT_PIVR);
1465 + /* Clear any pending interrupts, wait for PIT to stop counting */
1466 + while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0)
1467 + cpu_relax();
1468
1469 - /* Set Period Interval timer and enable its interrupt */
1470 - at91_sys_write(AT91_PIT_MR, (LATCH & AT91_PIT_PIV) | AT91_PIT_PITIEN | AT91_PIT_PITEN);
1471 + /* Start PIT but don't enable IRQ */
1472 + at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
1473 }
1474
1475 /*
1476 - * Set up timer interrupt.
1477 + * Set up both clocksource and clockevent support.
1478 */
1479 -void __init at91sam926x_timer_init(void)
1480 +static void __init at91sam926x_pit_init(void)
1481 {
1482 + unsigned long pit_rate;
1483 + unsigned bits;
1484 +
1485 + /*
1486 + * Use our actual MCK to figure out how many MCK/16 ticks per
1487 + * 1/HZ period (instead of a compile-time constant LATCH).
1488 + */
1489 + pit_rate = clk_get_rate(clk_get(NULL, "mck")) / 16;
1490 + pit_cycle = (pit_rate + HZ/2) / HZ;
1491 + WARN_ON(((pit_cycle - 1) & ~AT91_PIT_PIV) != 0);
1492 +
1493 /* Initialize and enable the timer */
1494 - at91sam926x_timer_reset();
1495 + at91sam926x_pit_reset();
1496
1497 - /* Make IRQs happen for the system timer. */
1498 - setup_irq(AT91_ID_SYS, &at91sam926x_timer_irq);
1499 + /*
1500 + * Register clocksource. The high order bits of PIV are unused,
1501 + * so this isn't a 32-bit counter unless we get clockevent irqs.
1502 + */
1503 + pit_clk.mult = clocksource_hz2mult(pit_rate, pit_clk.shift);
1504 + bits = 12 /* PICNT */ + ilog2(pit_cycle) /* PIV */;
1505 + pit_clk.mask = CLOCKSOURCE_MASK(bits);
1506 + clocksource_register(&pit_clk);
1507 +
1508 + /* Set up irq handler */
1509 + setup_irq(AT91_ID_SYS, &at91sam926x_pit_irq);
1510 +
1511 + /* Set up and register clockevents */
1512 + pit_clkevt.mult = div_sc(pit_rate, NSEC_PER_SEC, pit_clkevt.shift);
1513 + clockevents_register_device(&pit_clkevt);
1514 }
1515
1516 -#ifdef CONFIG_PM
1517 -static void at91sam926x_timer_suspend(void)
1518 +static void at91sam926x_pit_suspend(void)
1519 {
1520 /* Disable timer */
1521 at91_sys_write(AT91_PIT_MR, 0);
1522 }
1523 -#else
1524 -#define at91sam926x_timer_suspend NULL
1525 -#endif
1526
1527 struct sys_timer at91sam926x_timer = {
1528 - .init = at91sam926x_timer_init,
1529 - .offset = at91sam926x_gettimeoffset,
1530 - .suspend = at91sam926x_timer_suspend,
1531 - .resume = at91sam926x_timer_reset,
1532 + .init = at91sam926x_pit_init,
1533 + .suspend = at91sam926x_pit_suspend,
1534 + .resume = at91sam926x_pit_reset,
1535 };
1536 -
1537 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/at91sam9rl.c linux-2.6/arch/arm/mach-at91/at91sam9rl.c
1538 --- linux-2.6.25/arch/arm/mach-at91/at91sam9rl.c 2007-10-09 22:31:38.000000000 +0200
1539 +++ linux-2.6/arch/arm/mach-at91/at91sam9rl.c 2008-04-25 21:15:43.000000000 +0200
1540 @@ -10,6 +10,7 @@
1541 */
1542
1543 #include <linux/module.h>
1544 +#include <linux/pm.h>
1545
1546 #include <asm/mach/arch.h>
1547 #include <asm/mach/map.h>
1548 @@ -17,6 +18,7 @@
1549 #include <asm/arch/at91sam9rl.h>
1550 #include <asm/arch/at91_pmc.h>
1551 #include <asm/arch/at91_rstc.h>
1552 +#include <asm/arch/at91_shdwc.h>
1553
1554 #include "generic.h"
1555 #include "clock.h"
1556 @@ -244,6 +246,11 @@
1557 at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST);
1558 }
1559
1560 +static void at91sam9rl_poweroff(void)
1561 +{
1562 + at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
1563 +}
1564 +
1565
1566 /* --------------------------------------------------------------------
1567 * AT91SAM9RL processor initialization
1568 @@ -274,6 +281,7 @@
1569 iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc));
1570
1571 at91_arch_reset = at91sam9rl_reset;
1572 + pm_power_off = at91sam9rl_poweroff;
1573 at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
1574
1575 /* Init clock subsystem */
1576 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/at91sam9rl_devices.c linux-2.6/arch/arm/mach-at91/at91sam9rl_devices.c
1577 --- linux-2.6.25/arch/arm/mach-at91/at91sam9rl_devices.c 2008-05-03 00:15:44.000000000 +0200
1578 +++ linux-2.6/arch/arm/mach-at91/at91sam9rl_devices.c 2008-05-02 00:52:36.000000000 +0200
1579 @@ -20,12 +20,107 @@
1580 #include <asm/arch/gpio.h>
1581 #include <asm/arch/at91sam9rl.h>
1582 #include <asm/arch/at91sam9rl_matrix.h>
1583 -#include <asm/arch/at91sam926x_mc.h>
1584 +#include <asm/arch/at91sam9_smc.h>
1585
1586 #include "generic.h"
1587
1588
1589 /* --------------------------------------------------------------------
1590 + * USB HS Device (Gadget)
1591 + * -------------------------------------------------------------------- */
1592 +
1593 +#if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
1594 +
1595 +static struct resource usba_udc_resources[] = {
1596 + [0] = {
1597 + .start = AT91SAM9RL_UDPHS_FIFO,
1598 + .end = AT91SAM9RL_UDPHS_FIFO + SZ_512K - 1,
1599 + .flags = IORESOURCE_MEM,
1600 + },
1601 + [1] = {
1602 + .start = AT91SAM9RL_BASE_UDPHS,
1603 + .end = AT91SAM9RL_BASE_UDPHS + SZ_1K - 1,
1604 + .flags = IORESOURCE_MEM,
1605 + },
1606 + [2] = {
1607 + .start = AT91SAM9RL_ID_UDPHS,
1608 + .end = AT91SAM9RL_ID_UDPHS,
1609 + .flags = IORESOURCE_IRQ,
1610 + },
1611 +};
1612 +
1613 +#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
1614 + [idx] = { \
1615 + .name = nam, \
1616 + .index = idx, \
1617 + .fifo_size = maxpkt, \
1618 + .nr_banks = maxbk, \
1619 + .can_dma = dma, \
1620 + .can_isoc = isoc, \
1621 + }
1622 +
1623 +static struct usba_ep_data usba_udc_ep[] __initdata = {
1624 + EP("ep0", 0, 64, 1, 0, 0),
1625 + EP("ep1", 1, 1024, 2, 1, 1),
1626 + EP("ep2", 2, 1024, 2, 1, 1),
1627 + EP("ep3", 3, 1024, 3, 1, 0),
1628 + EP("ep4", 4, 1024, 3, 1, 0),
1629 + EP("ep5", 5, 1024, 3, 1, 1),
1630 + EP("ep6", 6, 1024, 3, 1, 1),
1631 +};
1632 +
1633 +#undef EP
1634 +
1635 +/*
1636 + * pdata doesn't have room for any endpoints, so we need to
1637 + * append room for the ones we need right after it.
1638 + */
1639 +static struct {
1640 + struct usba_platform_data pdata;
1641 + struct usba_ep_data ep[7];
1642 +} usba_udc_data;
1643 +
1644 +static struct platform_device at91_usba_udc_device = {
1645 + .name = "atmel_usba_udc",
1646 + .id = -1,
1647 + .dev = {
1648 + .platform_data = &usba_udc_data.pdata,
1649 + },
1650 + .resource = usba_udc_resources,
1651 + .num_resources = ARRAY_SIZE(usba_udc_resources),
1652 +};
1653 +
1654 +void __init at91_add_device_usba(struct usba_platform_data *data)
1655 +{
1656 + /*
1657 + * Invalid pins are 0 on AT91, but the usba driver is shared
1658 + * with AVR32, which use negative values instead. Once/if
1659 + * gpio_is_valid() is ported to AT91, revisit this code.
1660 + */
1661 + usba_udc_data.pdata.vbus_pin = -EINVAL;
1662 + usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
1663 + memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));;
1664 +
1665 + if (data && data->vbus_pin > 0) {
1666 + at91_set_gpio_input(data->vbus_pin, 0);
1667 + at91_set_deglitch(data->vbus_pin, 1);
1668 + usba_udc_data.pdata.vbus_pin = data->vbus_pin;
1669 + }
1670 +
1671 + /* Pullup pin is handled internally by USB device peripheral */
1672 +
1673 + /* Clocks */
1674 + at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
1675 + at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
1676 +
1677 + platform_device_register(&at91_usba_udc_device);
1678 +}
1679 +#else
1680 +void __init at91_add_device_usba(struct usba_platform_data *data) {}
1681 +#endif
1682 +
1683 +
1684 +/* --------------------------------------------------------------------
1685 * MMC / SD
1686 * -------------------------------------------------------------------- */
1687
1688 @@ -105,10 +200,15 @@
1689 #define NAND_BASE AT91_CHIPSELECT_3
1690
1691 static struct resource nand_resources[] = {
1692 - {
1693 + [0] = {
1694 .start = NAND_BASE,
1695 .end = NAND_BASE + SZ_256M - 1,
1696 .flags = IORESOURCE_MEM,
1697 + },
1698 + [1] = {
1699 + .start = AT91_BASE_SYS + AT91_ECC,
1700 + .end = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
1701 + .flags = IORESOURCE_MEM,
1702 }
1703 };
1704
1705 @@ -385,6 +485,100 @@
1706
1707
1708 /* --------------------------------------------------------------------
1709 + * Timer/Counter block
1710 + * -------------------------------------------------------------------- */
1711 +
1712 +#ifdef CONFIG_ATMEL_TCLIB
1713 +
1714 +static struct resource tcb_resources[] = {
1715 + [0] = {
1716 + .start = AT91SAM9RL_BASE_TCB0,
1717 + .end = AT91SAM9RL_BASE_TCB0 + SZ_16K - 1,
1718 + .flags = IORESOURCE_MEM,
1719 + },
1720 + [1] = {
1721 + .start = AT91SAM9RL_ID_TC0,
1722 + .end = AT91SAM9RL_ID_TC0,
1723 + .flags = IORESOURCE_IRQ,
1724 + },
1725 + [2] = {
1726 + .start = AT91SAM9RL_ID_TC1,
1727 + .end = AT91SAM9RL_ID_TC1,
1728 + .flags = IORESOURCE_IRQ,
1729 + },
1730 + [3] = {
1731 + .start = AT91SAM9RL_ID_TC2,
1732 + .end = AT91SAM9RL_ID_TC2,
1733 + .flags = IORESOURCE_IRQ,
1734 + },
1735 +};
1736 +
1737 +static struct platform_device at91sam9rl_tcb_device = {
1738 + .name = "atmel_tcb",
1739 + .id = 0,
1740 + .resource = tcb_resources,
1741 + .num_resources = ARRAY_SIZE(tcb_resources),
1742 +};
1743 +
1744 +static void __init at91_add_device_tc(void)
1745 +{
1746 + /* this chip has a separate clock and irq for each TC channel */
1747 + at91_clock_associate("tc0_clk", &at91sam9rl_tcb_device.dev, "t0_clk");
1748 + at91_clock_associate("tc1_clk", &at91sam9rl_tcb_device.dev, "t1_clk");
1749 + at91_clock_associate("tc2_clk", &at91sam9rl_tcb_device.dev, "t2_clk");
1750 + platform_device_register(&at91sam9rl_tcb_device);
1751 +}
1752 +#else
1753 +static void __init at91_add_device_tc(void) { }
1754 +#endif
1755 +
1756 +
1757 +/* --------------------------------------------------------------------
1758 + * Touchscreen
1759 + * -------------------------------------------------------------------- */
1760 +
1761 +#if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE)
1762 +static u64 tsadcc_dmamask = DMA_BIT_MASK(32);
1763 +
1764 +static struct resource tsadcc_resources[] = {
1765 + [0] = {
1766 + .start = AT91SAM9RL_BASE_TSC,
1767 + .end = AT91SAM9RL_BASE_TSC + SZ_16K - 1,
1768 + .flags = IORESOURCE_MEM,
1769 + },
1770 + [1] = {
1771 + .start = AT91SAM9RL_ID_TSC,
1772 + .end = AT91SAM9RL_ID_TSC,
1773 + .flags = IORESOURCE_IRQ,
1774 + }
1775 +};
1776 +
1777 +static struct platform_device at91_tsadcc_device = {
1778 + .name = "atmel_tsadcc",
1779 + .id = -1,
1780 + .dev = {
1781 + .dma_mask = &tsadcc_dmamask,
1782 + .coherent_dma_mask = DMA_BIT_MASK(32),
1783 + },
1784 + .resource = tsadcc_resources,
1785 + .num_resources = ARRAY_SIZE(tsadcc_resources),
1786 +};
1787 +
1788 +void __init at91_add_device_tsadcc(void)
1789 +{
1790 + at91_set_A_periph(AT91_PIN_PA17, 0); /* AD0_XR */
1791 + at91_set_A_periph(AT91_PIN_PA18, 0); /* AD1_XL */
1792 + at91_set_A_periph(AT91_PIN_PA19, 0); /* AD2_YT */
1793 + at91_set_A_periph(AT91_PIN_PA20, 0); /* AD3_TB */
1794 +
1795 + platform_device_register(&at91_tsadcc_device);
1796 +}
1797 +#else
1798 +void __init at91_add_device_tsadcc(void) {}
1799 +#endif
1800 +
1801 +
1802 +/* --------------------------------------------------------------------
1803 * RTC
1804 * -------------------------------------------------------------------- */
1805
1806 @@ -397,6 +591,7 @@
1807
1808 static void __init at91_add_device_rtc(void)
1809 {
1810 + device_init_wakeup(&at91sam9rl_rtc_device.dev, 1);
1811 platform_device_register(&at91sam9rl_rtc_device);
1812 }
1813 #else
1814 @@ -418,13 +613,14 @@
1815
1816 static struct platform_device at91sam9rl_rtt_device = {
1817 .name = "at91_rtt",
1818 - .id = -1,
1819 + .id = 0,
1820 .resource = rtt_resources,
1821 .num_resources = ARRAY_SIZE(rtt_resources),
1822 };
1823
1824 static void __init at91_add_device_rtt(void)
1825 {
1826 + device_init_wakeup(&at91sam9rl_rtt_device.dev, 1);
1827 platform_device_register(&at91sam9rl_rtt_device);
1828 }
1829
1830 @@ -539,9 +735,6 @@
1831 }
1832
1833 /*
1834 - * Return the device node so that board init code can use it as the
1835 - * parent for the device node reflecting how it's used on this board.
1836 - *
1837 * SSC controllers are accessed through library code, instead of any
1838 * kind of all-singing/all-dancing driver. For example one could be
1839 * used by a particular I2S audio codec's driver, while another one
1840 @@ -802,7 +995,7 @@
1841 at91_set_B_periph(AT91_PIN_PD3, 0); /* CTS3 */
1842 }
1843
1844 -static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1845 +static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1846 struct platform_device *atmel_default_console_device; /* the serial console device */
1847
1848 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
1849 @@ -893,8 +1086,6 @@
1850 {
1851 if (portnr < ATMEL_MAX_UART)
1852 atmel_default_console_device = at91_uarts[portnr];
1853 - if (!atmel_default_console_device)
1854 - printk(KERN_INFO "AT91: No default serial console defined.\n");
1855 }
1856
1857 void __init at91_add_device_serial(void)
1858 @@ -905,6 +1096,9 @@
1859 if (at91_uarts[i])
1860 platform_device_register(at91_uarts[i]);
1861 }
1862 +
1863 + if (!atmel_default_console_device)
1864 + printk(KERN_INFO "AT91: No default serial console defined.\n");
1865 }
1866 #else
1867 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1868 @@ -925,6 +1119,7 @@
1869 at91_add_device_rtc();
1870 at91_add_device_rtt();
1871 at91_add_device_watchdog();
1872 + at91_add_device_tc();
1873 return 0;
1874 }
1875
1876 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-cam60.c linux-2.6/arch/arm/mach-at91/board-cam60.c
1877 --- linux-2.6.25/arch/arm/mach-at91/board-cam60.c 1970-01-01 02:00:00.000000000 +0200
1878 +++ linux-2.6/arch/arm/mach-at91/board-cam60.c 2008-04-25 21:15:43.000000000 +0200
1879 @@ -0,0 +1,180 @@
1880 +/*
1881 + * KwikByte CAM60 (KB9260)
1882 + *
1883 + * based on board-sam9260ek.c
1884 + * Copyright (C) 2005 SAN People
1885 + * Copyright (C) 2006 Atmel
1886 + *
1887 + * This program is free software; you can redistribute it and/or modify
1888 + * it under the terms of the GNU General Public License as published by
1889 + * the Free Software Foundation; either version 2 of the License, or
1890 + * (at your option) any later version.
1891 + *
1892 + * This program is distributed in the hope that it will be useful,
1893 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1894 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1895 + * GNU General Public License for more details.
1896 + *
1897 + * You should have received a copy of the GNU General Public License
1898 + * along with this program; if not, write to the Free Software
1899 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
1900 + */
1901 +
1902 +#include <linux/types.h>
1903 +#include <linux/init.h>
1904 +#include <linux/mm.h>
1905 +#include <linux/module.h>
1906 +#include <linux/platform_device.h>
1907 +#include <linux/spi/spi.h>
1908 +#include <linux/spi/flash.h>
1909 +
1910 +#include <asm/hardware.h>
1911 +#include <asm/setup.h>
1912 +#include <asm/mach-types.h>
1913 +#include <asm/irq.h>
1914 +
1915 +#include <asm/mach/arch.h>
1916 +#include <asm/mach/map.h>
1917 +#include <asm/mach/irq.h>
1918 +
1919 +#include <asm/arch/board.h>
1920 +#include <asm/arch/gpio.h>
1921 +
1922 +#include "generic.h"
1923 +
1924 +
1925 +static void __init cam60_map_io(void)
1926 +{
1927 + /* Initialize processor: 10 MHz crystal */
1928 + at91sam9260_initialize(10000000);
1929 +
1930 + /* DGBU on ttyS0. (Rx & Tx only) */
1931 + at91_register_uart(0, 0, 0);
1932 +
1933 + /* set serial console to ttyS0 (ie, DBGU) */
1934 + at91_set_serial_console(0);
1935 +}
1936 +
1937 +static void __init cam60_init_irq(void)
1938 +{
1939 + at91sam9260_init_interrupts(NULL);
1940 +}
1941 +
1942 +
1943 +/*
1944 + * USB Host
1945 + */
1946 +static struct at91_usbh_data __initdata cam60_usbh_data = {
1947 + .ports = 1,
1948 +};
1949 +
1950 +
1951 +/*
1952 + * SPI devices.
1953 + */
1954 +#if defined(CONFIG_MTD_DATAFLASH)
1955 +static struct mtd_partition __initdata cam60_spi_partitions[] = {
1956 + {
1957 + .name = "BOOT1",
1958 + .offset = 0,
1959 + .size = 4 * 1056,
1960 + },
1961 + {
1962 + .name = "BOOT2",
1963 + .offset = MTDPART_OFS_NXTBLK,
1964 + .size = 256 * 1056,
1965 + },
1966 + {
1967 + .name = "kernel",
1968 + .offset = MTDPART_OFS_NXTBLK,
1969 + .size = 2222 * 1056,
1970 + },
1971 + {
1972 + .name = "file system",
1973 + .offset = MTDPART_OFS_NXTBLK,
1974 + .size = MTDPART_SIZ_FULL,
1975 + },
1976 +};
1977 +
1978 +static struct flash_platform_data __initdata cam60_spi_flash_platform_data = {
1979 + .name = "spi_flash",
1980 + .parts = cam60_spi_partitions,
1981 + .nr_parts = ARRAY_SIZE(cam60_spi_partitions)
1982 +};
1983 +#endif
1984 +
1985 +static struct spi_board_info cam60_spi_devices[] = {
1986 +#if defined(CONFIG_MTD_DATAFLASH)
1987 + { /* DataFlash chip */
1988 + .modalias = "mtd_dataflash",
1989 + .chip_select = 0,
1990 + .max_speed_hz = 15 * 1000 * 1000,
1991 + .bus_num = 0,
1992 + .platform_data = &cam60_spi_flash_platform_data
1993 + },
1994 +#endif
1995 +};
1996 +
1997 +
1998 +/*
1999 + * MACB Ethernet device
2000 + */
2001 +static struct __initdata at91_eth_data cam60_macb_data = {
2002 + .phy_irq_pin = AT91_PIN_PB5,
2003 + .is_rmii = 0,
2004 +};
2005 +
2006 +
2007 +/*
2008 + * NAND Flash
2009 + */
2010 +static struct mtd_partition __initdata cam60_nand_partition[] = {
2011 + {
2012 + .name = "nand_fs",
2013 + .offset = 0,
2014 + .size = MTDPART_SIZ_FULL,
2015 + },
2016 +};
2017 +
2018 +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
2019 +{
2020 + *num_partitions = ARRAY_SIZE(cam60_nand_partition);
2021 + return cam60_nand_partition;
2022 +}
2023 +
2024 +static struct at91_nand_data __initdata cam60_nand_data = {
2025 + .ale = 21,
2026 + .cle = 22,
2027 + // .det_pin = ... not there
2028 + .rdy_pin = AT91_PIN_PA9,
2029 + .enable_pin = AT91_PIN_PA7,
2030 + .partition_info = nand_partitions,
2031 +};
2032 +
2033 +
2034 +static void __init cam60_board_init(void)
2035 +{
2036 + /* Serial */
2037 + at91_add_device_serial();
2038 + /* SPI */
2039 + at91_add_device_spi(cam60_spi_devices, ARRAY_SIZE(cam60_spi_devices));
2040 + /* Ethernet */
2041 + at91_add_device_eth(&cam60_macb_data);
2042 + /* USB Host */
2043 + /* enable USB power supply circuit */
2044 + at91_set_gpio_output(AT91_PIN_PB18, 1);
2045 + at91_add_device_usbh(&cam60_usbh_data);
2046 + /* NAND */
2047 + at91_add_device_nand(&cam60_nand_data);
2048 +}
2049 +
2050 +MACHINE_START(CAM60, "KwikByte CAM60")
2051 + /* Maintainer: KwikByte */
2052 + .phys_io = AT91_BASE_SYS,
2053 + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
2054 + .boot_params = AT91_SDRAM_BASE + 0x100,
2055 + .timer = &at91sam926x_timer,
2056 + .map_io = cam60_map_io,
2057 + .init_irq = cam60_init_irq,
2058 + .init_machine = cam60_board_init,
2059 +MACHINE_END
2060 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-cap9adk.c linux-2.6/arch/arm/mach-at91/board-cap9adk.c
2061 --- linux-2.6.25/arch/arm/mach-at91/board-cap9adk.c 2008-05-03 00:15:44.000000000 +0200
2062 +++ linux-2.6/arch/arm/mach-at91/board-cap9adk.c 2008-05-05 22:01:39.000000000 +0200
2063 @@ -36,16 +36,14 @@
2064 #include <asm/hardware.h>
2065 #include <asm/setup.h>
2066 #include <asm/mach-types.h>
2067 -#include <asm/irq.h>
2068
2069 #include <asm/mach/arch.h>
2070 #include <asm/mach/map.h>
2071 -#include <asm/mach/irq.h>
2072
2073 #include <asm/arch/board.h>
2074 #include <asm/arch/gpio.h>
2075 #include <asm/arch/at91cap9_matrix.h>
2076 -#include <asm/arch/at91sam926x_mc.h>
2077 +#include <asm/arch/at91sam9_smc.h>
2078
2079 #include "generic.h"
2080
2081 @@ -78,6 +76,12 @@
2082 .ports = 2,
2083 };
2084
2085 +/*
2086 + * USB HS Device port
2087 + */
2088 +static struct usba_platform_data __initdata cap9adk_usba_udc_data = {
2089 + .vbus_pin = AT91_PIN_PB31,
2090 +};
2091
2092 /*
2093 * ADS7846 Touchscreen
2094 @@ -130,7 +134,7 @@
2095 {
2096 .modalias = "ads7846",
2097 .chip_select = 3, /* can be 2 or 3, depending on J2 jumper */
2098 - .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
2099 + .max_speed_hz = 125000 * 16, /* max sample rate * clocks per sample */
2100 .bus_num = 0,
2101 .platform_data = &ads_info,
2102 .irq = AT91_PIN_PC4,
2103 @@ -324,8 +328,9 @@
2104 /* Serial */
2105 at91_add_device_serial();
2106 /* USB Host */
2107 - set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH);
2108 at91_add_device_usbh(&cap9adk_usbh_data);
2109 + /* USB HS */
2110 + at91_add_device_usba(&cap9adk_usba_udc_data);
2111 /* SPI */
2112 at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices));
2113 /* Touchscreen */
2114 @@ -341,7 +346,6 @@
2115 /* I2C */
2116 at91_add_device_i2c(NULL, 0);
2117 /* LCD Controller */
2118 - set_irq_type(AT91CAP9_ID_LCDC, IRQT_HIGH);
2119 at91_add_device_lcdc(&cap9adk_lcdc_data);
2120 /* AC97 */
2121 at91_add_device_ac97(&cap9adk_ac97_data);
2122 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-carmeva.c linux-2.6/arch/arm/mach-at91/board-carmeva.c
2123 --- linux-2.6.25/arch/arm/mach-at91/board-carmeva.c 2008-05-03 00:15:33.000000000 +0200
2124 +++ linux-2.6/arch/arm/mach-at91/board-carmeva.c 2008-04-25 21:15:43.000000000 +0200
2125 @@ -40,24 +40,21 @@
2126 #include "generic.h"
2127
2128
2129 -/*
2130 - * Serial port configuration.
2131 - * 0 .. 3 = USART0 .. USART3
2132 - * 4 = DBGU
2133 - */
2134 -static struct at91_uart_config __initdata carmeva_uart_config = {
2135 - .console_tty = 0, /* ttyS0 */
2136 - .nr_tty = 2,
2137 - .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
2138 -};
2139 -
2140 static void __init carmeva_map_io(void)
2141 {
2142 /* Initialize processor: 20.000 MHz crystal */
2143 at91rm9200_initialize(20000000, AT91RM9200_BGA);
2144
2145 - /* Setup the serial ports and console */
2146 - at91_init_serial(&carmeva_uart_config);
2147 + /* DBGU on ttyS0. (Rx & Tx only) */
2148 + at91_register_uart(0, 0, 0);
2149 +
2150 + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
2151 + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
2152 + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
2153 + | ATMEL_UART_RI);
2154 +
2155 + /* set serial console to ttyS0 (ie, DBGU) */
2156 + at91_set_serial_console(0);
2157 }
2158
2159 static void __init carmeva_init_irq(void)
2160 @@ -117,6 +114,30 @@
2161 },
2162 };
2163
2164 +static struct gpio_led carmeva_leds[] = {
2165 + { /* "user led 1", LED9 */
2166 + .name = "led9",
2167 + .gpio = AT91_PIN_PA21,
2168 + .active_low = 1,
2169 + .default_trigger = "heartbeat",
2170 + },
2171 + { /* "user led 2", LED10 */
2172 + .name = "led10",
2173 + .gpio = AT91_PIN_PA25,
2174 + .active_low = 1,
2175 + },
2176 + { /* "user led 3", LED11 */
2177 + .name = "led11",
2178 + .gpio = AT91_PIN_PA26,
2179 + .active_low = 1,
2180 + },
2181 + { /* "user led 4", LED12 */
2182 + .name = "led12",
2183 + .gpio = AT91_PIN_PA18,
2184 + .active_low = 1,
2185 + }
2186 +};
2187 +
2188 static void __init carmeva_board_init(void)
2189 {
2190 /* Serial */
2191 @@ -135,6 +156,8 @@
2192 // at91_add_device_cf(&carmeva_cf_data);
2193 /* MMC */
2194 at91_add_device_mmc(0, &carmeva_mmc_data);
2195 + /* LEDs */
2196 + at91_gpio_leds(carmeva_leds, ARRAY_SIZE(carmeva_leds));
2197 }
2198
2199 MACHINE_START(CARMEVA, "Carmeva")
2200 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-chub.c linux-2.6/arch/arm/mach-at91/board-chub.c
2201 --- linux-2.6.25/arch/arm/mach-at91/board-chub.c 1970-01-01 02:00:00.000000000 +0200
2202 +++ linux-2.6/arch/arm/mach-at91/board-chub.c 2008-04-25 21:15:43.000000000 +0200
2203 @@ -0,0 +1,132 @@
2204 +/*
2205 + * linux/arch/arm/mach-at91/board-chub.c
2206 + *
2207 + * Copyright (C) 2005 SAN People, adapted for Promwad Chub board
2208 + * by Kuten Ivan
2209 + *
2210 + * This program is free software; you can redistribute it and/or modify
2211 + * it under the terms of the GNU General Public License as published by
2212 + * the Free Software Foundation; either version 2 of the License, or
2213 + * (at your option) any later version.
2214 + *
2215 + * This program is distributed in the hope that it will be useful,
2216 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2217 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2218 + * GNU General Public License for more details.
2219 + *
2220 + * You should have received a copy of the GNU General Public License
2221 + * along with this program; if not, write to the Free Software
2222 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
2223 + */
2224 +
2225 +#include <linux/types.h>
2226 +#include <linux/init.h>
2227 +#include <linux/mm.h>
2228 +#include <linux/module.h>
2229 +#include <linux/platform_device.h>
2230 +
2231 +#include <asm/hardware.h>
2232 +#include <asm/setup.h>
2233 +#include <asm/mach-types.h>
2234 +#include <asm/irq.h>
2235 +
2236 +#include <asm/mach/arch.h>
2237 +#include <asm/mach/map.h>
2238 +#include <asm/mach/irq.h>
2239 +
2240 +#include <asm/arch/board.h>
2241 +#include <asm/arch/gpio.h>
2242 +
2243 +#include "generic.h"
2244 +
2245 +/*
2246 + * Serial port configuration.
2247 + * 0 .. 3 = USART0 .. USART3
2248 + * 4 = DBGU
2249 + */
2250 +static struct at91_uart_config __initdata chub_uart_config = {
2251 + .console_tty = 0, /* ttyS0 */
2252 + .nr_tty = 5,
2253 + .tty_map = { 4, 0, 1, 2, 3 } /* ttyS0, ..., ttyS4 */
2254 +};
2255 +
2256 +static void __init chub_init_irq(void)
2257 +{
2258 + at91rm9200_init_interrupts(NULL);
2259 +}
2260 +
2261 +static void __init chub_map_io(void)
2262 +{
2263 + /* Initialize clocks: 18.432 MHz crystal */
2264 + at91rm9200_initialize(18432000, AT91RM9200_PQFP);
2265 +
2266 + /* Setup the serial ports and console */
2267 + at91_init_serial(&chub_uart_config);
2268 +}
2269 +
2270 +static struct at91_eth_data __initdata chub_eth_data = {
2271 + .phy_irq_pin = AT91_PIN_PB29,
2272 + .is_rmii = 0,
2273 +};
2274 +
2275 +static struct mtd_partition __initdata chub_nand_partition[] = {
2276 + {
2277 + .name = "NAND Partition 1",
2278 + .offset = 0,
2279 + .size = MTDPART_SIZ_FULL,
2280 + },
2281 +};
2282 +
2283 +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
2284 +{
2285 + *num_partitions = ARRAY_SIZE(chub_nand_partition);
2286 + return chub_nand_partition;
2287 +}
2288 +
2289 +static struct at91_nand_data __initdata chub_nand_data = {
2290 + .ale = 22,
2291 + .cle = 21,
2292 + .enable_pin = AT91_PIN_PA27,
2293 + .partition_info = nand_partitions,
2294 +};
2295 +
2296 +static struct spi_board_info chub_spi_devices[] = {
2297 + { /* DataFlash chip */
2298 + .modalias = "mtd_dataflash",
2299 + .chip_select = 0,
2300 + .max_speed_hz = 15 * 1000 * 1000,
2301 + },
2302 +};
2303 +
2304 +static void __init chub_board_init(void)
2305 +{
2306 + /* Serial */
2307 + at91_add_device_serial();
2308 + /* I2C */
2309 + at91_add_device_i2c(NULL, 0);
2310 + /* Ethernet */
2311 + at91_add_device_eth(&chub_eth_data);
2312 + /* SPI */
2313 + at91_add_device_spi(chub_spi_devices, ARRAY_SIZE(chub_spi_devices));
2314 + /* NAND Flash */
2315 + at91_add_device_nand(&chub_nand_data);
2316 + /* Disable write protect for NAND */
2317 + at91_set_gpio_output(AT91_PIN_PB7, 1);
2318 + /* Power enable for 3x RS-232 and 1x RS-485 */
2319 + at91_set_gpio_output(AT91_PIN_PB9, 1);
2320 + /* Disable write protect for FRAM */
2321 + at91_set_gpio_output(AT91_PIN_PA21, 1);
2322 + /* Disable write protect for Dataflash */
2323 + at91_set_gpio_output(AT91_PIN_PA19, 1);
2324 +}
2325 +
2326 +MACHINE_START(CHUB, "Promwad Chub")
2327 + /* Maintainer: Ivan Kuten AT Promwad DOT com */
2328 + .phys_io = AT91_BASE_SYS,
2329 + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
2330 + .boot_params = AT91_SDRAM_BASE + 0x100,
2331 + .timer = &at91rm9200_timer,
2332 + .map_io = chub_map_io,
2333 + .init_irq = chub_init_irq,
2334 + .init_machine = chub_board_init,
2335 +MACHINE_END
2336 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-csb337.c linux-2.6/arch/arm/mach-at91/board-csb337.c
2337 --- linux-2.6.25/arch/arm/mach-at91/board-csb337.c 2008-05-03 00:15:44.000000000 +0200
2338 +++ linux-2.6/arch/arm/mach-at91/board-csb337.c 2008-05-02 00:05:42.000000000 +0200
2339 @@ -61,6 +61,7 @@
2340
2341 /* Setup the LEDs */
2342 at91_init_leds(AT91_PIN_PB0, AT91_PIN_PB1);
2343 + at91_set_gpio_output(AT91_PIN_PB2, 1); /* third (unused) LED */
2344
2345 /* Setup the serial ports and console */
2346 at91_init_serial(&csb337_uart_config);
2347 @@ -202,11 +203,11 @@
2348
2349 static void __init csb300_add_device_buttons(void)
2350 {
2351 - at91_set_gpio_input(AT91_PIN_PB29, 0); /* sw0 */
2352 + at91_set_gpio_input(AT91_PIN_PB29, 1); /* sw0 */
2353 at91_set_deglitch(AT91_PIN_PB29, 1);
2354 - at91_set_gpio_input(AT91_PIN_PB28, 0); /* sw1 */
2355 + at91_set_gpio_input(AT91_PIN_PB28, 1); /* sw1 */
2356 at91_set_deglitch(AT91_PIN_PB28, 1);
2357 - at91_set_gpio_input(AT91_PIN_PA21, 0); /* sw2 */
2358 + at91_set_gpio_input(AT91_PIN_PA21, 1); /* sw2 */
2359 at91_set_deglitch(AT91_PIN_PA21, 1);
2360
2361 platform_device_register(&csb300_button_device);
2362 @@ -233,7 +234,7 @@
2363 .gpio = AT91_PIN_PB0,
2364 .active_low = 1,
2365 .default_trigger = "ide-disk",
2366 - },
2367 + }
2368 };
2369
2370
2371 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-csb637.c linux-2.6/arch/arm/mach-at91/board-csb637.c
2372 --- linux-2.6.25/arch/arm/mach-at91/board-csb637.c 2008-05-03 00:15:33.000000000 +0200
2373 +++ linux-2.6/arch/arm/mach-at91/board-csb637.c 2008-04-25 21:15:43.000000000 +0200
2374 @@ -40,27 +40,16 @@
2375 #include "generic.h"
2376
2377
2378 -/*
2379 - * Serial port configuration.
2380 - * 0 .. 3 = USART0 .. USART3
2381 - * 4 = DBGU
2382 - */
2383 -static struct at91_uart_config __initdata csb637_uart_config = {
2384 - .console_tty = 0, /* ttyS0 */
2385 - .nr_tty = 2,
2386 - .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
2387 -};
2388 -
2389 static void __init csb637_map_io(void)
2390 {
2391 /* Initialize processor: 3.6864 MHz crystal */
2392 at91rm9200_initialize(3686400, AT91RM9200_BGA);
2393
2394 - /* Setup the LEDs */
2395 - at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
2396 + /* DBGU on ttyS0. (Rx & Tx only) */
2397 + at91_register_uart(0, 0, 0);
2398
2399 - /* Setup the serial ports and console */
2400 - at91_init_serial(&csb637_uart_config);
2401 + /* make console=ttyS0 (ie, DBGU) the default */
2402 + at91_set_serial_console(0);
2403 }
2404
2405 static void __init csb637_init_irq(void)
2406 @@ -118,8 +107,19 @@
2407 .num_resources = ARRAY_SIZE(csb_flash_resources),
2408 };
2409
2410 +static struct gpio_led csb_leds[] = {
2411 + { /* "d1", red */
2412 + .name = "d1",
2413 + .gpio = AT91_PIN_PB2,
2414 + .active_low = 1,
2415 + .default_trigger = "heartbeat",
2416 + }
2417 +};
2418 +
2419 static void __init csb637_board_init(void)
2420 {
2421 + /* LED(s) */
2422 + at91_gpio_leds(csb_leds, ARRAY_SIZE(csb_leds));
2423 /* Serial */
2424 at91_add_device_serial();
2425 /* Ethernet */
2426 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-dk.c linux-2.6/arch/arm/mach-at91/board-dk.c
2427 --- linux-2.6.25/arch/arm/mach-at91/board-dk.c 2008-05-03 00:15:44.000000000 +0200
2428 +++ linux-2.6/arch/arm/mach-at91/board-dk.c 2008-05-03 00:44:06.000000000 +0200
2429 @@ -25,6 +25,7 @@
2430 #include <linux/init.h>
2431 #include <linux/mm.h>
2432 #include <linux/module.h>
2433 +#include <linux/dma-mapping.h>
2434 #include <linux/platform_device.h>
2435 #include <linux/spi/spi.h>
2436 #include <linux/mtd/physmap.h>
2437 @@ -45,17 +46,6 @@
2438 #include "generic.h"
2439
2440
2441 -/*
2442 - * Serial port configuration.
2443 - * 0 .. 3 = USART0 .. USART3
2444 - * 4 = DBGU
2445 - */
2446 -static struct at91_uart_config __initdata dk_uart_config = {
2447 - .console_tty = 0, /* ttyS0 */
2448 - .nr_tty = 2,
2449 - .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
2450 -};
2451 -
2452 static void __init dk_map_io(void)
2453 {
2454 /* Initialize processor: 18.432 MHz crystal */
2455 @@ -64,8 +54,16 @@
2456 /* Setup the LEDs */
2457 at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
2458
2459 - /* Setup the serial ports and console */
2460 - at91_init_serial(&dk_uart_config);
2461 + /* DBGU on ttyS0. (Rx & Tx only) */
2462 + at91_register_uart(0, 0, 0);
2463 +
2464 + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
2465 + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
2466 + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
2467 + | ATMEL_UART_RI);
2468 +
2469 + /* set serial console to ttyS0 (ie, DBGU) */
2470 + at91_set_serial_console(0);
2471 }
2472
2473 static void __init dk_init_irq(void)
2474 @@ -73,6 +71,185 @@
2475 at91rm9200_init_interrupts(NULL);
2476 }
2477
2478 +#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
2479 +#include <video/s1d13xxxfb.h>
2480 +#include <asm/arch/ics1523.h>
2481 +
2482 +/* EPSON S1D13806 FB */
2483 +#define AT91_FB_REG_BASE 0x30000000L
2484 +#define AT91_FB_REG_SIZE 0x200
2485 +#define AT91_FB_VMEM_BASE 0x30200000L
2486 +#define AT91_FB_VMEM_SIZE 0x140000L
2487 +
2488 +static void dk_init_video(void)
2489 +{
2490 + /* NWAIT Signal */
2491 + at91_set_A_periph(AT91_PIN_PC6, 0);
2492 +
2493 + /* Initialization of the Static Memory Controller for Chip Select 2 */
2494 + at91_sys_write(AT91_SMC_CSR(2), AT91_SMC_DBW_16 /* 16 bit */
2495 + | AT91_SMC_WSEN | AT91_SMC_NWS_(4) /* wait states */
2496 + | AT91_SMC_TDF_(1) /* float time */
2497 + );
2498 +
2499 + at91_ics1523_init();
2500 +}
2501 +
2502 +/* CRT: (active) 640x480 60Hz (PCLK=CLKI=25.175MHz)
2503 + Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
2504 +static const struct s1d13xxxfb_regval dk_s1dfb_initregs[] = {
2505 + {S1DREG_MISC, 0x00}, /* Enable Memory/Register select bit */
2506 + {S1DREG_COM_DISP_MODE, 0x00}, /* disable display output */
2507 + {S1DREG_GPIO_CNF0, 0x00},
2508 + {S1DREG_GPIO_CNF1, 0x00},
2509 + {S1DREG_GPIO_CTL0, 0x08},
2510 + {S1DREG_GPIO_CTL1, 0x00},
2511 + {S1DREG_CLK_CNF, 0x01}, /* no divide, MCLK source is CLKI3 0x02*/
2512 + {S1DREG_LCD_CLK_CNF, 0x00},
2513 + {S1DREG_CRT_CLK_CNF, 0x00},
2514 + {S1DREG_MPLUG_CLK_CNF, 0x00},
2515 + {S1DREG_CPU2MEM_WST_SEL, 0x01}, /* 2*period(MCLK) - 4ns > period(BCLK) */
2516 + {S1DREG_SDRAM_REF_RATE, 0x03}, /* 32768 <= MCLK <= 50000 (MHz) */
2517 + {S1DREG_SDRAM_TC0, 0x00}, /* MCLK source freq (MHz): */
2518 + {S1DREG_SDRAM_TC1, 0x01}, /* 42 <= MCLK <= 50 */
2519 + {S1DREG_MEM_CNF, 0x80}, /* SDRAM Initialization - needed before mem access */
2520 + {S1DREG_PANEL_TYPE, 0x25}, /* std TFT 16bit, 8bit SCP format 2, single passive LCD */
2521 + {S1DREG_MOD_RATE, 0x00}, /* toggle every FPFRAME */
2522 + {S1DREG_LCD_DISP_HWIDTH, 0x4F}, /* 680 pix */
2523 + {S1DREG_LCD_NDISP_HPER, 0x12}, /* 152 pix */
2524 + {S1DREG_TFT_FPLINE_START, 0x01}, /* 13 pix */
2525 + {S1DREG_TFT_FPLINE_PWIDTH, 0x0B}, /* 96 pix */
2526 + {S1DREG_LCD_DISP_VHEIGHT0, 0xDF},
2527 + {S1DREG_LCD_DISP_VHEIGHT1, 0x01}, /* 480 lines */
2528 + {S1DREG_LCD_NDISP_VPER, 0x2C}, /* 44 lines */
2529 + {S1DREG_TFT_FPFRAME_START, 0x0A}, /* 10 lines */
2530 + {S1DREG_TFT_FPFRAME_PWIDTH, 0x01}, /* 2 lines */
2531 + {S1DREG_LCD_DISP_MODE, 0x05}, /* 16 bpp */
2532 + {S1DREG_LCD_MISC, 0x00}, /* dithering enabled, dual panel buffer enabled */
2533 + {S1DREG_LCD_DISP_START0, 0x00},
2534 + {S1DREG_LCD_DISP_START1, 0xC8},
2535 + {S1DREG_LCD_DISP_START2, 0x00},
2536 + {S1DREG_LCD_MEM_OFF0, 0x80},
2537 + {S1DREG_LCD_MEM_OFF1, 0x02},
2538 + {S1DREG_LCD_PIX_PAN, 0x00},
2539 + {S1DREG_LCD_DISP_FIFO_HTC, 0x3B},
2540 + {S1DREG_LCD_DISP_FIFO_LTC, 0x3C},
2541 + {S1DREG_CRT_DISP_HWIDTH, 0x4F}, /* 680 pix */
2542 + {S1DREG_CRT_NDISP_HPER, 0x13}, /* 160 pix */
2543 + {S1DREG_CRT_HRTC_START, 0x01}, /* 13 pix */
2544 + {S1DREG_CRT_HRTC_PWIDTH, 0x0B}, /* 96 pix */
2545 + {S1DREG_CRT_DISP_VHEIGHT0, 0xDF},
2546 + {S1DREG_CRT_DISP_VHEIGHT1, 0x01}, /* 480 lines */
2547 + {S1DREG_CRT_NDISP_VPER, 0x2B}, /* 44 lines */
2548 + {S1DREG_CRT_VRTC_START, 0x09}, /* 10 lines */
2549 + {S1DREG_CRT_VRTC_PWIDTH, 0x01}, /* 2 lines */
2550 + {S1DREG_TV_OUT_CTL, 0x10},
2551 + {S1DREG_CRT_DISP_MODE, 0x05}, /* 16 bpp */
2552 + {S1DREG_CRT_DISP_START0, 0x00},
2553 + {S1DREG_CRT_DISP_START1, 0x00},
2554 + {S1DREG_CRT_DISP_START2, 0x00},
2555 + {S1DREG_CRT_MEM_OFF0, 0x80},
2556 + {S1DREG_CRT_MEM_OFF1, 0x02},
2557 + {S1DREG_CRT_PIX_PAN, 0x00},
2558 + {S1DREG_CRT_DISP_FIFO_HTC, 0x3B},
2559 + {S1DREG_CRT_DISP_FIFO_LTC, 0x3C},
2560 + {S1DREG_LCD_CUR_CTL, 0x00}, /* inactive */
2561 + {S1DREG_LCD_CUR_START, 0x01},
2562 + {S1DREG_LCD_CUR_XPOS0, 0x00},
2563 + {S1DREG_LCD_CUR_XPOS1, 0x00},
2564 + {S1DREG_LCD_CUR_YPOS0, 0x00},
2565 + {S1DREG_LCD_CUR_YPOS1, 0x00},
2566 + {S1DREG_LCD_CUR_BCTL0, 0x00},
2567 + {S1DREG_LCD_CUR_GCTL0, 0x00},
2568 + {S1DREG_LCD_CUR_RCTL0, 0x00},
2569 + {S1DREG_LCD_CUR_BCTL1, 0x1F},
2570 + {S1DREG_LCD_CUR_GCTL1, 0x3F},
2571 + {S1DREG_LCD_CUR_RCTL1, 0x1F},
2572 + {S1DREG_LCD_CUR_FIFO_HTC, 0x00},
2573 + {S1DREG_CRT_CUR_CTL, 0x00}, /* inactive */
2574 + {S1DREG_CRT_CUR_START, 0x01},
2575 + {S1DREG_CRT_CUR_XPOS0, 0x00},
2576 + {S1DREG_CRT_CUR_XPOS1, 0x00},
2577 + {S1DREG_CRT_CUR_YPOS0, 0x00},
2578 + {S1DREG_CRT_CUR_YPOS1, 0x00},
2579 + {S1DREG_CRT_CUR_BCTL0, 0x00},
2580 + {S1DREG_CRT_CUR_GCTL0, 0x00},
2581 + {S1DREG_CRT_CUR_RCTL0, 0x00},
2582 + {S1DREG_CRT_CUR_BCTL1, 0x1F},
2583 + {S1DREG_CRT_CUR_GCTL1, 0x3F},
2584 + {S1DREG_CRT_CUR_RCTL1, 0x1F},
2585 + {S1DREG_CRT_CUR_FIFO_HTC, 0x00},
2586 + {S1DREG_BBLT_CTL0, 0x00},
2587 + {S1DREG_BBLT_CTL0, 0x00},
2588 + {S1DREG_BBLT_CC_EXP, 0x00},
2589 + {S1DREG_BBLT_OP, 0x00},
2590 + {S1DREG_BBLT_SRC_START0, 0x00},
2591 + {S1DREG_BBLT_SRC_START1, 0x00},
2592 + {S1DREG_BBLT_SRC_START2, 0x00},
2593 + {S1DREG_BBLT_DST_START0, 0x00},
2594 + {S1DREG_BBLT_DST_START1, 0x00},
2595 + {S1DREG_BBLT_DST_START2, 0x00},
2596 + {S1DREG_BBLT_MEM_OFF0, 0x00},
2597 + {S1DREG_BBLT_MEM_OFF1, 0x00},
2598 + {S1DREG_BBLT_WIDTH0, 0x00},
2599 + {S1DREG_BBLT_WIDTH1, 0x00},
2600 + {S1DREG_BBLT_HEIGHT0, 0x00},
2601 + {S1DREG_BBLT_HEIGHT1, 0x00},
2602 + {S1DREG_BBLT_BGC0, 0x00},
2603 + {S1DREG_BBLT_BGC1, 0x00},
2604 + {S1DREG_BBLT_FGC0, 0x00},
2605 + {S1DREG_BBLT_FGC1, 0x00},
2606 + {S1DREG_LKUP_MODE, 0x00}, /* LCD LUT r | LCD and CRT/TV LUT w */
2607 + {S1DREG_LKUP_ADDR, 0x00},
2608 + {S1DREG_PS_CNF, 0x00}, /* Power Save disable */
2609 + {S1DREG_PS_STATUS, 0x02}, /* LCD Panel down, mem up */
2610 + {S1DREG_CPU2MEM_WDOGT, 0x00},
2611 + {S1DREG_COM_DISP_MODE, 0x02}, /* enable CRT display output */
2612 +};
2613 +
2614 +static struct s1d13xxxfb_pdata dk_s1dfb_pdata = {
2615 + .initregs = dk_s1dfb_initregs,
2616 + .initregssize = ARRAY_SIZE(dk_s1dfb_initregs),
2617 + .platform_init_video = dk_init_video,
2618 +};
2619 +
2620 +static u64 s1dfb_dmamask = DMA_BIT_MASK(32);
2621 +
2622 +static struct resource dk_s1dfb_resource[] = {
2623 + [0] = { /* video mem */
2624 + .name = "s1d13806 memory",
2625 + .start = AT91_FB_VMEM_BASE,
2626 + .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
2627 + .flags = IORESOURCE_MEM,
2628 + },
2629 + [1] = { /* video registers */
2630 + .name = "s1d13806 registers",
2631 + .start = AT91_FB_REG_BASE,
2632 + .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
2633 + .flags = IORESOURCE_MEM,
2634 + },
2635 +};
2636 +
2637 +static struct platform_device dk_s1dfb_device = {
2638 + .name = "s1d13806fb",
2639 + .id = -1,
2640 + .dev = {
2641 + .dma_mask = &s1dfb_dmamask,
2642 + .coherent_dma_mask = DMA_BIT_MASK(32),
2643 + .platform_data = &dk_s1dfb_pdata,
2644 + },
2645 + .resource = dk_s1dfb_resource,
2646 + .num_resources = ARRAY_SIZE(dk_s1dfb_resource),
2647 +};
2648 +
2649 +static void __init dk_add_device_video(void)
2650 +{
2651 + platform_device_register(&dk_s1dfb_device);
2652 +}
2653 +#else
2654 +static void __init dk_add_device_video(void) {}
2655 +#endif
2656 +
2657 static struct at91_eth_data __initdata dk_eth_data = {
2658 .phy_irq_pin = AT91_PIN_PC4,
2659 .is_rmii = 1,
2660 @@ -164,7 +341,7 @@
2661 #define DK_FLASH_SIZE 0x200000
2662
2663 static struct physmap_flash_data dk_flash_data = {
2664 - .width = 2,
2665 + .width = 2,
2666 };
2667
2668 static struct resource dk_flash_resource = {
2669 @@ -223,8 +400,12 @@
2670 platform_device_register(&dk_flash);
2671 /* LEDs */
2672 at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds));
2673 + /* SSC (to LM4549 audio codec) */
2674 + at91_add_device_ssc(AT91RM9200_ID_SSC1, ATMEL_SSC_TD | ATMEL_SSC_RX);
2675 + /* SSC (to SI3021 line interface) */
2676 + at91_add_device_ssc(AT91RM9200_ID_SSC2, ATMEL_SSC_TD | ATMEL_SSC_TK | ATMEL_SSC_RD | ATMEL_SSC_RF);
2677 /* VGA */
2678 -// dk_add_device_video();
2679 + dk_add_device_video();
2680 }
2681
2682 MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
2683 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-eb9200.c linux-2.6/arch/arm/mach-at91/board-eb9200.c
2684 --- linux-2.6.25/arch/arm/mach-at91/board-eb9200.c 2008-05-03 00:15:33.000000000 +0200
2685 +++ linux-2.6/arch/arm/mach-at91/board-eb9200.c 2008-04-25 21:15:43.000000000 +0200
2686 @@ -40,24 +40,24 @@
2687 #include "generic.h"
2688
2689
2690 -/*
2691 - * Serial port configuration.
2692 - * 0 .. 3 = USART0 .. USART3
2693 - * 4 = DBGU
2694 - */
2695 -static struct at91_uart_config __initdata eb9200_uart_config = {
2696 - .console_tty = 0, /* ttyS0 */
2697 - .nr_tty = 2,
2698 - .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
2699 -};
2700 -
2701 static void __init eb9200_map_io(void)
2702 {
2703 /* Initialize processor: 18.432 MHz crystal */
2704 at91rm9200_initialize(18432000, AT91RM9200_BGA);
2705
2706 - /* Setup the serial ports and console */
2707 - at91_init_serial(&eb9200_uart_config);
2708 + /* DBGU on ttyS0. (Rx & Tx only) */
2709 + at91_register_uart(0, 0, 0);
2710 +
2711 + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
2712 + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
2713 + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
2714 + | ATMEL_UART_RI);
2715 +
2716 + /* USART2 on ttyS2. (Rx, Tx) - IRDA */
2717 + at91_register_uart(AT91RM9200_ID_US2, 2, 0);
2718 +
2719 + /* set serial console to ttyS0 (ie, DBGU) */
2720 + at91_set_serial_console(0);
2721 }
2722
2723 static void __init eb9200_init_irq(void)
2724 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-ecbat91.c linux-2.6/arch/arm/mach-at91/board-ecbat91.c
2725 --- linux-2.6.25/arch/arm/mach-at91/board-ecbat91.c 1970-01-01 02:00:00.000000000 +0200
2726 +++ linux-2.6/arch/arm/mach-at91/board-ecbat91.c 2008-04-25 21:15:43.000000000 +0200
2727 @@ -0,0 +1,178 @@
2728 +/*
2729 + * linux/arch/arm/mach-at91rm9200/board-ecbat91.c
2730 + * Copyright (C) 2007 emQbit.com.
2731 + *
2732 + * We started from board-dk.c, which is Copyright (C) 2005 SAN People.
2733 + *
2734 + * This program is free software; you can redistribute it and/or modify
2735 + * it under the terms of the GNU General Public License as published by
2736 + * the Free Software Foundation; either version 2 of the License, or
2737 + * (at your option) any later version.
2738 + *
2739 + * This program is distributed in the hope that it will be useful,
2740 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2741 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2742 + * GNU General Public License for more details.
2743 + *
2744 + * You should have received a copy of the GNU General Public License
2745 + * along with this program; if not, write to the Free Software
2746 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
2747 + */
2748 +
2749 +#include <linux/types.h>
2750 +#include <linux/init.h>
2751 +#include <linux/mm.h>
2752 +#include <linux/module.h>
2753 +#include <linux/platform_device.h>
2754 +#include <linux/spi/spi.h>
2755 +#include <linux/spi/flash.h>
2756 +
2757 +#include <asm/hardware.h>
2758 +#include <asm/setup.h>
2759 +#include <asm/mach-types.h>
2760 +#include <asm/irq.h>
2761 +
2762 +#include <asm/mach/arch.h>
2763 +#include <asm/mach/map.h>
2764 +#include <asm/mach/irq.h>
2765 +
2766 +#include <asm/arch/board.h>
2767 +#include <asm/arch/gpio.h>
2768 +
2769 +#include "generic.h"
2770 +
2771 +
2772 +static void __init ecb_at91map_io(void)
2773 +{
2774 + /* Initialize processor: 18.432 MHz crystal */
2775 + at91rm9200_initialize(18432000, AT91RM9200_PQFP);
2776 +
2777 + /* Setup the LEDs */
2778 + at91_init_leds(AT91_PIN_PC7, AT91_PIN_PC7);
2779 +
2780 + /* DBGU on ttyS0. (Rx & Tx only) */
2781 + at91_register_uart(0, 0, 0);
2782 +
2783 + /* USART0 on ttyS1. (Rx & Tx only) */
2784 + at91_register_uart(AT91RM9200_ID_US0, 1, 0);
2785 +
2786 + /* set serial console to ttyS0 (ie, DBGU) */
2787 + at91_set_serial_console(0);
2788 +}
2789 +
2790 +static void __init ecb_at91init_irq(void)
2791 +{
2792 + at91rm9200_init_interrupts(NULL);
2793 +}
2794 +
2795 +static struct at91_eth_data __initdata ecb_at91eth_data = {
2796 + .phy_irq_pin = AT91_PIN_PC4,
2797 + .is_rmii = 0,
2798 +};
2799 +
2800 +static struct at91_usbh_data __initdata ecb_at91usbh_data = {
2801 + .ports = 1,
2802 +};
2803 +
2804 +static struct at91_mmc_data __initdata ecb_at91mmc_data = {
2805 + .slot_b = 0,
2806 + .wire4 = 1,
2807 +};
2808 +
2809 +
2810 +#if defined(CONFIG_MTD_DATAFLASH)
2811 +static struct mtd_partition __initdata my_flash0_partitions[] =
2812 +{
2813 + { /* 0x8400 */
2814 + .name = "Darrell-loader",
2815 + .offset = 0,
2816 + .size = 12* 1056,
2817 + },
2818 + {
2819 + .name = "U-boot",
2820 + .offset = MTDPART_OFS_NXTBLK,
2821 + .size = 110 * 1056,
2822 + },
2823 + { /* 1336 (167 blocks) pages * 1056 bytes = 0x158700 bytes */
2824 + .name = "Uoot-env",
2825 + .offset = MTDPART_OFS_NXTBLK,
2826 + .size = 8 * 1056,
2827 + },
2828 + { /* 1336 (167 blocks) pages * 1056 bytes = 0x158700 bytes */
2829 + .name = "Kernel",
2830 + .offset = MTDPART_OFS_NXTBLK,
2831 + .size = 1534 * 1056,
2832 + },
2833 + { /* 190200 - jffs2 root filesystem */
2834 + .name = "Filesystem",
2835 + .offset = MTDPART_OFS_NXTBLK,
2836 + .size = MTDPART_SIZ_FULL, /* 26 sectors */
2837 + }
2838 +};
2839 +
2840 +static struct flash_platform_data __initdata my_flash0_platform = {
2841 + .name = "Removable flash card",
2842 + .parts = my_flash0_partitions,
2843 + .nr_parts = ARRAY_SIZE(my_flash0_partitions)
2844 +};
2845 +
2846 +#endif
2847 +
2848 +static struct spi_board_info __initdata ecb_at91spi_devices[] = {
2849 + { /* DataFlash chip */
2850 + .modalias = "mtd_dataflash",
2851 + .chip_select = 0,
2852 + .max_speed_hz = 10 * 1000 * 1000,
2853 + .bus_num = 0,
2854 +#if defined(CONFIG_MTD_DATAFLASH)
2855 + .platform_data = &my_flash0_platform,
2856 +#endif
2857 + },
2858 + { /* User accessable spi - cs1 (250KHz) */
2859 + .modalias = "spi-cs1",
2860 + .chip_select = 1,
2861 + .max_speed_hz = 250 * 1000,
2862 + },
2863 + { /* User accessable spi - cs2 (1MHz) */
2864 + .modalias = "spi-cs2",
2865 + .chip_select = 2,
2866 + .max_speed_hz = 1 * 1000 * 1000,
2867 + },
2868 + { /* User accessable spi - cs3 (10MHz) */
2869 + .modalias = "spi-cs3",
2870 + .chip_select = 3,
2871 + .max_speed_hz = 10 * 1000 * 1000,
2872 + },
2873 +};
2874 +
2875 +static void __init ecb_at91board_init(void)
2876 +{
2877 + /* Serial */
2878 + at91_add_device_serial();
2879 +
2880 + /* Ethernet */
2881 + at91_add_device_eth(&ecb_at91eth_data);
2882 +
2883 + /* USB Host */
2884 + at91_add_device_usbh(&ecb_at91usbh_data);
2885 +
2886 + /* I2C */
2887 + at91_add_device_i2c(NULL, 0);
2888 +
2889 + /* MMC */
2890 + at91_add_device_mmc(0, &ecb_at91mmc_data);
2891 +
2892 + /* SPI */
2893 + at91_add_device_spi(ecb_at91spi_devices, ARRAY_SIZE(ecb_at91spi_devices));
2894 +}
2895 +
2896 +MACHINE_START(ECBAT91, "emQbit's ECB_AT91")
2897 + /* Maintainer: emQbit.com */
2898 + .phys_io = AT91_BASE_SYS,
2899 + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
2900 + .boot_params = AT91_SDRAM_BASE + 0x100,
2901 + .timer = &at91rm9200_timer,
2902 + .map_io = ecb_at91map_io,
2903 + .init_irq = ecb_at91init_irq,
2904 + .init_machine = ecb_at91board_init,
2905 +MACHINE_END
2906 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-ek.c linux-2.6/arch/arm/mach-at91/board-ek.c
2907 --- linux-2.6.25/arch/arm/mach-at91/board-ek.c 2008-05-03 00:15:44.000000000 +0200
2908 +++ linux-2.6/arch/arm/mach-at91/board-ek.c 2008-05-03 00:44:38.000000000 +0200
2909 @@ -25,6 +25,7 @@
2910 #include <linux/init.h>
2911 #include <linux/mm.h>
2912 #include <linux/module.h>
2913 +#include <linux/dma-mapping.h>
2914 #include <linux/platform_device.h>
2915 #include <linux/spi/spi.h>
2916 #include <linux/mtd/physmap.h>
2917 @@ -45,17 +46,6 @@
2918 #include "generic.h"
2919
2920
2921 -/*
2922 - * Serial port configuration.
2923 - * 0 .. 3 = USART0 .. USART3
2924 - * 4 = DBGU
2925 - */
2926 -static struct at91_uart_config __initdata ek_uart_config = {
2927 - .console_tty = 0, /* ttyS0 */
2928 - .nr_tty = 2,
2929 - .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
2930 -};
2931 -
2932 static void __init ek_map_io(void)
2933 {
2934 /* Initialize processor: 18.432 MHz crystal */
2935 @@ -64,8 +54,16 @@
2936 /* Setup the LEDs */
2937 at91_init_leds(AT91_PIN_PB1, AT91_PIN_PB2);
2938
2939 - /* Setup the serial ports and console */
2940 - at91_init_serial(&ek_uart_config);
2941 + /* DBGU on ttyS0. (Rx & Tx only) */
2942 + at91_register_uart(0, 0, 0);
2943 +
2944 + /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
2945 + at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
2946 + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
2947 + | ATMEL_UART_RI);
2948 +
2949 + /* set serial console to ttyS0 (ie, DBGU) */
2950 + at91_set_serial_console(0);
2951 }
2952
2953 static void __init ek_init_irq(void)
2954 @@ -73,6 +71,187 @@
2955 at91rm9200_init_interrupts(NULL);
2956 }
2957
2958 +#if defined(CONFIG_FB_S1D13XXX) || defined(CONFIG_FB_S1D13XXX_MODULE)
2959 +#include <video/s1d13xxxfb.h>
2960 +#include <asm/arch/ics1523.h>
2961 +
2962 +/* EPSON S1D13806 FB */
2963 +#define AT91_FB_REG_BASE 0x40000000L
2964 +#define AT91_FB_REG_SIZE 0x200
2965 +#define AT91_FB_VMEM_BASE 0x40200000L
2966 +#define AT91_FB_VMEM_SIZE 0x140000L
2967 +
2968 +static void ek_init_video(void)
2969 +{
2970 + /* NWAIT Signal */
2971 + at91_set_A_periph(AT91_PIN_PC6, 0);
2972 +
2973 + /* Initialization of the Static Memory Controller for Chip Select 3 */
2974 + at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_DBW_16 /* 16 bit */
2975 + | AT91_SMC_WSEN | AT91_SMC_NWS_(5) /* wait states */
2976 + | AT91_SMC_TDF_(1) /* float time */
2977 + );
2978 +
2979 + at91_ics1523_init();
2980 +}
2981 +
2982 +/* CRT: (active) 640x480 60Hz (PCLK=CLKI=25.175MHz)
2983 + Memory: Embedded SDRAM (MCLK=CLKI3=50.000MHz) (BUSCLK=60.000MHz) */
2984 +static const struct s1d13xxxfb_regval ek_s1dfb_initregs[] = {
2985 + {S1DREG_MISC, 0x00}, /* Enable Memory/Register select bit */
2986 + {S1DREG_COM_DISP_MODE, 0x00}, /* disable display output */
2987 + {S1DREG_GPIO_CNF0, 0xFF}, // 0x00
2988 + {S1DREG_GPIO_CNF1, 0x1F}, // 0x08
2989 + {S1DREG_GPIO_CTL0, 0x00},
2990 + {S1DREG_GPIO_CTL1, 0x00},
2991 + {S1DREG_CLK_CNF, 0x01}, /* no divide, MCLK source is CLKI3 0x02*/
2992 + {S1DREG_LCD_CLK_CNF, 0x00},
2993 + {S1DREG_CRT_CLK_CNF, 0x00},
2994 + {S1DREG_MPLUG_CLK_CNF, 0x00},
2995 + {S1DREG_CPU2MEM_WST_SEL, 0x01}, /* 2*period(MCLK) - 4ns > period(BCLK) */
2996 + {S1DREG_SDRAM_REF_RATE, 0x03}, /* 32768 <= MCLK <= 50000 (MHz) */
2997 + {S1DREG_SDRAM_TC0, 0x00}, /* MCLK source freq (MHz): */
2998 + {S1DREG_SDRAM_TC1, 0x01}, /* 42 <= MCLK <= 50 */
2999 + {S1DREG_MEM_CNF, 0x80}, /* SDRAM Initialization - needed before mem access */
3000 + {S1DREG_PANEL_TYPE, 0x25}, /* std TFT 16bit, 8bit SCP format 2, single passive LCD */
3001 + {S1DREG_MOD_RATE, 0x00}, /* toggle every FPFRAME */
3002 + {S1DREG_LCD_DISP_HWIDTH, 0x4F}, /* 680 pix */
3003 + {S1DREG_LCD_NDISP_HPER, 0x12}, /* 152 pix */
3004 + {S1DREG_TFT_FPLINE_START, 0x01}, /* 13 pix */
3005 + {S1DREG_TFT_FPLINE_PWIDTH, 0x0B}, /* 96 pix */
3006 + {S1DREG_LCD_DISP_VHEIGHT0, 0xDF},
3007 + {S1DREG_LCD_DISP_VHEIGHT1, 0x01}, /* 480 lines */
3008 + {S1DREG_LCD_NDISP_VPER, 0x2C}, /* 44 lines */
3009 + {S1DREG_TFT_FPFRAME_START, 0x0A}, /* 10 lines */
3010 + {S1DREG_TFT_FPFRAME_PWIDTH, 0x01}, /* 2 lines */
3011 + {S1DREG_LCD_DISP_MODE, 0x05}, /* 16 bpp */
3012 + {S1DREG_LCD_MISC, 0x00}, /* dithering enabled, dual panel buffer enabled */
3013 + {S1DREG_LCD_DISP_START0, 0x00},
3014 + {S1DREG_LCD_DISP_START1, 0xC8},
3015 + {S1DREG_LCD_DISP_START2, 0x00},
3016 + {S1DREG_LCD_MEM_OFF0, 0x80},
3017 + {S1DREG_LCD_MEM_OFF1, 0x02},
3018 + {S1DREG_LCD_PIX_PAN, 0x00},
3019 + {S1DREG_LCD_DISP_FIFO_HTC, 0x3B},
3020 + {S1DREG_LCD_DISP_FIFO_LTC, 0x3C},
3021 + {S1DREG_CRT_DISP_HWIDTH, 0x4F}, /* 680 pix */
3022 + {S1DREG_CRT_NDISP_HPER, 0x13}, /* 160 pix */
3023 + {S1DREG_CRT_HRTC_START, 0x01}, /* 13 pix */
3024 + {S1DREG_CRT_HRTC_PWIDTH, 0x0B}, /* 96 pix */
3025 + {S1DREG_CRT_DISP_VHEIGHT0, 0xDF},
3026 + {S1DREG_CRT_DISP_VHEIGHT1, 0x01}, /* 480 lines */
3027 + {S1DREG_CRT_NDISP_VPER, 0x2B}, /* 44 lines */
3028 + {S1DREG_CRT_VRTC_START, 0x09}, /* 10 lines */
3029 + {S1DREG_CRT_VRTC_PWIDTH, 0x01}, /* 2 lines */
3030 + {S1DREG_TV_OUT_CTL, 0x10},
3031 + {0x005E, 0x9F},
3032 + {0x005F, 0x00},
3033 + {S1DREG_CRT_DISP_MODE, 0x05}, /* 16 bpp */
3034 + {S1DREG_CRT_DISP_START0, 0x00},
3035 + {S1DREG_CRT_DISP_START1, 0x00},
3036 + {S1DREG_CRT_DISP_START2, 0x00},
3037 + {S1DREG_CRT_MEM_OFF0, 0x80},
3038 + {S1DREG_CRT_MEM_OFF1, 0x02},
3039 + {S1DREG_CRT_PIX_PAN, 0x00},
3040 + {S1DREG_CRT_DISP_FIFO_HTC, 0x3B},
3041 + {S1DREG_CRT_DISP_FIFO_LTC, 0x3C},
3042 + {S1DREG_LCD_CUR_CTL, 0x00}, /* inactive */
3043 + {S1DREG_LCD_CUR_START, 0x01},
3044 + {S1DREG_LCD_CUR_XPOS0, 0x00},
3045 + {S1DREG_LCD_CUR_XPOS1, 0x00},
3046 + {S1DREG_LCD_CUR_YPOS0, 0x00},
3047 + {S1DREG_LCD_CUR_YPOS1, 0x00},
3048 + {S1DREG_LCD_CUR_BCTL0, 0x00},
3049 + {S1DREG_LCD_CUR_GCTL0, 0x00},
3050 + {S1DREG_LCD_CUR_RCTL0, 0x00},
3051 + {S1DREG_LCD_CUR_BCTL1, 0x1F},
3052 + {S1DREG_LCD_CUR_GCTL1, 0x3F},
3053 + {S1DREG_LCD_CUR_RCTL1, 0x1F},
3054 + {S1DREG_LCD_CUR_FIFO_HTC, 0x00},
3055 + {S1DREG_CRT_CUR_CTL, 0x00}, /* inactive */
3056 + {S1DREG_CRT_CUR_START, 0x01},
3057 + {S1DREG_CRT_CUR_XPOS0, 0x00},
3058 + {S1DREG_CRT_CUR_XPOS1, 0x00},
3059 + {S1DREG_CRT_CUR_YPOS0, 0x00},
3060 + {S1DREG_CRT_CUR_YPOS1, 0x00},
3061 + {S1DREG_CRT_CUR_BCTL0, 0x00},
3062 + {S1DREG_CRT_CUR_GCTL0, 0x00},
3063 + {S1DREG_CRT_CUR_RCTL0, 0x00},
3064 + {S1DREG_CRT_CUR_BCTL1, 0x1F},
3065 + {S1DREG_CRT_CUR_GCTL1, 0x3F},
3066 + {S1DREG_CRT_CUR_RCTL1, 0x1F},
3067 + {S1DREG_CRT_CUR_FIFO_HTC, 0x00},
3068 + {S1DREG_BBLT_CTL0, 0x00},
3069 + {S1DREG_BBLT_CTL0, 0x00},
3070 + {S1DREG_BBLT_CC_EXP, 0x00},
3071 + {S1DREG_BBLT_OP, 0x00},
3072 + {S1DREG_BBLT_SRC_START0, 0x00},
3073 + {S1DREG_BBLT_SRC_START1, 0x00},
3074 + {S1DREG_BBLT_SRC_START2, 0x00},
3075 + {S1DREG_BBLT_DST_START0, 0x00},
3076 + {S1DREG_BBLT_DST_START1, 0x00},
3077 + {S1DREG_BBLT_DST_START2, 0x00},
3078 + {S1DREG_BBLT_MEM_OFF0, 0x00},
3079 + {S1DREG_BBLT_MEM_OFF1, 0x00},
3080 + {S1DREG_BBLT_WIDTH0, 0x00},
3081 + {S1DREG_BBLT_WIDTH1, 0x00},
3082 + {S1DREG_BBLT_HEIGHT0, 0x00},
3083 + {S1DREG_BBLT_HEIGHT1, 0x00},
3084 + {S1DREG_BBLT_BGC0, 0x00},
3085 + {S1DREG_BBLT_BGC1, 0x00},
3086 + {S1DREG_BBLT_FGC0, 0x00},
3087 + {S1DREG_BBLT_FGC1, 0x00},
3088 + {S1DREG_LKUP_MODE, 0x00}, /* LCD LUT r | LCD and CRT/TV LUT w */
3089 + {S1DREG_LKUP_ADDR, 0x00},
3090 + {S1DREG_PS_CNF, 0x10}, /* Power Save disable */
3091 + {S1DREG_PS_STATUS, 0x02}, /* LCD Panel down, mem up */
3092 + {S1DREG_CPU2MEM_WDOGT, 0x00},
3093 + {S1DREG_COM_DISP_MODE, 0x02}, /* enable CRT display output */
3094 +};
3095 +
3096 +static struct s1d13xxxfb_pdata ek_s1dfb_pdata = {
3097 + .initregs = ek_s1dfb_initregs,
3098 + .initregssize = ARRAY_SIZE(ek_s1dfb_initregs),
3099 + .platform_init_video = ek_init_video,
3100 +};
3101 +
3102 +static u64 s1dfb_dmamask = DMA_BIT_MASK(32);
3103 +
3104 +static struct resource ek_s1dfb_resource[] = {
3105 + [0] = { /* video mem */
3106 + .name = "s1d13806 memory",
3107 + .start = AT91_FB_VMEM_BASE,
3108 + .end = AT91_FB_VMEM_BASE + AT91_FB_VMEM_SIZE -1,
3109 + .flags = IORESOURCE_MEM,
3110 + },
3111 + [1] = { /* video registers */
3112 + .name = "s1d13806 registers",
3113 + .start = AT91_FB_REG_BASE,
3114 + .end = AT91_FB_REG_BASE + AT91_FB_REG_SIZE -1,
3115 + .flags = IORESOURCE_MEM,
3116 + },
3117 +};
3118 +
3119 +static struct platform_device ek_s1dfb_device = {
3120 + .name = "s1d13806fb",
3121 + .id = -1,
3122 + .dev = {
3123 + .dma_mask = &s1dfb_dmamask,
3124 + .coherent_dma_mask = DMA_BIT_MASK(32),
3125 + .platform_data = &ek_s1dfb_pdata,
3126 + },
3127 + .resource = ek_s1dfb_resource,
3128 + .num_resources = ARRAY_SIZE(ek_s1dfb_resource),
3129 +};
3130 +
3131 +static void __init ek_add_device_video(void)
3132 +{
3133 + platform_device_register(&ek_s1dfb_device);
3134 +}
3135 +#else
3136 +static void __init ek_add_device_video(void) {}
3137 +#endif
3138 +
3139 static struct at91_eth_data __initdata ek_eth_data = {
3140 .phy_irq_pin = AT91_PIN_PC4,
3141 .is_rmii = 1,
3142 @@ -122,7 +301,7 @@
3143 #define EK_FLASH_SIZE 0x200000
3144
3145 static struct physmap_flash_data ek_flash_data = {
3146 - .width = 2,
3147 + .width = 2,
3148 };
3149
3150 static struct resource ek_flash_resource = {
3151 @@ -189,7 +368,7 @@
3152 /* LEDs */
3153 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
3154 /* VGA */
3155 -// ek_add_device_video();
3156 + ek_add_device_video();
3157 }
3158
3159 MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK")
3160 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-homematic.c linux-2.6/arch/arm/mach-at91/board-homematic.c
3161 --- linux-2.6.25/arch/arm/mach-at91/board-homematic.c 1970-01-01 02:00:00.000000000 +0200
3162 +++ linux-2.6/arch/arm/mach-at91/board-homematic.c 2008-04-25 21:15:43.000000000 +0200
3163 @@ -0,0 +1,163 @@
3164 +/*
3165 + * linux/arch/arm/mach-at91/board-homematic.c
3166 + *
3167 + * Copyright (C) 2007 eQ-3 Entwicklung GmbH
3168 + *
3169 + * based on work
3170 + * Copyright (C) 2005 SAN People
3171 + *
3172 + * This program is free software; you can redistribute it and/or modify
3173 + * it under the terms of the GNU General Public License as published by
3174 + * the Free Software Foundation; either version 2 of the License, or
3175 + * (at your option) any later version.
3176 + *
3177 + * This program is distributed in the hope that it will be useful,
3178 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3179 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3180 + * GNU General Public License for more details.
3181 + *
3182 + * You should have received a copy of the GNU General Public License
3183 + * along with this program; if not, write to the Free Software
3184 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3185 + */
3186 +
3187 +#include <linux/types.h>
3188 +#include <linux/init.h>
3189 +#include <linux/mm.h>
3190 +#include <linux/module.h>
3191 +#include <linux/platform_device.h>
3192 +#include <linux/spi/spi.h>
3193 +#include <linux/mtd/physmap.h>
3194 +
3195 +#include <asm/hardware.h>
3196 +#include <asm/setup.h>
3197 +#include <asm/mach-types.h>
3198 +#include <asm/irq.h>
3199 +
3200 +#include <asm/mach/arch.h>
3201 +#include <asm/mach/map.h>
3202 +#include <asm/mach/irq.h>
3203 +
3204 +#include <asm/arch/board.h>
3205 +#include <asm/arch/gpio.h>
3206 +#include <asm/arch/at91rm9200_mc.h>
3207 +
3208 +#include "generic.h"
3209 +
3210 +
3211 +/*
3212 + * Serial port configuration.
3213 + * 0 .. 3 = USART0 .. USART3
3214 + * 4 = DBGU
3215 + */
3216 +static struct at91_uart_config __initdata homematic_uart_config = {
3217 + .console_tty = 0, /* ttyS0 */
3218 + .nr_tty = 2,
3219 + .tty_map = { 4, 1, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
3220 +};
3221 +
3222 +static void __init homematic_map_io(void)
3223 +{
3224 + /* Initialize processor: 18.432 MHz crystal */
3225 + at91rm9200_initialize(18432000, AT91RM9200_BGA);
3226 +
3227 + /* Setup the serial ports and console */
3228 + at91_init_serial(&homematic_uart_config);
3229 +}
3230 +
3231 +static void __init homematic_init_irq(void)
3232 +{
3233 + at91rm9200_init_interrupts(NULL);
3234 +}
3235 +
3236 +static struct at91_eth_data __initdata homematic_eth_data = {
3237 + .phy_irq_pin = AT91_PIN_PC4,
3238 + .is_rmii = 0,
3239 +};
3240 +
3241 +static struct at91_usbh_data __initdata homematic_usbh_data = {
3242 + .ports = 2,
3243 +};
3244 +
3245 +static struct at91_udc_data __initdata homematic_udc_data = {
3246 + .vbus_pin = AT91_PIN_PD4,
3247 + .pullup_pin = AT91_PIN_PD5,
3248 +};
3249 +
3250 +static struct at91_mmc_data __initdata homematic_mmc_data = {
3251 + .slot_b = 0,
3252 + .wire4 = 1,
3253 +};
3254 +
3255 +static struct spi_board_info homematic_spi_devices[] = {
3256 + { /* DataFlash chip */
3257 + .modalias = "mtd_dataflash",
3258 + .chip_select = 0,
3259 + .max_speed_hz = 15 * 1000 * 1000,
3260 + },
3261 +};
3262 +
3263 +static struct mtd_partition __initdata homematic_nand_partition[] = {
3264 + {
3265 + .name = "root",
3266 + .offset = 0,
3267 + .size = 0x02000000,
3268 + }, {
3269 + .name = "storage",
3270 + .offset = 0x02000000,
3271 + .size = MTDPART_SIZ_FULL,
3272 + },
3273 +};
3274 +
3275 +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
3276 +{
3277 + *num_partitions = ARRAY_SIZE(homematic_nand_partition);
3278 + return homematic_nand_partition;
3279 +}
3280 +
3281 +static struct at91_nand_data __initdata homematic_nand_data = {
3282 + .ale = 22,
3283 + .cle = 21,
3284 +// .det_pin = AT91_PIN_PB1,
3285 + .rdy_pin = AT91_PIN_PC2,
3286 + .enable_pin = AT91_PIN_PC0,
3287 + .partition_info = nand_partitions,
3288 +};
3289 +
3290 +static void __init homematic_board_init(void)
3291 +{
3292 + /* Serial */
3293 + at91_add_device_serial();
3294 + /* Ethernet */
3295 + at91_add_device_eth(&homematic_eth_data);
3296 + /* USB Host */
3297 + at91_add_device_usbh(&homematic_usbh_data);
3298 + /* USB Device */
3299 + at91_add_device_udc(&homematic_udc_data);
3300 + at91_set_multi_drive(homematic_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
3301 + /* I2C */
3302 + at91_add_device_i2c(NULL, 0);
3303 + /* SPI */
3304 + at91_add_device_spi(homematic_spi_devices, ARRAY_SIZE(homematic_spi_devices));
3305 +#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
3306 + /* DataFlash card */
3307 + at91_set_gpio_output(AT91_PIN_PB7, 0);
3308 +#else
3309 + /* MMC */
3310 + at91_set_gpio_output(AT91_PIN_PB7, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
3311 + at91_add_device_mmc(0, &homematic_mmc_data);
3312 +#endif
3313 + /* NAND */
3314 + at91_add_device_nand(&homematic_nand_data);
3315 +}
3316 +
3317 +MACHINE_START(HOMEMATIC, "HomeMatic")
3318 + /* Maintainer: eQ-3 */
3319 + .phys_io = AT91_BASE_SYS,
3320 + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
3321 + .boot_params = AT91_SDRAM_BASE + 0x100,
3322 + .timer = &at91rm9200_timer,
3323 + .map_io = homematic_map_io,
3324 + .init_irq = homematic_init_irq,
3325 + .init_machine = homematic_board_init,
3326 +MACHINE_END
3327 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-kb9202.c linux-2.6/arch/arm/mach-at91/board-kb9202.c
3328 --- linux-2.6.25/arch/arm/mach-at91/board-kb9202.c 2008-05-03 00:15:33.000000000 +0200
3329 +++ linux-2.6/arch/arm/mach-at91/board-kb9202.c 2008-04-25 21:15:43.000000000 +0200
3330 @@ -37,19 +37,10 @@
3331 #include <asm/arch/board.h>
3332 #include <asm/arch/gpio.h>
3333
3334 -#include "generic.h"
3335 +#include <asm/arch/at91rm9200_mc.h>
3336
3337 +#include "generic.h"
3338
3339 -/*
3340 - * Serial port configuration.
3341 - * 0 .. 3 = USART0 .. USART3
3342 - * 4 = DBGU
3343 - */
3344 -static struct at91_uart_config __initdata kb9202_uart_config = {
3345 - .console_tty = 0, /* ttyS0 */
3346 - .nr_tty = 3,
3347 - .tty_map = { 4, 0, 1, -1, -1 } /* ttyS0, ..., ttyS4 */
3348 -};
3349
3350 static void __init kb9202_map_io(void)
3351 {
3352 @@ -59,8 +50,20 @@
3353 /* Set up the LEDs */
3354 at91_init_leds(AT91_PIN_PC19, AT91_PIN_PC18);
3355
3356 - /* Setup the serial ports and console */
3357 - at91_init_serial(&kb9202_uart_config);
3358 + /* DBGU on ttyS0. (Rx & Tx only) */
3359 + at91_register_uart(0, 0, 0);
3360 +
3361 + /* USART0 on ttyS1 (Rx & Tx only) */
3362 + at91_register_uart(AT91RM9200_ID_US0, 1, 0);
3363 +
3364 + /* USART1 on ttyS2 (Rx & Tx only) - IRDA (optional) */
3365 + at91_register_uart(AT91RM9200_ID_US1, 2, 0);
3366 +
3367 + /* USART3 on ttyS3 (Rx, Tx, CTS, RTS) - RS485 (optional) */
3368 + at91_register_uart(AT91RM9200_ID_US3, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
3369 +
3370 + /* set serial console to ttyS0 (ie, DBGU) */
3371 + at91_set_serial_console(0);
3372 }
3373
3374 static void __init kb9202_init_irq(void)
3375 @@ -111,6 +114,48 @@
3376 .partition_info = nand_partitions,
3377 };
3378
3379 +
3380 +#if defined(CONFIG_FB_S1D15605)
3381 +#warning "The Reset pin must be passed via platform_data, not this way"
3382 +static struct resource kb9202_lcd_resources[] = {
3383 + [0] = {
3384 + .start = AT91_CHIPSELECT_2,
3385 + .end = AT91_CHIPSELECT_2 + 0x200FF,
3386 + .flags = IORESOURCE_MEM
3387 + },
3388 + [1] = { /* reset pin */
3389 + .start = AT91_PIN_PC22,
3390 + .end = AT91_PIN_PC22,
3391 + .flags = IORESOURCE_MEM
3392 + },
3393 +};
3394 +
3395 +static struct platform_device kb9202_lcd_device = {
3396 + .name = "s1d15605fb",
3397 + .id = 0,
3398 + .num_resources = ARRAY_SIZE(kb9202_lcd_resources),
3399 + .resource = kb9202_lcd_resources,
3400 +};
3401 +
3402 +static void __init kb9202_add_device_lcd(void)
3403 +{
3404 + /* In case the boot loader did not set the chip select mode and timing */
3405 + at91_sys_write(AT91_SMC_CSR(2),
3406 + AT91_SMC_WSEN | AT91_SMC_NWS_(18) | AT91_SMC_TDF_(1) | AT91_SMC_DBW_8 |
3407 + AT91_SMC_RWSETUP_(1) | AT91_SMC_RWHOLD_(1));
3408 +
3409 + /* Backlight pin = output, off */
3410 + at91_set_gpio_output(AT91_PIN_PC23, 0);
3411 +
3412 + /* Reset pin = output, in reset */
3413 + at91_set_gpio_output(AT91_PIN_PC22, 0);
3414 +
3415 + platform_device_register(&kb9202_lcd_device);
3416 +}
3417 +#else
3418 +static void __init kb9202_add_device_lcd(void) {}
3419 +#endif
3420 +
3421 static void __init kb9202_board_init(void)
3422 {
3423 /* Serial */
3424 @@ -129,6 +174,8 @@
3425 at91_add_device_spi(NULL, 0);
3426 /* NAND */
3427 at91_add_device_nand(&kb9202_nand_data);
3428 + /* LCD */
3429 + kb9202_add_device_lcd();
3430 }
3431
3432 MACHINE_START(KB9200, "KB920x")
3433 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-qil-a9260.c linux-2.6/arch/arm/mach-at91/board-qil-a9260.c
3434 --- linux-2.6.25/arch/arm/mach-at91/board-qil-a9260.c 1970-01-01 02:00:00.000000000 +0200
3435 +++ linux-2.6/arch/arm/mach-at91/board-qil-a9260.c 2008-04-25 21:15:43.000000000 +0200
3436 @@ -0,0 +1,255 @@
3437 +/*
3438 + * linux/arch/arm/mach-at91/board-qil-a9260.c
3439 + *
3440 + * Copyright (C) 2005 SAN People
3441 + * Copyright (C) 2006 Atmel
3442 + * Copyright (C) 2007 Calao-systems
3443 + *
3444 + * This program is free software; you can redistribute it and/or modify
3445 + * it under the terms of the GNU General Public License as published by
3446 + * the Free Software Foundation; either version 2 of the License, or
3447 + * (at your option) any later version.
3448 + *
3449 + * This program is distributed in the hope that it will be useful,
3450 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3451 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3452 + * GNU General Public License for more details.
3453 + *
3454 + * You should have received a copy of the GNU General Public License
3455 + * along with this program; if not, write to the Free Software
3456 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3457 + */
3458 +
3459 +#include <linux/types.h>
3460 +#include <linux/init.h>
3461 +#include <linux/mm.h>
3462 +#include <linux/module.h>
3463 +#include <linux/platform_device.h>
3464 +#include <linux/spi/spi.h>
3465 +#include <linux/gpio_keys.h>
3466 +#include <linux/input.h>
3467 +#include <linux/clk.h>
3468 +
3469 +#include <asm/hardware.h>
3470 +#include <asm/setup.h>
3471 +#include <asm/mach-types.h>
3472 +#include <asm/irq.h>
3473 +
3474 +#include <asm/mach/arch.h>
3475 +#include <asm/mach/map.h>
3476 +#include <asm/mach/irq.h>
3477 +
3478 +#include <asm/arch/board.h>
3479 +#include <asm/arch/gpio.h>
3480 +#include <asm/arch/at91_shdwc.h>
3481 +
3482 +#include "generic.h"
3483 +
3484 +
3485 +static void __init ek_map_io(void)
3486 +{
3487 + /* Initialize processor: 12.000 MHz crystal */
3488 + at91sam9260_initialize(12000000);
3489 +
3490 + /* DGBU on ttyS0. (Rx & Tx only) */
3491 + at91_register_uart(0, 0, 0);
3492 +
3493 + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
3494 + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
3495 + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
3496 + | ATMEL_UART_RI);
3497 +
3498 + /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
3499 + at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
3500 +
3501 + /* USART2 on ttyS3. (Rx, Tx, CTS, RTS) */
3502 + at91_register_uart(AT91SAM9260_ID_US2, 3, ATMEL_UART_CTS | ATMEL_UART_RTS);
3503 +
3504 + /* set serial console to ttyS1 (ie, USART0) */
3505 + at91_set_serial_console(1);
3506 +
3507 +}
3508 +
3509 +static void __init ek_init_irq(void)
3510 +{
3511 + at91sam9260_init_interrupts(NULL);
3512 +}
3513 +
3514 +
3515 +/*
3516 + * USB Host port
3517 + */
3518 +static struct at91_usbh_data __initdata ek_usbh_data = {
3519 + .ports = 2,
3520 +};
3521 +
3522 +/*
3523 + * USB Device port
3524 + */
3525 +static struct at91_udc_data __initdata ek_udc_data = {
3526 + .vbus_pin = AT91_PIN_PC5,
3527 + .pullup_pin = 0, /* pull-up driven by UDC */
3528 +};
3529 +
3530 +/*
3531 + * SPI devices.
3532 + */
3533 +static struct spi_board_info ek_spi_devices[] = {
3534 +#if defined(CONFIG_RTC_DRV_M41T94)
3535 + { /* M41T94 RTC */
3536 + .modalias = "m41t94",
3537 + .chip_select = 0,
3538 + .max_speed_hz = 1 * 1000 * 1000,
3539 + .bus_num = 0,
3540 + }
3541 +#endif
3542 +};
3543 +
3544 +/*
3545 + * MACB Ethernet device
3546 + */
3547 +static struct at91_eth_data __initdata ek_macb_data = {
3548 + .phy_irq_pin = AT91_PIN_PA31,
3549 + .is_rmii = 1,
3550 +};
3551 +
3552 +/*
3553 + * NAND flash
3554 + */
3555 +static struct mtd_partition __initdata ek_nand_partition[] = {
3556 + {
3557 + .name = "Uboot & Kernel",
3558 + .offset = 0x00000000,
3559 + .size = 16 * 1024 * 1024,
3560 + },
3561 + {
3562 + .name = "Root FS",
3563 + .offset = 0x01000000,
3564 + .size = 120 * 1024 * 1024,
3565 + },
3566 + {
3567 + .name = "FS",
3568 + .offset = 0x08800000,
3569 + .size = 120 * 1024 * 1024,
3570 + },
3571 +};
3572 +
3573 +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
3574 +{
3575 + *num_partitions = ARRAY_SIZE(ek_nand_partition);
3576 + return ek_nand_partition;
3577 +}
3578 +
3579 +static struct at91_nand_data __initdata ek_nand_data = {
3580 + .ale = 21,
3581 + .cle = 22,
3582 +// .det_pin = ... not connected
3583 + .rdy_pin = AT91_PIN_PC13,
3584 + .enable_pin = AT91_PIN_PC14,
3585 + .partition_info = nand_partitions,
3586 +#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
3587 + .bus_width_16 = 1,
3588 +#else
3589 + .bus_width_16 = 0,
3590 +#endif
3591 +};
3592 +
3593 +/*
3594 + * MCI (SD/MMC)
3595 + */
3596 +static struct at91_mmc_data __initdata ek_mmc_data = {
3597 + .slot_b = 0,
3598 + .wire4 = 1,
3599 +// .det_pin = ... not connected
3600 +// .wp_pin = ... not connected
3601 +// .vcc_pin = ... not connected
3602 +};
3603 +
3604 +/*
3605 + * GPIO Buttons
3606 + */
3607 +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
3608 +static struct gpio_keys_button ek_buttons[] = {
3609 + { /* USER PUSH BUTTON */
3610 + .code = KEY_ENTER,
3611 + .gpio = AT91_PIN_PB10,
3612 + .active_low = 1,
3613 + .desc = "user_pb",
3614 + .wakeup = 1,
3615 + }
3616 +};
3617 +
3618 +static struct gpio_keys_platform_data ek_button_data = {
3619 + .buttons = ek_buttons,
3620 + .nbuttons = ARRAY_SIZE(ek_buttons),
3621 +};
3622 +
3623 +static struct platform_device ek_button_device = {
3624 + .name = "gpio-keys",
3625 + .id = -1,
3626 + .num_resources = 0,
3627 + .dev = {
3628 + .platform_data = &ek_button_data,
3629 + }
3630 +};
3631 +
3632 +static void __init ek_add_device_buttons(void)
3633 +{
3634 + at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */
3635 + at91_set_deglitch(AT91_PIN_PB10, 1);
3636 +
3637 + platform_device_register(&ek_button_device);
3638 +}
3639 +#else
3640 +static void __init ek_add_device_buttons(void) {}
3641 +#endif
3642 +
3643 +/*
3644 + * LEDs
3645 + */
3646 +static struct gpio_led ek_leds[] = {
3647 + { /* user_led (green) */
3648 + .name = "user_led",
3649 + .gpio = AT91_PIN_PB21,
3650 + .active_low = 0,
3651 + .default_trigger = "heartbeat",
3652 + }
3653 +};
3654 +
3655 +static void __init ek_board_init(void)
3656 +{
3657 + /* Serial */
3658 + at91_add_device_serial();
3659 + /* USB Host */
3660 + at91_add_device_usbh(&ek_usbh_data);
3661 + /* USB Device */
3662 + at91_add_device_udc(&ek_udc_data);
3663 + /* SPI */
3664 + at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
3665 + /* NAND */
3666 + at91_add_device_nand(&ek_nand_data);
3667 + /* I2C */
3668 + at91_add_device_i2c(NULL, 0);
3669 + /* Ethernet */
3670 + at91_add_device_eth(&ek_macb_data);
3671 + /* MMC */
3672 + at91_add_device_mmc(0, &ek_mmc_data);
3673 + /* Push Buttons */
3674 + ek_add_device_buttons();
3675 + /* LEDs */
3676 + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
3677 + /* shutdown controller, wakeup button (5 msec low) */
3678 + at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
3679 + | AT91_SHDW_RTTWKEN);
3680 +}
3681 +
3682 +MACHINE_START(QIL_A9260, "CALAO QIL_A9260")
3683 + /* Maintainer: calao-systems */
3684 + .phys_io = AT91_BASE_SYS,
3685 + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
3686 + .boot_params = AT91_SDRAM_BASE + 0x100,
3687 + .timer = &at91sam926x_timer,
3688 + .map_io = ek_map_io,
3689 + .init_irq = ek_init_irq,
3690 + .init_machine = ek_board_init,
3691 +MACHINE_END
3692 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-sam9-l9260.c linux-2.6/arch/arm/mach-at91/board-sam9-l9260.c
3693 --- linux-2.6.25/arch/arm/mach-at91/board-sam9-l9260.c 1970-01-01 02:00:00.000000000 +0200
3694 +++ linux-2.6/arch/arm/mach-at91/board-sam9-l9260.c 2008-04-25 21:15:43.000000000 +0200
3695 @@ -0,0 +1,199 @@
3696 +/*
3697 + * linux/arch/arm/mach-at91/board-sam9-l9260.c
3698 + *
3699 + * Copyright (C) 2005 SAN People
3700 + * Copyright (C) 2006 Atmel
3701 + * Copyright (C) 2007 Olimex Ltd
3702 + *
3703 + * This program is free software; you can redistribute it and/or modify
3704 + * it under the terms of the GNU General Public License as published by
3705 + * the Free Software Foundation; either version 2 of the License, or
3706 + * (at your option) any later version.
3707 + *
3708 + * This program is distributed in the hope that it will be useful,
3709 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3710 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3711 + * GNU General Public License for more details.
3712 + *
3713 + * You should have received a copy of the GNU General Public License
3714 + * along with this program; if not, write to the Free Software
3715 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3716 + */
3717 +
3718 +#include <linux/types.h>
3719 +#include <linux/init.h>
3720 +#include <linux/mm.h>
3721 +#include <linux/module.h>
3722 +#include <linux/platform_device.h>
3723 +#include <linux/spi/spi.h>
3724 +
3725 +#include <asm/hardware.h>
3726 +#include <asm/setup.h>
3727 +#include <asm/mach-types.h>
3728 +#include <asm/irq.h>
3729 +
3730 +#include <asm/mach/arch.h>
3731 +#include <asm/mach/map.h>
3732 +#include <asm/mach/irq.h>
3733 +
3734 +#include <asm/arch/board.h>
3735 +#include <asm/arch/gpio.h>
3736 +
3737 +#include "generic.h"
3738 +
3739 +
3740 +static void __init ek_map_io(void)
3741 +{
3742 + /* Initialize processor: 18.432 MHz crystal */
3743 + at91sam9260_initialize(18432000);
3744 +
3745 + /* Setup the LEDs */
3746 + at91_init_leds(AT91_PIN_PA9, AT91_PIN_PA6);
3747 +
3748 + /* DBGU on ttyS0. (Rx & Tx only) */
3749 + at91_register_uart(0, 0, 0);
3750 +
3751 + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
3752 + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
3753 + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
3754 + | ATMEL_UART_RI);
3755 +
3756 + /* USART1 on ttyS2. (Rx, Tx, CTS, RTS) */
3757 + at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
3758 +
3759 + /* set serial console to ttyS0 (ie, DBGU) */
3760 + at91_set_serial_console(0);
3761 +}
3762 +
3763 +static void __init ek_init_irq(void)
3764 +{
3765 + at91sam9260_init_interrupts(NULL);
3766 +}
3767 +
3768 +
3769 +/*
3770 + * USB Host port
3771 + */
3772 +static struct at91_usbh_data __initdata ek_usbh_data = {
3773 + .ports = 2,
3774 +};
3775 +
3776 +/*
3777 + * USB Device port
3778 + */
3779 +static struct at91_udc_data __initdata ek_udc_data = {
3780 + .vbus_pin = AT91_PIN_PC5,
3781 + .pullup_pin = 0, /* pull-up driven by UDC */
3782 +};
3783 +
3784 +
3785 +/*
3786 + * SPI devices.
3787 + */
3788 +static struct spi_board_info ek_spi_devices[] = {
3789 +#if !defined(CONFIG_MMC_AT91)
3790 + { /* DataFlash chip */
3791 + .modalias = "mtd_dataflash",
3792 + .chip_select = 1,
3793 + .max_speed_hz = 15 * 1000 * 1000,
3794 + .bus_num = 0,
3795 + },
3796 +#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
3797 + { /* DataFlash card */
3798 + .modalias = "mtd_dataflash",
3799 + .chip_select = 0,
3800 + .max_speed_hz = 15 * 1000 * 1000,
3801 + .bus_num = 0,
3802 + },
3803 +#endif
3804 +#endif
3805 +};
3806 +
3807 +
3808 +/*
3809 + * MACB Ethernet device
3810 + */
3811 +static struct at91_eth_data __initdata ek_macb_data = {
3812 + .phy_irq_pin = AT91_PIN_PA7,
3813 + .is_rmii = 0,
3814 +};
3815 +
3816 +
3817 +/*
3818 + * NAND flash
3819 + */
3820 +static struct mtd_partition __initdata ek_nand_partition[] = {
3821 + {
3822 + .name = "Bootloader Area",
3823 + .offset = 0,
3824 + .size = 10 * 1024 * 1024,
3825 + },
3826 + {
3827 + .name = "User Area",
3828 + .offset = 10 * 1024 * 1024,
3829 + .size = MTDPART_SIZ_FULL,
3830 + },
3831 +};
3832 +
3833 +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
3834 +{
3835 + *num_partitions = ARRAY_SIZE(ek_nand_partition);
3836 + return ek_nand_partition;
3837 +}
3838 +
3839 +static struct at91_nand_data __initdata ek_nand_data = {
3840 + .ale = 21,
3841 + .cle = 22,
3842 +// .det_pin = ... not connected
3843 + .rdy_pin = AT91_PIN_PC13,
3844 + .enable_pin = AT91_PIN_PC14,
3845 + .partition_info = nand_partitions,
3846 +#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
3847 + .bus_width_16 = 1,
3848 +#else
3849 + .bus_width_16 = 0,
3850 +#endif
3851 +};
3852 +
3853 +
3854 +/*
3855 + * MCI (SD/MMC)
3856 + */
3857 +static struct at91_mmc_data __initdata ek_mmc_data = {
3858 + .slot_b = 1,
3859 + .wire4 = 1,
3860 + .det_pin = AT91_PIN_PC8,
3861 + .wp_pin = AT91_PIN_PC4,
3862 +// .vcc_pin = ... not connected
3863 +};
3864 +
3865 +static void __init ek_board_init(void)
3866 +{
3867 + /* Serial */
3868 + at91_add_device_serial();
3869 + /* USB Host */
3870 + at91_add_device_usbh(&ek_usbh_data);
3871 + /* USB Device */
3872 + at91_add_device_udc(&ek_udc_data);
3873 + /* SPI */
3874 + at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
3875 + /* NAND */
3876 + at91_add_device_nand(&ek_nand_data);
3877 + /* Ethernet */
3878 + at91_add_device_eth(&ek_macb_data);
3879 + /* MMC */
3880 + at91_add_device_mmc(0, &ek_mmc_data);
3881 + /* I2C */
3882 + at91_add_device_i2c(NULL, 0);
3883 +}
3884 +
3885 +MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260")
3886 + /* Maintainer: Olimex */
3887 + .phys_io = AT91_BASE_SYS,
3888 + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
3889 + .boot_params = AT91_SDRAM_BASE + 0x100,
3890 + .timer = &at91sam926x_timer,
3891 + .map_io = ek_map_io,
3892 + .init_irq = ek_init_irq,
3893 + .init_machine = ek_board_init,
3894 +MACHINE_END
3895 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-sam9260ek.c linux-2.6/arch/arm/mach-at91/board-sam9260ek.c
3896 --- linux-2.6.25/arch/arm/mach-at91/board-sam9260ek.c 2008-05-03 00:15:33.000000000 +0200
3897 +++ linux-2.6/arch/arm/mach-at91/board-sam9260ek.c 2008-05-01 23:56:24.000000000 +0200
3898 @@ -25,6 +25,10 @@
3899 #include <linux/module.h>
3900 #include <linux/platform_device.h>
3901 #include <linux/spi/spi.h>
3902 +#include <linux/spi/at73c213.h>
3903 +#include <linux/clk.h>
3904 +#include <linux/gpio_keys.h>
3905 +#include <linux/input.h>
3906
3907 #include <asm/hardware.h>
3908 #include <asm/setup.h>
3909 @@ -37,29 +41,29 @@
3910
3911 #include <asm/arch/board.h>
3912 #include <asm/arch/gpio.h>
3913 -#include <asm/arch/at91sam926x_mc.h>
3914 +#include <asm/arch/at91_shdwc.h>
3915
3916 #include "generic.h"
3917
3918
3919 -/*
3920 - * Serial port configuration.
3921 - * 0 .. 5 = USART0 .. USART5
3922 - * 6 = DBGU
3923 - */
3924 -static struct at91_uart_config __initdata ek_uart_config = {
3925 - .console_tty = 0, /* ttyS0 */
3926 - .nr_tty = 3,
3927 - .tty_map = { 6, 0, 1, -1, -1, -1, -1 } /* ttyS0, ..., ttyS6 */
3928 -};
3929 -
3930 static void __init ek_map_io(void)
3931 {
3932 /* Initialize processor: 18.432 MHz crystal */
3933 at91sam9260_initialize(18432000);
3934
3935 - /* Setup the serial ports and console */
3936 - at91_init_serial(&ek_uart_config);
3937 + /* DGBU on ttyS0. (Rx & Tx only) */
3938 + at91_register_uart(0, 0, 0);
3939 +
3940 + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
3941 + at91_register_uart(AT91SAM9260_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
3942 + | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
3943 + | ATMEL_UART_RI);
3944 +
3945 + /* USART1 on ttyS2. (Rx, Tx, RTS, CTS) */
3946 + at91_register_uart(AT91SAM9260_ID_US1, 2, ATMEL_UART_CTS | ATMEL_UART_RTS);
3947 +
3948 + /* set serial console to ttyS0 (ie, DBGU) */
3949 + at91_set_serial_console(0);
3950 }
3951
3952 static void __init ek_init_irq(void)
3953 @@ -85,6 +89,35 @@
3954
3955
3956 /*
3957 + * Audio
3958 + */
3959 +static struct at73c213_board_info at73c213_data = {
3960 + .ssc_id = 0,
3961 + .shortname = "AT91SAM9260-EK external DAC",
3962 +};
3963 +
3964 +#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
3965 +static void __init at73c213_set_clk(struct at73c213_board_info *info)
3966 +{
3967 + struct clk *pck0;
3968 + struct clk *plla;
3969 +
3970 + pck0 = clk_get(NULL, "pck0");
3971 + plla = clk_get(NULL, "plla");
3972 +
3973 + /* AT73C213 MCK Clock */
3974 + at91_set_B_periph(AT91_PIN_PC1, 0); /* PCK0 */
3975 +
3976 + clk_set_parent(pck0, plla);
3977 + clk_put(plla);
3978 +
3979 + info->dac_clk = pck0;
3980 +}
3981 +#else
3982 +static void __init at73c213_set_clk(struct at73c213_board_info *info) {}
3983 +#endif
3984 +
3985 +/*
3986 * SPI devices.
3987 */
3988 static struct spi_board_info ek_spi_devices[] = {
3989 @@ -110,6 +143,8 @@
3990 .chip_select = 0,
3991 .max_speed_hz = 10 * 1000 * 1000,
3992 .bus_num = 1,
3993 + .mode = SPI_MODE_1,
3994 + .platform_data = &at73c213_data,
3995 },
3996 #endif
3997 };
3998 @@ -172,6 +207,74 @@
3999 // .vcc_pin = ... not connected
4000 };
4001
4002 +
4003 +/*
4004 + * LEDs
4005 + */
4006 +static struct gpio_led ek_leds[] = {
4007 + { /* "bottom" led, green, userled1 to be defined */
4008 + .name = "ds5",
4009 + .gpio = AT91_PIN_PA6,
4010 + .active_low = 1,
4011 + .default_trigger = "none",
4012 + },
4013 + { /* "power" led, yellow */
4014 + .name = "ds1",
4015 + .gpio = AT91_PIN_PA9,
4016 + .default_trigger = "heartbeat",
4017 + }
4018 +};
4019 +
4020 +
4021 +/*
4022 + * GPIO Buttons
4023 + */
4024 +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
4025 +static struct gpio_keys_button ek_buttons[] = {
4026 + {
4027 + .gpio = AT91_PIN_PA30,
4028 + .code = BTN_3,
4029 + .desc = "Button 3",
4030 + .active_low = 1,
4031 + .wakeup = 1,
4032 + },
4033 + {
4034 + .gpio = AT91_PIN_PA31,
4035 + .code = BTN_4,
4036 + .desc = "Button 4",
4037 + .active_low = 1,
4038 + .wakeup = 1,
4039 + }
4040 +};
4041 +
4042 +static struct gpio_keys_platform_data ek_button_data = {
4043 + .buttons = ek_buttons,
4044 + .nbuttons = ARRAY_SIZE(ek_buttons),
4045 +};
4046 +
4047 +static struct platform_device ek_button_device = {
4048 + .name = "gpio-keys",
4049 + .id = -1,
4050 + .num_resources = 0,
4051 + .dev = {
4052 + .platform_data = &ek_button_data,
4053 + }
4054 +};
4055 +
4056 +static void __init ek_add_device_buttons(void)
4057 +{
4058 + at91_set_gpio_input(AT91_PIN_PA30, 1); /* btn3 */
4059 + at91_set_deglitch(AT91_PIN_PA30, 1);
4060 + at91_set_gpio_input(AT91_PIN_PA31, 1); /* btn4 */
4061 + at91_set_deglitch(AT91_PIN_PA31, 1);
4062 +
4063 + platform_device_register(&ek_button_device);
4064 +}
4065 +#else
4066 +static void __init ek_add_device_buttons(void) {}
4067 +#endif
4068 +
4069 +
4070 static void __init ek_board_init(void)
4071 {
4072 /* Serial */
4073 @@ -190,6 +293,16 @@
4074 at91_add_device_mmc(0, &ek_mmc_data);
4075 /* I2C */
4076 at91_add_device_i2c(NULL, 0);
4077 + /* SSC (to AT73C213) */
4078 + at73c213_set_clk(&at73c213_data);
4079 + at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX);
4080 + /* LEDs */
4081 + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
4082 + /* Push Buttons */
4083 + ek_add_device_buttons();
4084 + /* shutdown controller, wakeup button (5 msec low) */
4085 + at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
4086 + | AT91_SHDW_RTTWKEN);
4087 }
4088
4089 MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK")
4090 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-sam9261ek.c linux-2.6/arch/arm/mach-at91/board-sam9261ek.c
4091 --- linux-2.6.25/arch/arm/mach-at91/board-sam9261ek.c 2008-05-03 00:15:44.000000000 +0200
4092 +++ linux-2.6/arch/arm/mach-at91/board-sam9261ek.c 2008-05-01 23:53:20.000000000 +0200
4093 @@ -26,6 +26,8 @@
4094 #include <linux/platform_device.h>
4095 #include <linux/spi/spi.h>
4096 #include <linux/spi/ads7846.h>
4097 +#include <linux/spi/at73c213.h>
4098 +#include <linux/clk.h>
4099 #include <linux/dm9000.h>
4100 #include <linux/fb.h>
4101 #include <linux/gpio_keys.h>
4102 @@ -44,22 +46,12 @@
4103
4104 #include <asm/arch/board.h>
4105 #include <asm/arch/gpio.h>
4106 -#include <asm/arch/at91sam926x_mc.h>
4107 +#include <asm/arch/at91sam9_smc.h>
4108 +#include <asm/arch/at91_shdwc.h>
4109
4110 #include "generic.h"
4111
4112
4113 -/*
4114 - * Serial port configuration.
4115 - * 0 .. 2 = USART0 .. USART2
4116 - * 3 = DBGU
4117 - */
4118 -static struct at91_uart_config __initdata ek_uart_config = {
4119 - .console_tty = 0, /* ttyS0 */
4120 - .nr_tty = 1,
4121 - .tty_map = { 3, -1, -1, -1 } /* ttyS0, ..., ttyS3 */
4122 -};
4123 -
4124 static void __init ek_map_io(void)
4125 {
4126 /* Initialize processor: 18.432 MHz crystal */
4127 @@ -68,8 +60,11 @@
4128 /* Setup the LEDs */
4129 at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14);
4130
4131 - /* Setup the serial ports and console */
4132 - at91_init_serial(&ek_uart_config);
4133 + /* DGBU on ttyS0. (Rx & Tx only) */
4134 + at91_register_uart(0, 0, 0);
4135 +
4136 + /* set serial console to ttyS0 (ie, DBGU) */
4137 + at91_set_serial_console(0);
4138 }
4139
4140 static void __init ek_init_irq(void)
4141 @@ -239,6 +234,35 @@
4142 #endif
4143
4144 /*
4145 + * Audio
4146 + */
4147 +static struct at73c213_board_info at73c213_data = {
4148 + .ssc_id = 1,
4149 + .shortname = "AT91SAM9261-EK external DAC",
4150 +};
4151 +
4152 +#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
4153 +static void __init at73c213_set_clk(struct at73c213_board_info *info)
4154 +{
4155 + struct clk *pck2;
4156 + struct clk *plla;
4157 +
4158 + pck2 = clk_get(NULL, "pck2");
4159 + plla = clk_get(NULL, "plla");
4160 +
4161 + /* AT73C213 MCK Clock */
4162 + at91_set_B_periph(AT91_PIN_PB31, 0); /* PCK2 */
4163 +
4164 + clk_set_parent(pck2, plla);
4165 + clk_put(plla);
4166 +
4167 + info->dac_clk = pck2;
4168 +}
4169 +#else
4170 +static void __init at73c213_set_clk(struct at73c213_board_info *info) {}
4171 +#endif
4172 +
4173 +/*
4174 * SPI devices
4175 */
4176 static struct spi_board_info ek_spi_devices[] = {
4177 @@ -252,10 +276,11 @@
4178 {
4179 .modalias = "ads7846",
4180 .chip_select = 2,
4181 - .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
4182 + .max_speed_hz = 125000 * 16, /* max sample rate * clocks per sample */
4183 .bus_num = 0,
4184 .platform_data = &ads_info,
4185 .irq = AT91SAM9261_ID_IRQ0,
4186 + .controller_data = (void *) AT91_PIN_PA28, /* CS pin */
4187 },
4188 #endif
4189 #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD)
4190 @@ -271,6 +296,9 @@
4191 .chip_select = 3,
4192 .max_speed_hz = 10 * 1000 * 1000,
4193 .bus_num = 0,
4194 + .mode = SPI_MODE_1,
4195 + .platform_data = &at73c213_data,
4196 + .controller_data = (void*) AT91_PIN_PA29, /* default for CS3 is PA6, but it must be PA29 */
4197 },
4198 #endif
4199 };
4200 @@ -408,24 +436,28 @@
4201 .code = BTN_0,
4202 .desc = "Button 0",
4203 .active_low = 1,
4204 + .wakeup = 1,
4205 },
4206 {
4207 .gpio = AT91_PIN_PA26,
4208 .code = BTN_1,
4209 .desc = "Button 1",
4210 .active_low = 1,
4211 + .wakeup = 1,
4212 },
4213 {
4214 .gpio = AT91_PIN_PA25,
4215 .code = BTN_2,
4216 .desc = "Button 2",
4217 .active_low = 1,
4218 + .wakeup = 1,
4219 },
4220 {
4221 .gpio = AT91_PIN_PA24,
4222 .code = BTN_3,
4223 .desc = "Button 3",
4224 .active_low = 1,
4225 + .wakeup = 1,
4226 }
4227 };
4228
4229 @@ -445,13 +477,13 @@
4230
4231 static void __init ek_add_device_buttons(void)
4232 {
4233 - at91_set_gpio_input(AT91_PIN_PA27, 0); /* btn0 */
4234 + at91_set_gpio_input(AT91_PIN_PA27, 1); /* btn0 */
4235 at91_set_deglitch(AT91_PIN_PA27, 1);
4236 - at91_set_gpio_input(AT91_PIN_PA26, 0); /* btn1 */
4237 + at91_set_gpio_input(AT91_PIN_PA26, 1); /* btn1 */
4238 at91_set_deglitch(AT91_PIN_PA26, 1);
4239 - at91_set_gpio_input(AT91_PIN_PA25, 0); /* btn2 */
4240 + at91_set_gpio_input(AT91_PIN_PA25, 1); /* btn2 */
4241 at91_set_deglitch(AT91_PIN_PA25, 1);
4242 - at91_set_gpio_input(AT91_PIN_PA24, 0); /* btn3 */
4243 + at91_set_gpio_input(AT91_PIN_PA24, 1); /* btn3 */
4244 at91_set_deglitch(AT91_PIN_PA24, 1);
4245
4246 platform_device_register(&ek_button_device);
4247 @@ -460,6 +492,29 @@
4248 static void __init ek_add_device_buttons(void) {}
4249 #endif
4250
4251 +/*
4252 + * LEDs
4253 + */
4254 +static struct gpio_led ek_leds[] = {
4255 + { /* "bottom" led, green, userled1 to be defined */
4256 + .name = "ds7",
4257 + .gpio = AT91_PIN_PA14,
4258 + .active_low = 1,
4259 + .default_trigger = "none",
4260 + },
4261 + { /* "top" led, green, userled2 to be defined */
4262 + .name = "ds8",
4263 + .gpio = AT91_PIN_PA13,
4264 + .active_low = 1,
4265 + .default_trigger = "none",
4266 + },
4267 + { /* "power" led, yellow */
4268 + .name = "ds1",
4269 + .gpio = AT91_PIN_PA23,
4270 + .default_trigger = "heartbeat",
4271 + }
4272 +};
4273 +
4274 static void __init ek_board_init(void)
4275 {
4276 /* Serial */
4277 @@ -481,6 +536,9 @@
4278 at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
4279 /* Touchscreen */
4280 ek_add_device_ts();
4281 + /* SSC (to AT73C213) */
4282 + at73c213_set_clk(&at73c213_data);
4283 + at91_add_device_ssc(AT91SAM9261_ID_SSC1, ATMEL_SSC_TX);
4284 #else
4285 /* MMC */
4286 at91_add_device_mmc(0, &ek_mmc_data);
4287 @@ -489,6 +547,11 @@
4288 at91_add_device_lcdc(&ek_lcdc_data);
4289 /* Push Buttons */
4290 ek_add_device_buttons();
4291 + /* LEDs */
4292 + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
4293 + /* shutdown controller, wakeup button (5 msec low) */
4294 + at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
4295 + | AT91_SHDW_RTTWKEN);
4296 }
4297
4298 MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
4299 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-sam9263ek.c linux-2.6/arch/arm/mach-at91/board-sam9263ek.c
4300 --- linux-2.6.25/arch/arm/mach-at91/board-sam9263ek.c 2008-05-03 00:15:44.000000000 +0200
4301 +++ linux-2.6/arch/arm/mach-at91/board-sam9263ek.c 2008-05-01 23:53:20.000000000 +0200
4302 @@ -43,29 +43,24 @@
4303
4304 #include <asm/arch/board.h>
4305 #include <asm/arch/gpio.h>
4306 -#include <asm/arch/at91sam926x_mc.h>
4307 +#include <asm/arch/at91_shdwc.h>
4308
4309 #include "generic.h"
4310
4311
4312 -/*
4313 - * Serial port configuration.
4314 - * 0 .. 2 = USART0 .. USART2
4315 - * 3 = DBGU
4316 - */
4317 -static struct at91_uart_config __initdata ek_uart_config = {
4318 - .console_tty = 0, /* ttyS0 */
4319 - .nr_tty = 2,
4320 - .tty_map = { 3, 0, -1, -1, } /* ttyS0, ..., ttyS3 */
4321 -};
4322 -
4323 static void __init ek_map_io(void)
4324 {
4325 /* Initialize processor: 16.367 MHz crystal */
4326 at91sam9263_initialize(16367660);
4327
4328 - /* Setup the serial ports and console */
4329 - at91_init_serial(&ek_uart_config);
4330 + /* DGBU on ttyS0. (Rx & Tx only) */
4331 + at91_register_uart(0, 0, 0);
4332 +
4333 + /* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
4334 + at91_register_uart(AT91SAM9263_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
4335 +
4336 + /* set serial console to ttyS0 (ie, DBGU) */
4337 + at91_set_serial_console(0);
4338 }
4339
4340 static void __init ek_init_irq(void)
4341 @@ -141,7 +136,7 @@
4342 {
4343 .modalias = "ads7846",
4344 .chip_select = 3,
4345 - .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */
4346 + .max_speed_hz = 125000 * 16, /* max sample rate * clocks per sample */
4347 .bus_num = 0,
4348 .platform_data = &ads_info,
4349 .irq = AT91SAM9263_ID_IRQ1,
4350 @@ -301,9 +296,9 @@
4351
4352 static void __init ek_add_device_buttons(void)
4353 {
4354 - at91_set_GPIO_periph(AT91_PIN_PC5, 0); /* left button */
4355 + at91_set_GPIO_periph(AT91_PIN_PC5, 1); /* left button */
4356 at91_set_deglitch(AT91_PIN_PC5, 1);
4357 - at91_set_GPIO_periph(AT91_PIN_PC4, 0); /* right button */
4358 + at91_set_GPIO_periph(AT91_PIN_PC4, 1); /* right button */
4359 at91_set_deglitch(AT91_PIN_PC4, 1);
4360
4361 platform_device_register(&ek_button_device);
4362 @@ -341,7 +336,7 @@
4363 .name = "ds3",
4364 .gpio = AT91_PIN_PB7,
4365 .default_trigger = "heartbeat",
4366 - },
4367 + }
4368 };
4369
4370
4371 @@ -374,6 +369,9 @@
4372 at91_add_device_ac97(&ek_ac97_data);
4373 /* LEDs */
4374 at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
4375 + /* shutdown controller, wakeup button (5 msec low) */
4376 + at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
4377 + | AT91_SHDW_RTTWKEN);
4378 }
4379
4380 MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK")
4381 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-sam9rlek.c linux-2.6/arch/arm/mach-at91/board-sam9rlek.c
4382 --- linux-2.6.25/arch/arm/mach-at91/board-sam9rlek.c 2008-05-03 00:15:33.000000000 +0200
4383 +++ linux-2.6/arch/arm/mach-at91/board-sam9rlek.c 2008-04-25 21:15:43.000000000 +0200
4384 @@ -29,29 +29,24 @@
4385
4386 #include <asm/arch/board.h>
4387 #include <asm/arch/gpio.h>
4388 -#include <asm/arch/at91sam926x_mc.h>
4389 +#include <asm/arch/at91_shdwc.h>
4390
4391 #include "generic.h"
4392
4393
4394 -/*
4395 - * Serial port configuration.
4396 - * 0 .. 3 = USART0 .. USART3
4397 - * 4 = DBGU
4398 - */
4399 -static struct at91_uart_config __initdata ek_uart_config = {
4400 - .console_tty = 0, /* ttyS0 */
4401 - .nr_tty = 2,
4402 - .tty_map = { 4, 0, -1, -1, -1 } /* ttyS0, ..., ttyS4 */
4403 -};
4404 -
4405 static void __init ek_map_io(void)
4406 {
4407 /* Initialize processor: 12.000 MHz crystal */
4408 at91sam9rl_initialize(12000000);
4409
4410 - /* Setup the serial ports and console */
4411 - at91_init_serial(&ek_uart_config);
4412 + /* DGBU on ttyS0. (Rx & Tx only) */
4413 + at91_register_uart(0, 0, 0);
4414 +
4415 + /* USART0 on ttyS1. (Rx, Tx, CTS, RTS) */
4416 + at91_register_uart(AT91SAM9RL_ID_US0, 1, ATMEL_UART_CTS | ATMEL_UART_RTS);
4417 +
4418 + /* set serial console to ttyS0 (ie, DBGU) */
4419 + at91_set_serial_console(0);
4420 }
4421
4422 static void __init ek_init_irq(void)
4423 @@ -61,6 +56,14 @@
4424
4425
4426 /*
4427 + * USB HS Device port
4428 + */
4429 +static struct usba_platform_data __initdata ek_usba_udc_data = {
4430 + .vbus_pin = AT91_PIN_PA8,
4431 +};
4432 +
4433 +
4434 +/*
4435 * MCI (SD/MMC)
4436 */
4437 static struct at91_mmc_data __initdata ek_mmc_data = {
4438 @@ -180,6 +183,8 @@
4439 {
4440 /* Serial */
4441 at91_add_device_serial();
4442 + /* USB HS */
4443 + at91_add_device_usba(&ek_usba_udc_data);
4444 /* I2C */
4445 at91_add_device_i2c(NULL, 0);
4446 /* NAND */
4447 @@ -190,6 +195,9 @@
4448 at91_add_device_mmc(0, &ek_mmc_data);
4449 /* LCD Controller */
4450 at91_add_device_lcdc(&ek_lcdc_data);
4451 + /* shutdown controller, wakeup button (5 msec low) */
4452 + at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
4453 + | AT91_SHDW_RTTWKEN);
4454 }
4455
4456 MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK")
4457 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-tms.c linux-2.6/arch/arm/mach-at91/board-tms.c
4458 --- linux-2.6.25/arch/arm/mach-at91/board-tms.c 1970-01-01 02:00:00.000000000 +0200
4459 +++ linux-2.6/arch/arm/mach-at91/board-tms.c 2008-04-25 21:15:43.000000000 +0200
4460 @@ -0,0 +1,198 @@
4461 +/*
4462 +* linux/arch/arm/mach-at91/board-tms.c
4463 +*
4464 +* Copyright (C) 2005 SAN People
4465 +*
4466 +* Adapted from board-dk to sweda TMS-100 by Luiz de Barros <lboneto@gmail.com>
4467 +*
4468 +* This program is free software; you can redistribute it and/or modify
4469 +* it under the terms of the GNU General Public License as published by
4470 +* the Free Software Foundation; either version 2 of the License, or
4471 +* (at your option) any later version.
4472 +*
4473 +* This program is distributed in the hope that it will be useful,
4474 +* but WITHOUT ANY WARRANTY; without even the implied warranty of
4475 +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4476 +* GNU General Public License for more details.
4477 +*
4478 +* You should have received a copy of the GNU General Public License
4479 +* along with this program; if not, write to the Free Software
4480 +* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
4481 +*/
4482 +
4483 +#include <linux/types.h>
4484 +#include <linux/init.h>
4485 +#include <linux/mm.h>
4486 +#include <linux/module.h>
4487 +#include <linux/platform_device.h>
4488 +#include <linux/spi/spi.h>
4489 +#include <linux/mtd/physmap.h>
4490 +
4491 +#include <asm/hardware.h>
4492 +#include <asm/setup.h>
4493 +#include <asm/mach-types.h>
4494 +#include <asm/irq.h>
4495 +
4496 +#include <asm/mach/arch.h>
4497 +#include <asm/mach/map.h>
4498 +#include <asm/mach/irq.h>
4499 +
4500 +#include <asm/arch/board.h>
4501 +#include <asm/arch/gpio.h>
4502 +#include <asm/arch/at91rm9200_mc.h>
4503 +
4504 +#include "generic.h"
4505 +#include <linux/serial_8250.h>
4506 +
4507 +
4508 +#define SERIAL_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP| UPF_SHARE_IRQ)
4509 +#define SERIAL_CLK (1843200)
4510 +
4511 +
4512 +/*---------------------------------------------------------------------
4513 + * External UART
4514 + */
4515 +
4516 +#define PORT(_base, _irq) \
4517 + { \
4518 + .mapbase = _base, \
4519 + .irq = _irq, \
4520 + .uartclk = SERIAL_CLK, \
4521 + .iotype = UPIO_MEM, \
4522 + .regshift = 0, \
4523 + .flags = SERIAL_FLAGS, \
4524 + }
4525 +
4526 +static struct plat_serial8250_port tms_data[] = {
4527 + PORT(0x70000000, AT91_PIN_PC3),
4528 + PORT(0x80000000, AT91_PIN_PC5),
4529 + { },
4530 +};
4531 +
4532 +static struct platform_device tms_device = {
4533 + .name = "serial8250",
4534 + .id = PLAT8250_DEV_PLATFORM,
4535 + .dev =
4536 + {
4537 + .platform_data = &tms_data,
4538 + },
4539 +};
4540 +
4541 +static void setup_external_uart(void)
4542 +{
4543 + at91_sys_write(AT91_SMC_CSR(2),
4544 + AT91_SMC_ACSS_STD
4545 + | AT91_SMC_DBW_8
4546 + | AT91_SMC_BAT
4547 + | AT91_SMC_WSEN
4548 + | AT91_SMC_NWS_(32) /* wait states */
4549 + | AT91_SMC_RWSETUP_(6) /* setup time */
4550 + | AT91_SMC_RWHOLD_(4) /* hold time */
4551 +
4552 + );
4553 + at91_sys_write(AT91_SMC_CSR(6),
4554 + AT91_SMC_ACSS_STD
4555 + | AT91_SMC_DBW_8
4556 + | AT91_SMC_BAT
4557 + | AT91_SMC_WSEN
4558 + | AT91_SMC_NWS_(32) /* wait states */
4559 + | AT91_SMC_RWSETUP_(6) /* setup time */
4560 + | AT91_SMC_RWHOLD_(4) /* hold time */
4561 +
4562 + );
4563 + at91_sys_write(AT91_SMC_CSR(7),
4564 + AT91_SMC_ACSS_STD
4565 + | AT91_SMC_DBW_8
4566 + | AT91_SMC_BAT
4567 + | AT91_SMC_WSEN
4568 + | AT91_SMC_NWS_(32) /* wait states */
4569 + | AT91_SMC_RWSETUP_(6) /* setup time */
4570 + | AT91_SMC_RWHOLD_(4) /* hold time */
4571 + );
4572 +
4573 + platform_device_register(&tms_device);
4574 +}
4575 +
4576 +
4577 +/*
4578 + * Serial port configuration.
4579 + * 0 .. 3 = USART0 .. USART3
4580 + * 4 = DBGU
4581 + */
4582 +static struct at91_uart_config __initdata tms_uart_config = {
4583 + .console_tty = 0, /* ttyS0 */
4584 + .nr_tty = 5,
4585 + .tty_map = { 4, 0, 1, 2, 3 } /* ttyS0, ..., ttyS4 */
4586 +};
4587 +
4588 +static void __init tms_map_io(void)
4589 +{
4590 + /* Initialize processor: 18.432 MHz crystal */
4591 + at91rm9200_initialize(18432000, AT91RM9200_BGA);
4592 +
4593 + /* Setup the LEDs */
4594 + at91_init_leds(AT91_PIN_PB2, AT91_PIN_PB2);
4595 +
4596 + /* Setup the serial ports and console */
4597 + at91_init_serial(&tms_uart_config);
4598 +}
4599 +
4600 +static void __init tms_init_irq(void)
4601 +{
4602 + at91rm9200_init_interrupts(NULL);
4603 +}
4604 +
4605 +
4606 +static struct at91_eth_data __initdata tms_eth_data = {
4607 + .phy_irq_pin = AT91_PIN_PC4,
4608 + .is_rmii = 1,
4609 +};
4610 +
4611 +static struct at91_usbh_data __initdata tms_usbh_data = {
4612 + .ports = 2,
4613 +};
4614 +
4615 +static struct spi_board_info tms_spi_devices[] = {
4616 + { /* DataFlash chip */
4617 + .modalias = "mtd_dataflash",
4618 + .chip_select = 0,
4619 + .max_speed_hz = 15 * 1000 * 1000,
4620 + },
4621 + { /* DataFlash chip */
4622 + .modalias = "mtd_dataflash",
4623 + .chip_select = 1,
4624 + .max_speed_hz = 15 * 1000 * 1000,
4625 + }
4626 +};
4627 +
4628 +static struct i2c_board_info __initdata tms_i2c_devices[] = {
4629 + {
4630 + I2C_BOARD_INFO("isl1208", 0x6f),
4631 + }
4632 +};
4633 +
4634 +static void __init tms_board_init(void)
4635 +{
4636 + /* Serial */
4637 + at91_add_device_serial();
4638 + /* Ethernet */
4639 + at91_add_device_eth(&tms_eth_data);
4640 + at91_add_device_usbh(&tms_usbh_data);
4641 + /* I2C */
4642 + at91_add_device_i2c(tms_i2c_devices, ARRAY_SIZE(tms_i2c_devices));
4643 + /* SPI */
4644 + at91_add_device_spi(tms_spi_devices, ARRAY_SIZE(tms_spi_devices));
4645 + /* Two port external UART */
4646 + setup_external_uart();
4647 +}
4648 +
4649 +MACHINE_START(SWEDATMS, "Sweda TMS-100 Board")
4650 + /* Maintainer: Luiz de Barros */
4651 + .phys_io = AT91_BASE_SYS,
4652 + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
4653 + .boot_params = AT91_SDRAM_BASE + 0x100,
4654 + .timer = &at91rm9200_timer,
4655 + .map_io = tms_map_io,
4656 + .init_irq = tms_init_irq,
4657 + .init_machine = tms_board_init,
4658 +MACHINE_END
4659 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-tt9200.c linux-2.6/arch/arm/mach-at91/board-tt9200.c
4660 --- linux-2.6.25/arch/arm/mach-at91/board-tt9200.c 1970-01-01 02:00:00.000000000 +0200
4661 +++ linux-2.6/arch/arm/mach-at91/board-tt9200.c 2008-04-25 21:15:43.000000000 +0200
4662 @@ -0,0 +1,192 @@
4663 +/*
4664 + * linux/arch/arm/mach-at91rm9200/board-tt9200.c
4665 + * Copyright (C) 2007 Toptechnology
4666 + *
4667 + * Based on board-ecbat91.c
4668 + *
4669 + * This program is free software; you can redistribute it and/or modify
4670 + * it under the terms of the GNU General Public License as published by
4671 + * the Free Software Foundation; either version 2 of the License, or
4672 + * (at your option) any later version.
4673 + *
4674 + * This program is distributed in the hope that it will be useful,
4675 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
4676 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4677 + * GNU General Public License for more details.
4678 + *
4679 + * You should have received a copy of the GNU General Public License
4680 + * along with this program; if not, write to the Free Software
4681 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
4682 + */
4683 +
4684 +#include <linux/types.h>
4685 +#include <linux/init.h>
4686 +#include <linux/mm.h>
4687 +#include <linux/module.h>
4688 +#include <linux/platform_device.h>
4689 +#include <linux/spi/spi.h>
4690 +#include <linux/spi/flash.h>
4691 +
4692 +#include <asm/hardware.h>
4693 +#include <asm/setup.h>
4694 +#include <asm/mach-types.h>
4695 +#include <asm/irq.h>
4696 +
4697 +#include <asm/mach/arch.h>
4698 +#include <asm/mach/map.h>
4699 +#include <asm/mach/irq.h>
4700 +
4701 +#include <asm/arch/board.h>
4702 +#include <asm/arch/gpio.h>
4703 +
4704 +#include "generic.h"
4705 +
4706 +
4707 +static void __init tt9200_map_io(void)
4708 +{
4709 + /* Initialize processor: 18.432 MHz crystal */
4710 + at91rm9200_initialize(18432000, AT91RM9200_PQFP);
4711 +
4712 + /* Setup the LEDs */
4713 + at91_init_leds(AT91_PIN_PB27, AT91_PIN_PB27);
4714 +
4715 + /* DBGU on ttyS0. (Rx & Tx only) */
4716 + at91_register_uart(0, 0, 0);
4717 +
4718 + /* USART0 on ttyS1. (Rx & Tx only) */
4719 + at91_register_uart(AT91RM9200_ID_US0, 1, 0);
4720 +
4721 + /* USART1 on ttyS2. (Rx & Tx only) */
4722 + at91_register_uart(AT91RM9200_ID_US1, 2, 0);
4723 +
4724 + /* USART2 on ttyS3. (Rx & Tx only) */
4725 + at91_register_uart(AT91RM9200_ID_US2, 3, 0);
4726 +
4727 + /* USART3 on ttyS4. (Rx, Tx, CTS, RTS) */
4728 + at91_register_uart(AT91RM9200_ID_US3, 4, ATMEL_UART_CTS | ATMEL_UART_RTS);
4729 +
4730 + /* Console on ttyS0 (ie, DBGU) */
4731 + at91_set_serial_console(0);
4732 +}
4733 +
4734 +static void __init tt9200_init_irq(void)
4735 +{
4736 + at91rm9200_init_interrupts(NULL);
4737 +}
4738 +
4739 +static struct at91_eth_data __initdata tt9200_eth_data = {
4740 + .phy_irq_pin = AT91_PIN_PB29,
4741 + .is_rmii = 0,
4742 +};
4743 +
4744 +static struct at91_usbh_data __initdata tt9200_usbh_data = {
4745 + .ports = 1,
4746 +};
4747 +
4748 +static struct i2c_board_info __initdata tt9200_i2c_devices[] = {
4749 + {
4750 + I2C_BOARD_INFO("rtc-m41t80", 0x68),
4751 + .type = "m41t80",
4752 + }
4753 +};
4754 +
4755 +static struct at91_mmc_data __initdata tt9200_mmc_data = {
4756 + .slot_b = 0,
4757 + .wire4 = 1,
4758 +};
4759 +
4760 +
4761 +#if defined(CONFIG_MTD_DATAFLASH)
4762 +static struct mtd_partition __initdata tt9200_flash_partitions[] =
4763 +{
4764 + {
4765 + .name = "Darrell",
4766 + .offset = 0,
4767 + .size = 12 * 1056,
4768 + },
4769 + {
4770 + .name = "U-boot",
4771 + .offset = MTDPART_OFS_NXTBLK,
4772 + .size = 110 * 1056,
4773 + },
4774 + {
4775 + .name = "U-boot env",
4776 + .offset = MTDPART_OFS_NXTBLK,
4777 + .size = 8 * 1056,
4778 + },
4779 + {
4780 + .name = "Kernel",
4781 + .offset = MTDPART_OFS_NXTBLK,
4782 + .size = 1534 * 1056,
4783 + },
4784 + {
4785 + .name = "Filesystem",
4786 + .offset = MTDPART_OFS_NXTBLK,
4787 + .size = MTDPART_SIZ_FULL,
4788 + }
4789 +};
4790 +
4791 +static struct flash_platform_data __initdata tt9200_flash_platform = {
4792 + .name = "SPI Dataflash",
4793 + .parts = tt9200_flash_partitions,
4794 + .nr_parts = ARRAY_SIZE(tt9200_flash_partitions)
4795 +};
4796 +
4797 +#endif
4798 +
4799 +static struct spi_board_info __initdata tt9200_spi_devices[] = {
4800 + { /* DataFlash chip */
4801 + .modalias = "mtd_dataflash",
4802 + .chip_select = 0,
4803 + /* Errata #13 */
4804 + .max_speed_hz = 5 * 1000 * 1000,
4805 + .bus_num = 0,
4806 +#if defined(CONFIG_MTD_DATAFLASH)
4807 + .platform_data = &tt9200_flash_platform,
4808 +#endif
4809 + },
4810 +};
4811 +
4812 +static struct gpio_led tt9200_leds[] = {
4813 + {
4814 + .name = "led0",
4815 + .gpio = AT91_PIN_PB27,
4816 + .active_low = 1,
4817 + .default_trigger = "heartbeat",
4818 + }
4819 +};
4820 +
4821 +static void __init tt9200_board_init(void)
4822 +{
4823 + /* Serial */
4824 + at91_add_device_serial();
4825 +
4826 + /* Ethernet */
4827 + at91_add_device_eth(&tt9200_eth_data);
4828 +
4829 + /* USB Host */
4830 + at91_add_device_usbh(&tt9200_usbh_data);
4831 +
4832 + /* I2C */
4833 + at91_add_device_i2c(tt9200_i2c_devices, ARRAY_SIZE(tt9200_i2c_devices));
4834 +
4835 + /* MMC */
4836 + at91_add_device_mmc(0, &tt9200_mmc_data);
4837 +
4838 + /* LEDS */
4839 + at91_gpio_leds(tt9200_leds, ARRAY_SIZE(tt9200_leds));
4840 +
4841 + /* SPI */
4842 + at91_add_device_spi(tt9200_spi_devices, ARRAY_SIZE(tt9200_spi_devices));
4843 +}
4844 +
4845 +MACHINE_START(TT9200, "Toptech TT9200")
4846 + /* Maintainer: toptech.com.ar */
4847 + .phys_io = AT91_BASE_SYS,
4848 + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
4849 + .boot_params = AT91_SDRAM_BASE + 0x100,
4850 + .timer = &at91rm9200_timer,
4851 + .map_io = tt9200_map_io,
4852 + .init_irq = tt9200_init_irq,
4853 + .init_machine = tt9200_board_init,
4854 +MACHINE_END
4855 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-usb-a9260.c linux-2.6/arch/arm/mach-at91/board-usb-a9260.c
4856 --- linux-2.6.25/arch/arm/mach-at91/board-usb-a9260.c 1970-01-01 02:00:00.000000000 +0200
4857 +++ linux-2.6/arch/arm/mach-at91/board-usb-a9260.c 2008-04-25 21:15:43.000000000 +0200
4858 @@ -0,0 +1,215 @@
4859 +/*
4860 + * linux/arch/arm/mach-at91/board-usb-a9260.c
4861 + *
4862 + * Copyright (C) 2005 SAN People
4863 + * Copyright (C) 2006 Atmel
4864 + * Copyright (C) 2007 Calao-systems
4865 + *
4866 + * This program is free software; you can redistribute it and/or modify
4867 + * it under the terms of the GNU General Public License as published by
4868 + * the Free Software Foundation; either version 2 of the License, or
4869 + * (at your option) any later version.
4870 + *
4871 + * This program is distributed in the hope that it will be useful,
4872 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
4873 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
4874 + * GNU General Public License for more details.
4875 + *
4876 + * You should have received a copy of the GNU General Public License
4877 + * along with this program; if not, write to the Free Software
4878 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
4879 + */
4880 +
4881 +#include <linux/types.h>
4882 +#include <linux/init.h>
4883 +#include <linux/mm.h>
4884 +#include <linux/module.h>
4885 +#include <linux/platform_device.h>
4886 +#include <linux/spi/spi.h>
4887 +#include <linux/gpio_keys.h>
4888 +#include <linux/input.h>
4889 +#include <linux/clk.h>
4890 +
4891 +#include <asm/hardware.h>
4892 +#include <asm/setup.h>
4893 +#include <asm/mach-types.h>
4894 +#include <asm/irq.h>
4895 +
4896 +#include <asm/mach/arch.h>
4897 +#include <asm/mach/map.h>
4898 +#include <asm/mach/irq.h>
4899 +
4900 +#include <asm/arch/board.h>
4901 +#include <asm/arch/gpio.h>
4902 +#include <asm/arch/at91_shdwc.h>
4903 +
4904 +#include "generic.h"
4905 +
4906 +
4907 +static void __init ek_map_io(void)
4908 +{
4909 + /* Initialize processor: 12.000 MHz crystal */
4910 + at91sam9260_initialize(12000000);
4911 +
4912 + /* DGBU on ttyS0. (Rx & Tx only) */
4913 + at91_register_uart(0, 0, 0);
4914 +
4915 + /* set serial console to ttyS0 (ie, DBGU) */
4916 + at91_set_serial_console(0);
4917 +}
4918 +
4919 +static void __init ek_init_irq(void)
4920 +{
4921 + at91sam9260_init_interrupts(NULL);
4922 +}
4923 +
4924 +
4925 +/*
4926 + * USB Host port
4927 + */
4928 +static struct at91_usbh_data __initdata ek_usbh_data = {
4929 + .ports = 2,
4930 +};
4931 +
4932 +/*
4933 + * USB Device port
4934 + */
4935 +static struct at91_udc_data __initdata ek_udc_data = {
4936 + .vbus_pin = AT91_PIN_PC5,
4937 + .pullup_pin = 0, /* pull-up driven by UDC */
4938 +};
4939 +
4940 +/*
4941 + * MACB Ethernet device
4942 + */
4943 +static struct at91_eth_data __initdata ek_macb_data = {
4944 + .phy_irq_pin = AT91_PIN_PA31,
4945 + .is_rmii = 1,
4946 +};
4947 +
4948 +/*
4949 + * NAND flash
4950 + */
4951 +static struct mtd_partition __initdata ek_nand_partition[] = {
4952 + {
4953 + .name = "Uboot & Kernel",
4954 + .offset = 0x00000000,
4955 + .size = 16 * 1024 * 1024,
4956 + },
4957 + {
4958 + .name = "Root FS",
4959 + .offset = 0x01000000,
4960 + .size = 120 * 1024 * 1024,
4961 + },
4962 + {
4963 + .name = "FS",
4964 + .offset = 0x08800000,
4965 + .size = 120 * 1024 * 1024,
4966 + }
4967 +};
4968 +
4969 +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
4970 +{
4971 + *num_partitions = ARRAY_SIZE(ek_nand_partition);
4972 + return ek_nand_partition;
4973 +}
4974 +
4975 +static struct at91_nand_data __initdata ek_nand_data = {
4976 + .ale = 21,
4977 + .cle = 22,
4978 +// .det_pin = ... not connected
4979 + .rdy_pin = AT91_PIN_PC13,
4980 + .enable_pin = AT91_PIN_PC14,
4981 + .partition_info = nand_partitions,
4982 +#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
4983 + .bus_width_16 = 1,
4984 +#else
4985 + .bus_width_16 = 0,
4986 +#endif
4987 +};
4988 +
4989 +/*
4990 + * GPIO Buttons
4991 + */
4992 +
4993 +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
4994 +static struct gpio_keys_button ek_buttons[] = {
4995 + { /* USER PUSH BUTTON */
4996 + .code = KEY_ENTER,
4997 + .gpio = AT91_PIN_PB10,
4998 + .active_low = 1,
4999 + .desc = "user_pb",
5000 + .wakeup = 1,
5001 + }
5002 +};
5003 +
5004 +static struct gpio_keys_platform_data ek_button_data = {
5005 + .buttons = ek_buttons,
5006 + .nbuttons = ARRAY_SIZE(ek_buttons),
5007 +};
5008 +
5009 +static struct platform_device ek_button_device = {
5010 + .name = "gpio-keys",
5011 + .id = -1,
5012 + .num_resources = 0,
5013 + .dev = {
5014 + .platform_data = &ek_button_data,
5015 + }
5016 +};
5017 +
5018 +static void __init ek_add_device_buttons(void)
5019 +{
5020 + at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */
5021 + at91_set_deglitch(AT91_PIN_PB10, 1);
5022 +
5023 + platform_device_register(&ek_button_device);
5024 +}
5025 +#else
5026 +static void __init ek_add_device_buttons(void) {}
5027 +#endif
5028 +
5029 +/*
5030 + * LEDs
5031 + */
5032 +static struct gpio_led ek_leds[] = {
5033 + { /* user_led (green) */
5034 + .name = "user_led",
5035 + .gpio = AT91_PIN_PB21,
5036 + .active_low = 0,
5037 + .default_trigger = "heartbeat",
5038 + }
5039 +};
5040 +
5041 +static void __init ek_board_init(void)
5042 +{
5043 + /* Serial */
5044 + at91_add_device_serial();
5045 + /* USB Host */
5046 + at91_add_device_usbh(&ek_usbh_data);
5047 + /* USB Device */
5048 + at91_add_device_udc(&ek_udc_data);
5049 + /* NAND */
5050 + at91_add_device_nand(&ek_nand_data);
5051 + /* I2C */
5052 + at91_add_device_i2c(NULL, 0);
5053 + /* Ethernet */
5054 + at91_add_device_eth(&ek_macb_data);
5055 + /* Push Buttons */
5056 + ek_add_device_buttons();
5057 + /* LEDs */
5058 + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
5059 + /* shutdown controller, wakeup button (5 msec low) */
5060 + at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
5061 + | AT91_SHDW_RTTWKEN);
5062 +}
5063 +
5064 +MACHINE_START(USB_A9260, "CALAO USB_A9260")
5065 + /* Maintainer: calao-systems */
5066 + .phys_io = AT91_BASE_SYS,
5067 + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
5068 + .boot_params = AT91_SDRAM_BASE + 0x100,
5069 + .timer = &at91sam926x_timer,
5070 + .map_io = ek_map_io,
5071 + .init_irq = ek_init_irq,
5072 + .init_machine = ek_board_init,
5073 +MACHINE_END
5074 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/board-usb-a9263.c linux-2.6/arch/arm/mach-at91/board-usb-a9263.c
5075 --- linux-2.6.25/arch/arm/mach-at91/board-usb-a9263.c 1970-01-01 02:00:00.000000000 +0200
5076 +++ linux-2.6/arch/arm/mach-at91/board-usb-a9263.c 2008-04-25 21:15:43.000000000 +0200
5077 @@ -0,0 +1,230 @@
5078 +/*
5079 + * linux/arch/arm/mach-at91/board-usb-a9263.c
5080 + *
5081 + * Copyright (C) 2005 SAN People
5082 + * Copyright (C) 2007 Atmel Corporation.
5083 + * Copyright (C) 2007 Calao-systems
5084 + *
5085 + * This program is free software; you can redistribute it and/or modify
5086 + * it under the terms of the GNU General Public License as published by
5087 + * the Free Software Foundation; either version 2 of the License, or
5088 + * (at your option) any later version.
5089 + *
5090 + * This program is distributed in the hope that it will be useful,
5091 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
5092 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5093 + * GNU General Public License for more details.
5094 + *
5095 + * You should have received a copy of the GNU General Public License
5096 + * along with this program; if not, write to the Free Software
5097 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
5098 + */
5099 +
5100 +#include <linux/types.h>
5101 +#include <linux/init.h>
5102 +#include <linux/mm.h>
5103 +#include <linux/module.h>
5104 +#include <linux/platform_device.h>
5105 +#include <linux/spi/spi.h>
5106 +#include <linux/gpio_keys.h>
5107 +#include <linux/input.h>
5108 +
5109 +#include <asm/hardware.h>
5110 +#include <asm/setup.h>
5111 +#include <asm/mach-types.h>
5112 +#include <asm/irq.h>
5113 +
5114 +#include <asm/mach/arch.h>
5115 +#include <asm/mach/map.h>
5116 +#include <asm/mach/irq.h>
5117 +
5118 +#include <asm/arch/board.h>
5119 +#include <asm/arch/gpio.h>
5120 +#include <asm/arch/at91_shdwc.h>
5121 +
5122 +#include "generic.h"
5123 +
5124 +
5125 +static void __init ek_map_io(void)
5126 +{
5127 + /* Initialize processor: 12.00 MHz crystal */
5128 + at91sam9263_initialize(12000000);
5129 +
5130 + /* DGBU on ttyS0. (Rx & Tx only) */
5131 + at91_register_uart(0, 0, 0);
5132 +
5133 + /* set serial console to ttyS0 (ie, DBGU) */
5134 + at91_set_serial_console(0);
5135 +}
5136 +
5137 +static void __init ek_init_irq(void)
5138 +{
5139 + at91sam9263_init_interrupts(NULL);
5140 +}
5141 +
5142 +
5143 +/*
5144 + * USB Host port
5145 + */
5146 +static struct at91_usbh_data __initdata ek_usbh_data = {
5147 + .ports = 2,
5148 +};
5149 +
5150 +/*
5151 + * USB Device port
5152 + */
5153 +static struct at91_udc_data __initdata ek_udc_data = {
5154 + .vbus_pin = AT91_PIN_PB11,
5155 + .pullup_pin = 0, /* pull-up driven by UDC */
5156 +};
5157 +
5158 +/*
5159 + * SPI devices.
5160 + */
5161 +static struct spi_board_info ek_spi_devices[] = {
5162 +#if !defined(CONFIG_MMC_AT91)
5163 + { /* DataFlash chip */
5164 + .modalias = "mtd_dataflash",
5165 + .chip_select = 0,
5166 + .max_speed_hz = 15 * 1000 * 1000,
5167 + .bus_num = 0,
5168 + }
5169 +#endif
5170 +};
5171 +
5172 +/*
5173 + * MACB Ethernet device
5174 + */
5175 +static struct at91_eth_data __initdata ek_macb_data = {
5176 + .phy_irq_pin = AT91_PIN_PE31,
5177 + .is_rmii = 1,
5178 +};
5179 +
5180 +/*
5181 + * NAND flash
5182 + */
5183 +static struct mtd_partition __initdata ek_nand_partition[] = {
5184 + {
5185 + .name = "Linux Kernel",
5186 + .offset = 0x00000000,
5187 + .size = 16 * 1024 * 1024,
5188 + },
5189 + {
5190 + .name = "Root FS",
5191 + .offset = 0x01000000,
5192 + .size = 120 * 1024 * 1024,
5193 + },
5194 + {
5195 + .name = "FS",
5196 + .offset = 0x08800000,
5197 + .size = 120 * 1024 * 1024,
5198 + }
5199 +};
5200 +
5201 +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions)
5202 +{
5203 + *num_partitions = ARRAY_SIZE(ek_nand_partition);
5204 + return ek_nand_partition;
5205 +}
5206 +
5207 +static struct at91_nand_data __initdata ek_nand_data = {
5208 + .ale = 21,
5209 + .cle = 22,
5210 +// .det_pin = ... not connected
5211 + .rdy_pin = AT91_PIN_PA22,
5212 + .enable_pin = AT91_PIN_PD15,
5213 + .partition_info = nand_partitions,
5214 +#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16)
5215 + .bus_width_16 = 1,
5216 +#else
5217 + .bus_width_16 = 0,
5218 +#endif
5219 +};
5220 +
5221 +/*
5222 + * GPIO Buttons
5223 + */
5224 +#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
5225 +static struct gpio_keys_button ek_buttons[] = {
5226 + { /* USER PUSH BUTTON */
5227 + .code = KEY_ENTER,
5228 + .gpio = AT91_PIN_PB10,
5229 + .active_low = 1,
5230 + .desc = "user_pb",
5231 + .wakeup = 1,
5232 + }
5233 +};
5234 +
5235 +static struct gpio_keys_platform_data ek_button_data = {
5236 + .buttons = ek_buttons,
5237 + .nbuttons = ARRAY_SIZE(ek_buttons),
5238 +};
5239 +
5240 +static struct platform_device ek_button_device = {
5241 + .name = "gpio-keys",
5242 + .id = -1,
5243 + .num_resources = 0,
5244 + .dev = {
5245 + .platform_data = &ek_button_data,
5246 + }
5247 +};
5248 +
5249 +static void __init ek_add_device_buttons(void)
5250 +{
5251 + at91_set_GPIO_periph(AT91_PIN_PB10, 1); /* user push button, pull up enabled */
5252 + at91_set_deglitch(AT91_PIN_PB10, 1);
5253 +
5254 + platform_device_register(&ek_button_device);
5255 +}
5256 +#else
5257 +static void __init ek_add_device_buttons(void) {}
5258 +#endif
5259 +
5260 +/*
5261 + * LEDs
5262 + */
5263 +static struct gpio_led ek_leds[] = {
5264 + { /* user_led (green) */
5265 + .name = "user_led",
5266 + .gpio = AT91_PIN_PB21,
5267 + .active_low = 1,
5268 + .default_trigger = "heartbeat",
5269 + }
5270 +};
5271 +
5272 +
5273 +static void __init ek_board_init(void)
5274 +{
5275 + /* Serial */
5276 + at91_add_device_serial();
5277 + /* USB Host */
5278 + at91_add_device_usbh(&ek_usbh_data);
5279 + /* USB Device */
5280 + at91_add_device_udc(&ek_udc_data);
5281 + /* SPI */
5282 + at91_add_device_spi(ek_spi_devices, ARRAY_SIZE(ek_spi_devices));
5283 + /* Ethernet */
5284 + at91_add_device_eth(&ek_macb_data);
5285 + /* NAND */
5286 + at91_add_device_nand(&ek_nand_data);
5287 + /* I2C */
5288 + at91_add_device_i2c(NULL, 0);
5289 + /* Push Buttons */
5290 + ek_add_device_buttons();
5291 + /* LEDs */
5292 + at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
5293 + /* shutdown controller, wakeup button (5 msec low) */
5294 + at91_sys_write(AT91_SHDW_MR, AT91_SHDW_CPTWK0_(10) | AT91_SHDW_WKMODE0_LOW
5295 + | AT91_SHDW_RTTWKEN);
5296 +}
5297 +
5298 +MACHINE_START(USB_A9263, "CALAO USB_A9263")
5299 + /* Maintainer: calao-systems */
5300 + .phys_io = AT91_BASE_SYS,
5301 + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc,
5302 + .boot_params = AT91_SDRAM_BASE + 0x100,
5303 + .timer = &at91sam926x_timer,
5304 + .map_io = ek_map_io,
5305 + .init_irq = ek_init_irq,
5306 + .init_machine = ek_board_init,
5307 +MACHINE_END
5308 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/clock.c linux-2.6/arch/arm/mach-at91/clock.c
5309 --- linux-2.6.25/arch/arm/mach-at91/clock.c 2008-05-03 00:15:44.000000000 +0200
5310 +++ linux-2.6/arch/arm/mach-at91/clock.c 2008-04-25 21:15:43.000000000 +0200
5311 @@ -32,6 +32,7 @@
5312 #include <asm/arch/cpu.h>
5313
5314 #include "clock.h"
5315 +#include "generic.h"
5316
5317
5318 /*
5319 @@ -113,12 +114,34 @@
5320 at91_sys_write(AT91_PMC_SCDR, clk->pmc_mask);
5321 }
5322
5323 +static void pmc_uckr_mode(struct clk *clk, int is_on)
5324 +{
5325 + unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR);
5326 +
5327 + if (is_on) {
5328 + is_on = AT91_PMC_LOCKU;
5329 + at91_sys_write(AT91_CKGR_UCKR, uckr | clk->pmc_mask);
5330 + } else
5331 + at91_sys_write(AT91_CKGR_UCKR, uckr & ~(clk->pmc_mask));
5332 +
5333 + do {
5334 + cpu_relax();
5335 + } while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKU) != is_on);
5336 +}
5337 +
5338 /* USB function clocks (PLLB must be 48 MHz) */
5339 static struct clk udpck = {
5340 .name = "udpck",
5341 .parent = &pllb,
5342 .mode = pmc_sys_mode,
5343 };
5344 +static struct clk utmi_clk = {
5345 + .name = "utmi_clk",
5346 + .parent = &main_clk,
5347 + .pmc_mask = AT91_PMC_UPLLEN, /* in CKGR_UCKR */
5348 + .mode = pmc_uckr_mode,
5349 + .type = CLK_TYPE_PLL,
5350 +};
5351 static struct clk uhpck = {
5352 .name = "uhpck",
5353 .parent = &pllb,
5354 @@ -254,6 +277,23 @@
5355
5356 /*------------------------------------------------------------------------*/
5357
5358 +#ifdef CONFIG_PM
5359 +
5360 +int clk_must_disable(struct clk *clk)
5361 +{
5362 + if (!at91_suspend_entering_slow_clock())
5363 + return 0;
5364 +
5365 + while (clk->parent)
5366 + clk = clk->parent;
5367 + return clk != &clk32k;
5368 +}
5369 +EXPORT_SYMBOL(clk_must_disable);
5370 +
5371 +#endif
5372 +
5373 +/*------------------------------------------------------------------------*/
5374 +
5375 #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS
5376
5377 /*
5378 @@ -362,7 +402,7 @@
5379
5380 static int at91_clk_show(struct seq_file *s, void *unused)
5381 {
5382 - u32 scsr, pcsr, sr;
5383 + u32 scsr, pcsr, uckr = 0, sr;
5384 struct clk *clk;
5385
5386 seq_printf(s, "SCSR = %8x\n", scsr = at91_sys_read(AT91_PMC_SCSR));
5387 @@ -370,7 +410,10 @@
5388 seq_printf(s, "MOR = %8x\n", at91_sys_read(AT91_CKGR_MOR));
5389 seq_printf(s, "MCFR = %8x\n", at91_sys_read(AT91_CKGR_MCFR));
5390 seq_printf(s, "PLLA = %8x\n", at91_sys_read(AT91_CKGR_PLLAR));
5391 - seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
5392 + if (!cpu_is_at91sam9rl())
5393 + seq_printf(s, "PLLB = %8x\n", at91_sys_read(AT91_CKGR_PLLBR));
5394 + if (cpu_is_at91cap9() || cpu_is_at91sam9rl())
5395 + seq_printf(s, "UCKR = %8x\n", uckr = at91_sys_read(AT91_CKGR_UCKR));
5396 seq_printf(s, "MCKR = %8x\n", at91_sys_read(AT91_PMC_MCKR));
5397 seq_printf(s, "SR = %8x\n", sr = at91_sys_read(AT91_PMC_SR));
5398
5399 @@ -383,6 +426,8 @@
5400 state = (scsr & clk->pmc_mask) ? "on" : "off";
5401 else if (clk->mode == pmc_periph_mode)
5402 state = (pcsr & clk->pmc_mask) ? "on" : "off";
5403 + else if (clk->mode == pmc_uckr_mode)
5404 + state = (uckr & clk->pmc_mask) ? "on" : "off";
5405 else if (clk->pmc_mask)
5406 state = (sr & clk->pmc_mask) ? "on" : "off";
5407 else if (clk == &clk32k || clk == &main_clk)
5408 @@ -583,6 +628,17 @@
5409 uhpck.rate_hz = at91_usb_rate(&pllb, pllb.rate_hz, at91_pllb_usb_init);
5410
5411 /*
5412 + * USB HS clock init
5413 + */
5414 + if (cpu_is_at91cap9() || cpu_is_at91sam9rl()) {
5415 + /*
5416 + * multiplier is hard-wired to 40
5417 + * (obtain the USB High Speed 480 MHz when input is 12 MHz)
5418 + */
5419 + utmi_clk.rate_hz = 40 * utmi_clk.parent->rate_hz;
5420 + }
5421 +
5422 + /*
5423 * MCK and CPU derive from one of those primary clocks.
5424 * For now, assume this parentage won't change.
5425 */
5426 @@ -599,6 +655,9 @@
5427 for (i = 0; i < ARRAY_SIZE(standard_pmc_clocks); i++)
5428 list_add_tail(&standard_pmc_clocks[i]->node, &clocks);
5429
5430 + if (cpu_is_at91cap9() || cpu_is_at91sam9rl())
5431 + list_add_tail(&utmi_clk.node, &clocks);
5432 +
5433 /* MCK and CPU clock are "always on" */
5434 clk_enable(&mck);
5435
5436 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/generic.h linux-2.6/arch/arm/mach-at91/generic.h
5437 --- linux-2.6.25/arch/arm/mach-at91/generic.h 2008-05-03 00:15:44.000000000 +0200
5438 +++ linux-2.6/arch/arm/mach-at91/generic.h 2008-04-25 21:15:43.000000000 +0200
5439 @@ -41,6 +41,7 @@
5440 /* Power Management */
5441 extern void at91_irq_suspend(void);
5442 extern void at91_irq_resume(void);
5443 +extern int at91_suspend_entering_slow_clock(void);
5444
5445 /* GPIO */
5446 #define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
5447 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/gpio.c linux-2.6/arch/arm/mach-at91/gpio.c
5448 --- linux-2.6.25/arch/arm/mach-at91/gpio.c 2008-05-03 00:15:44.000000000 +0200
5449 +++ linux-2.6/arch/arm/mach-at91/gpio.c 2008-04-25 21:15:43.000000000 +0200
5450 @@ -490,7 +490,8 @@
5451
5452 /*--------------------------------------------------------------------------*/
5453
5454 -/* This lock class tells lockdep that GPIO irqs are in a different
5455 +/*
5456 + * This lock class tells lockdep that GPIO irqs are in a different
5457 * category than their parents, so it won't report false recursion.
5458 */
5459 static struct lock_class_key gpio_lock_class;
5460 @@ -557,6 +558,7 @@
5461 data->regbase = data->offset + (void __iomem *)AT91_VA_BASE_SYS;
5462
5463 /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */
5464 + /* AT91CAP9_ID_PIOABCD groups PIOA, PIOB, PIOC, PIOD */
5465 if (last && last->id == data->id)
5466 last->next = data;
5467 }
5468 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/ics1523.c linux-2.6/arch/arm/mach-at91/ics1523.c
5469 --- linux-2.6.25/arch/arm/mach-at91/ics1523.c 1970-01-01 02:00:00.000000000 +0200
5470 +++ linux-2.6/arch/arm/mach-at91/ics1523.c 2008-04-25 21:15:43.000000000 +0200
5471 @@ -0,0 +1,208 @@
5472 +/*
5473 + * arch/arm/mach-at91rm9200/ics1523.c
5474 + *
5475 + * Copyright (C) 2003 ATMEL Rousset
5476 + *
5477 + * This program is free software; you can redistribute it and/or modify
5478 + * it under the terms of the GNU General Public License as published by
5479 + * the Free Software Foundation; either version 2 of the License, or
5480 + * (at your option) any later version.
5481 + *
5482 + * This program is distributed in the hope that it will be useful,
5483 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
5484 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
5485 + * GNU General Public License for more details.
5486 + *
5487 + * You should have received a copy of the GNU General Public License
5488 + * along with this program; if not, write to the Free Software
5489 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
5490 + */
5491 +
5492 +#include <asm/hardware.h>
5493 +#include <asm/io.h>
5494 +
5495 +#include <linux/clk.h>
5496 +#include <linux/delay.h>
5497 +#include <linux/err.h>
5498 +#include <linux/init.h>
5499 +#include <linux/kernel.h>
5500 +
5501 +#include <asm/arch/ics1523.h>
5502 +#include <asm/arch/at91_twi.h>
5503 +#include <asm/arch/gpio.h>
5504 +
5505 +/* TWI Errors */
5506 +#define AT91_TWI_ERROR (AT91_TWI_NACK | AT91_TWI_UNRE | AT91_TWI_OVRE)
5507 +
5508 +
5509 +static void __iomem *twi_base;
5510 +
5511 +#define at91_twi_read(reg) __raw_readl(twi_base + (reg))
5512 +#define at91_twi_write(reg, val) __raw_writel((val), twi_base + (reg))
5513 +
5514 +
5515 +/* -----------------------------------------------------------------------------
5516 + * Initialization of TWI CLOCK
5517 + * ----------------------------------------------------------------------------- */
5518 +
5519 +static void at91_ics1523_SetTwiClock(unsigned int mck_khz)
5520 +{
5521 + int sclock;
5522 +
5523 + /* Here, CKDIV = 1 and CHDIV = CLDIV ==> CLDIV = CHDIV = 1/4*((Fmclk/FTWI) -6) */
5524 + sclock = (10*mck_khz / ICS_TRANSFER_RATE);
5525 + if (sclock % 10 >= 5)
5526 + sclock = (sclock /10) - 5;
5527 + else
5528 + sclock = (sclock /10)- 6;
5529 + sclock = (sclock + (4 - sclock %4)) >> 2; /* div 4 */
5530 +
5531 + at91_twi_write(AT91_TWI_CWGR, 0x00010000 | sclock | (sclock << 8));
5532 +}
5533 +
5534 +/* -----------------------------------------------------------------------------
5535 + * Read a byte with TWI Interface from the Clock Generator ICS1523
5536 + * ----------------------------------------------------------------------------- */
5537 +
5538 +static int at91_ics1523_ReadByte(unsigned char reg_address, unsigned char *data_in)
5539 +{
5540 + int Status, nb_trial;
5541 +
5542 + at91_twi_write(AT91_TWI_MMR, AT91_TWI_MREAD | AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
5543 + at91_twi_write(AT91_TWI_IADR, reg_address);
5544 + at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
5545 +
5546 + /* Program temporizing period (300us) */
5547 + udelay(300);
5548 +
5549 + /* Wait TXcomplete ... */
5550 + nb_trial = 0;
5551 + Status = at91_twi_read(AT91_TWI_SR);
5552 + while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
5553 + nb_trial++;
5554 + Status = at91_twi_read(AT91_TWI_SR);
5555 + }
5556 +
5557 + if (Status & AT91_TWI_TXCOMP) {
5558 + *data_in = (unsigned char) at91_twi_read(AT91_TWI_RHR);
5559 + return ICS1523_ACCESS_OK;
5560 + }
5561 + else
5562 + return ICS1523_ACCESS_ERROR;
5563 +}
5564 +
5565 +/* -----------------------------------------------------------------------------
5566 + * Write a byte with TWI Interface to the Clock Generator ICS1523
5567 + * ----------------------------------------------------------------------------- */
5568 +
5569 +static int at91_ics1523_WriteByte(unsigned char reg_address, unsigned char data_out)
5570 +{
5571 + int Status, nb_trial;
5572 +
5573 + at91_twi_write(AT91_TWI_MMR, AT91_TWI_IADRSZ_1 | ((ICS_ADDR << 16) & AT91_TWI_DADR));
5574 + at91_twi_write(AT91_TWI_IADR, reg_address);
5575 + at91_twi_write(AT91_TWI_THR, data_out);
5576 + at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
5577 +
5578 + /* Program temporizing period (300us) */
5579 + udelay(300);
5580 +
5581 + nb_trial = 0;
5582 + Status = at91_twi_read(AT91_TWI_SR);
5583 + while (!(Status & AT91_TWI_TXCOMP) && (nb_trial < 10)) {
5584 + nb_trial++;
5585 + if (Status & AT91_TWI_ERROR) {
5586 + /* If Underrun OR NACK - Start again */
5587 + at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
5588 +
5589 + /* Program temporizing period (300us) */
5590 + udelay(300);
5591 + }
5592 + Status = at91_twi_read(AT91_TWI_SR);
5593 + };
5594 +
5595 + if (Status & AT91_TWI_TXCOMP)
5596 + return ICS1523_ACCESS_OK;
5597 + else
5598 + return ICS1523_ACCESS_ERROR;
5599 +}
5600 +
5601 +/* -----------------------------------------------------------------------------
5602 + * Initialization of the Clock Generator ICS1523
5603 + * ----------------------------------------------------------------------------- */
5604 +
5605 +int at91_ics1523_init(void)
5606 +{
5607 + int nb_trial;
5608 + int ack = ICS1523_ACCESS_OK;
5609 + unsigned int status = 0xffffffff;
5610 + struct clk *twi_clk;
5611 +
5612 + /* Map in TWI peripheral */
5613 + twi_base = ioremap(AT91RM9200_BASE_TWI, SZ_16K);
5614 + if (!twi_base)
5615 + return -ENOMEM;
5616 +
5617 + /* pins used for TWI interface */
5618 + at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
5619 + at91_set_multi_drive(AT91_PIN_PA25, 1);
5620 + at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
5621 + at91_set_multi_drive(AT91_PIN_PA26, 1);
5622 +
5623 + /* Enable the TWI clock */
5624 + twi_clk = clk_get(NULL, "twi_clk");
5625 + if (IS_ERR(twi_clk))
5626 + return ICS1523_ACCESS_ERROR;
5627 + clk_enable(twi_clk);
5628 +
5629 + /* Disable interrupts */
5630 + at91_twi_write(AT91_TWI_IDR, -1);
5631 +
5632 + /* Reset peripheral */
5633 + at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST);
5634 +
5635 + /* Set Master mode */
5636 + at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN);
5637 +
5638 + /* Set TWI Clock Waveform Generator Register */
5639 + at91_ics1523_SetTwiClock(60000); /* MCK in KHz = 60000 KHz */
5640 +
5641 + /* ICS1523 Initialisation */
5642 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) 0);
5643 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OE, (unsigned char) (ICS_OEF | ICS_OET2 | ICS_OETCK));
5644 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_OD, (unsigned char) (ICS_INSEL | 0x7F));
5645 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0);
5646 +
5647 + nb_trial = 0;
5648 + do {
5649 + nb_trial++;
5650 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_ICR, (unsigned char) (ICS_ENDLS | ICS_ENPLS | ICS_PDEN /*| ICS_FUNCSEL*/));
5651 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_LCR, (unsigned char) (ICS_PSD | ICS_PFD));
5652 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD0, (unsigned char) 0x39) ; /* 0x7A */
5653 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_FD1, (unsigned char) 0x00);
5654 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_PLLR));
5655 +
5656 + /* Program 1ms temporizing period */
5657 + mdelay(1);
5658 +
5659 + at91_ics1523_ReadByte ((unsigned char) ICS_SR, (char *)&status);
5660 + } while (!((unsigned int) status & (unsigned int) ICS_PLLLOCK) && (nb_trial < 10));
5661 +
5662 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAC, (unsigned char) 0x03) ; /* 0x01 */
5663 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_SWRST, (unsigned char) (ICS_DPAR));
5664 +
5665 + /* Program 1ms temporizing period */
5666 + mdelay(1);
5667 +
5668 + ack |= at91_ics1523_WriteByte ((unsigned char) ICS_DPAO, (unsigned char) 0x00);
5669 +
5670 + /* Program 1ms temporizing period */
5671 + mdelay(1);
5672 +
5673 + /* All done - cleanup */
5674 + iounmap(twi_base);
5675 + clk_disable(twi_clk);
5676 + clk_put(twi_clk);
5677 +
5678 + return ack;
5679 +}
5680 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/pm.c linux-2.6/arch/arm/mach-at91/pm.c
5681 --- linux-2.6.25/arch/arm/mach-at91/pm.c 2008-05-03 00:15:44.000000000 +0200
5682 +++ linux-2.6/arch/arm/mach-at91/pm.c 2008-04-25 21:15:43.000000000 +0200
5683 @@ -26,12 +26,144 @@
5684 #include <asm/mach-types.h>
5685
5686 #include <asm/arch/at91_pmc.h>
5687 -#include <asm/arch/at91rm9200_mc.h>
5688 #include <asm/arch/gpio.h>
5689 #include <asm/arch/cpu.h>
5690
5691 #include "generic.h"
5692
5693 +#ifdef CONFIG_ARCH_AT91RM9200
5694 +#include <asm/arch/at91rm9200_mc.h>
5695 +
5696 +/*
5697 + * The AT91RM9200 goes into self-refresh mode with this command, and will
5698 + * terminate self-refresh automatically on the next SDRAM access.
5699 + */
5700 +#define sdram_selfrefresh_enable() at91_sys_write(AT91_SDRAMC_SRR, 1)
5701 +#define sdram_selfrefresh_disable() do {} while (0)
5702 +
5703 +#elif defined(CONFIG_ARCH_AT91CAP9)
5704 +#include <asm/arch/at91cap9_ddrsdr.h>
5705 +
5706 +static u32 saved_lpr;
5707 +
5708 +static inline void sdram_selfrefresh_enable(void)
5709 +{
5710 + u32 lpr;
5711 +
5712 + saved_lpr = at91_sys_read(AT91_DDRSDRC_LPR);
5713 +
5714 + lpr = saved_lpr & ~AT91_DDRSDRC_LPCB;
5715 + at91_sys_write(AT91_DDRSDRC_LPR, lpr | AT91_DDRSDRC_LPCB_SELF_REFRESH);
5716 +}
5717 +
5718 +#define sdram_selfrefresh_disable() at91_sys_write(AT91_DDRSDRC_LPR, saved_lpr)
5719 +
5720 +#else
5721 +#include <asm/arch/at91sam9_sdramc.h>
5722 +
5723 +#ifdef CONFIG_ARCH_AT91SAM9263
5724 +/*
5725 + * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
5726 + * handle those cases both here and in the Suspend-To-RAM support.
5727 + */
5728 +#define AT91_SDRAMC AT91_SDRAMC0
5729 +#warning Assuming EB1 SDRAM controller is *NOT* used
5730 +#endif
5731 +
5732 +static u32 saved_lpr;
5733 +
5734 +static inline void sdram_selfrefresh_enable(void)
5735 +{
5736 + u32 lpr;
5737 +
5738 + saved_lpr = at91_sys_read(AT91_SDRAMC_LPR);
5739 +
5740 + lpr = saved_lpr & ~AT91_SDRAMC_LPCB;
5741 + at91_sys_write(AT91_SDRAMC_LPR, lpr | AT91_SDRAMC_LPCB_SELF_REFRESH);
5742 +}
5743 +
5744 +#define sdram_selfrefresh_disable() at91_sys_write(AT91_SDRAMC_LPR, saved_lpr)
5745 +
5746 +/*
5747 + * FIXME: The AT91SAM9263 has a second EBI controller which may have
5748 + * additional SDRAM. pm_slowclock.S will require a similar fix.
5749 + */
5750 +
5751 +#endif
5752 +
5753 +
5754 +/*
5755 + * Show the reason for the previous system reset.
5756 + */
5757 +#if defined(AT91_SHDWC)
5758 +
5759 +#include <asm/arch/at91_rstc.h>
5760 +#include <asm/arch/at91_shdwc.h>
5761 +
5762 +static void __init show_reset_status(void)
5763 +{
5764 + static char reset[] __initdata = "reset";
5765 +
5766 + static char general[] __initdata = "general";
5767 + static char wakeup[] __initdata = "wakeup";
5768 + static char watchdog[] __initdata = "watchdog";
5769 + static char software[] __initdata = "software";
5770 + static char user[] __initdata = "user";
5771 + static char unknown[] __initdata = "unknown";
5772 +
5773 + static char signal[] __initdata = "signal";
5774 + static char rtc[] __initdata = "rtc";
5775 + static char rtt[] __initdata = "rtt";
5776 + static char restore[] __initdata = "power-restored";
5777 +
5778 + char *reason, *r2 = reset;
5779 + u32 reset_type, wake_type;
5780 +
5781 + reset_type = at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP;
5782 + wake_type = at91_sys_read(AT91_SHDW_SR);
5783 +
5784 + switch (reset_type) {
5785 + case AT91_RSTC_RSTTYP_GENERAL:
5786 + reason = general;
5787 + break;
5788 + case AT91_RSTC_RSTTYP_WAKEUP:
5789 + /* board-specific code enabled the wakeup sources */
5790 + reason = wakeup;
5791 +
5792 + /* "wakeup signal" */
5793 + if (wake_type & AT91_SHDW_WAKEUP0)
5794 + r2 = signal;
5795 + else {
5796 + r2 = reason;
5797 + if (wake_type & AT91_SHDW_RTTWK) /* rtt wakeup */
5798 + reason = rtt;
5799 + else if (wake_type & AT91_SHDW_RTCWK) /* rtc wakeup */
5800 + reason = rtc;
5801 + else if (wake_type == 0) /* power-restored wakeup */
5802 + reason = restore;
5803 + else /* unknown wakeup */
5804 + reason = unknown;
5805 + }
5806 + break;
5807 + case AT91_RSTC_RSTTYP_WATCHDOG:
5808 + reason = watchdog;
5809 + break;
5810 + case AT91_RSTC_RSTTYP_SOFTWARE:
5811 + reason = software;
5812 + break;
5813 + case AT91_RSTC_RSTTYP_USER:
5814 + reason = user;
5815 + break;
5816 + default:
5817 + reason = unknown;
5818 + break;
5819 + }
5820 + pr_info("AT91: Starting after %s %s\n", reason, r2);
5821 +}
5822 +#else
5823 +static void __init show_reset_status(void) {}
5824 +#endif
5825 +
5826
5827 static int at91_pm_valid_state(suspend_state_t state)
5828 {
5829 @@ -62,6 +194,7 @@
5830 * Verify that all the clocks are correct before entering
5831 * slow-clock mode.
5832 */
5833 +#warning "This should probably be moved to clocks.c"
5834 static int at91_pm_verify_clocks(void)
5835 {
5836 unsigned long scsr;
5837 @@ -107,24 +240,24 @@
5838 }
5839
5840 /*
5841 - * Call this from platform driver suspend() to see how deeply to suspend.
5842 + * This is called from clk_must_disable(), to see how deeply to suspend.
5843 * For example, some controllers (like OHCI) need one of the PLL clocks
5844 * in order to act as a wakeup source, and those are not available when
5845 * going into slow clock mode.
5846 - *
5847 - * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have
5848 - * the very same problem (but not using at91 main_clk), and it'd be better
5849 - * to add one generic API rather than lots of platform-specific ones.
5850 */
5851 int at91_suspend_entering_slow_clock(void)
5852 {
5853 return (target_state == PM_SUSPEND_MEM);
5854 }
5855 -EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
5856
5857
5858 static void (*slow_clock)(void);
5859
5860 +#ifdef CONFIG_AT91_SLOW_CLOCK
5861 +extern void at91_slow_clock(void);
5862 +extern u32 at91_slow_clock_sz;
5863 +#endif
5864 +
5865
5866 static int at91_pm_enter(suspend_state_t state)
5867 {
5868 @@ -158,11 +291,14 @@
5869 * turning off the main oscillator; reverse on wakeup.
5870 */
5871 if (slow_clock) {
5872 +#ifdef CONFIG_AT91_SLOW_CLOCK
5873 + /* copy slow_clock handler to SRAM, and call it */
5874 + memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz);
5875 +#endif
5876 slow_clock();
5877 break;
5878 } else {
5879 - /* DEVELOPMENT ONLY */
5880 - pr_info("AT91: PM - no slow clock mode yet ...\n");
5881 + pr_info("AT91: PM - no slow clock mode enabled ...\n");
5882 /* FALLTHROUGH leaving master clock alone */
5883 }
5884
5885 @@ -175,13 +311,15 @@
5886 case PM_SUSPEND_STANDBY:
5887 /*
5888 * NOTE: the Wait-for-Interrupt instruction needs to be
5889 - * in icache so the SDRAM stays in self-refresh mode until
5890 - * the wakeup IRQ occurs.
5891 + * in icache so no SDRAM accesses are needed until the
5892 + * wakeup IRQ occurs and self-refresh is terminated.
5893 */
5894 asm("b 1f; .align 5; 1:");
5895 asm("mcr p15, 0, r0, c7, c10, 4"); /* drain write buffer */
5896 - at91_sys_write(AT91_SDRAMC_SRR, 1); /* self-refresh mode */
5897 - /* fall though to next state */
5898 + sdram_selfrefresh_enable();
5899 + asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */
5900 + sdram_selfrefresh_disable();
5901 + break;
5902
5903 case PM_SUSPEND_ON:
5904 asm("mcr p15, 0, r0, c7, c0, 4"); /* wait for interrupt */
5905 @@ -196,6 +334,7 @@
5906 at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR));
5907
5908 error:
5909 + sdram_selfrefresh_disable();
5910 target_state = PM_SUSPEND_ON;
5911 at91_irq_resume();
5912 at91_gpio_resume();
5913 @@ -220,21 +359,20 @@
5914
5915 static int __init at91_pm_init(void)
5916 {
5917 - printk("AT91: Power Management\n");
5918 -
5919 -#ifdef CONFIG_AT91_PM_SLOW_CLOCK
5920 - /* REVISIT allocations of SRAM should be dynamically managed.
5921 - * FIQ handlers and other components will want SRAM/TCM too...
5922 - */
5923 - slow_clock = (void *) (AT91_VA_BASE_SRAM + (3 * SZ_4K));
5924 - memcpy(slow_clock, at91rm9200_slow_clock, at91rm9200_slow_clock_sz);
5925 +#ifdef CONFIG_AT91_SLOW_CLOCK
5926 + slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz);
5927 #endif
5928
5929 - /* Disable SDRAM low-power mode. Cannot be used with self-refresh. */
5930 + pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : ""));
5931 +
5932 +#ifdef CONFIG_ARCH_AT91RM9200
5933 + /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */
5934 at91_sys_write(AT91_SDRAMC_LPR, 0);
5935 +#endif
5936
5937 suspend_set_ops(&at91_pm_ops);
5938
5939 + show_reset_status();
5940 return 0;
5941 }
5942 arch_initcall(at91_pm_init);
5943 diff -urN -x CVS linux-2.6.25/arch/arm/mach-at91/pm_slowclock.S linux-2.6/arch/arm/mach-at91/pm_slowclock.S
5944 --- linux-2.6.25/arch/arm/mach-at91/pm_slowclock.S 1970-01-01 02:00:00.000000000 +0200
5945 +++ linux-2.6/arch/arm/mach-at91/pm_slowclock.S 2008-05-03 01:00:33.000000000 +0200
5946 @@ -0,0 +1,283 @@
5947 +/*
5948 + * arch/arm/mach-at91/pm_slow_clock.S
5949 + *
5950 + * Copyright (C) 2006 Savin Zlobec
5951 + *
5952 + * AT91SAM9 support:
5953 + * Copyright (C) 2007 Anti Sullin <anti.sullin@artecdesign.ee
5954 + *
5955 + * This program is free software; you can redistribute it and/or modify
5956 + * it under the terms of the GNU General Public License version 2 as
5957 + * published by the Free Software Foundation.
5958 + *
5959 + */
5960 +
5961 +#include <linux/linkage.h>
5962 +#include <asm/hardware.h>
5963 +#include <asm/arch/at91_pmc.h>
5964 +
5965 +#ifdef CONFIG_ARCH_AT91RM9200
5966 +#include <asm/arch/at91rm9200_mc.h>
5967 +#elif defined(CONFIG_ARCH_AT91CAP9)
5968 +#include <asm/arch/at91cap9_ddrsdr.h>
5969 +#else
5970 +#include <asm/arch/at91sam9_sdramc.h>
5971 +#endif
5972 +
5973 +
5974 +#ifdef CONFIG_ARCH_AT91SAM9263
5975 +/*
5976 + * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use;
5977 + * handle those cases both here and in the Suspend-To-RAM support.
5978 + */
5979 +#define AT91_SDRAMC AT91_SDRAMC0
5980 +#warning Assuming EB1 SDRAM controller is *NOT* used
5981 +#endif
5982 +
5983 +/*
5984 + * When SLOWDOWN_MASTER_CLOCK is defined we will also slow down the Master
5985 + * clock during suspend by adjusting its prescalar and divisor.
5986 + * NOTE: This hasn't been shown to be stable on SAM9s; and on the RM9200 there
5987 + * are errata regarding adjusting the prescalar and divisor.
5988 + */
5989 +#undef SLOWDOWN_MASTER_CLOCK
5990 +
5991 +#define MCKRDY_TIMEOUT 1000
5992 +#define MOSCRDY_TIMEOUT 1000
5993 +#define PLLALOCK_TIMEOUT 1000
5994 +#define PLLBLOCK_TIMEOUT 1000
5995 +
5996 +
5997 +/*
5998 + * Wait until master clock is ready (after switching master clock source)
5999 + */
6000 + .macro wait_mckrdy
6001 + mov r4, #MCKRDY_TIMEOUT
6002 +1: sub r4, r4, #1
6003 + cmp r4, #0
6004 + beq 2f
6005 + ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
6006 + tst r3, #AT91_PMC_MCKRDY
6007 + beq 1b
6008 +2:
6009 + .endm
6010 +
6011 +/*
6012 + * Wait until master oscillator has stabilized.
6013 + */
6014 + .macro wait_moscrdy
6015 + mov r4, #MOSCRDY_TIMEOUT
6016 +1: sub r4, r4, #1
6017 + cmp r4, #0
6018 + beq 2f
6019 + ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
6020 + tst r3, #AT91_PMC_MOSCS
6021 + beq 1b
6022 +2:
6023 + .endm
6024 +
6025 +/*
6026 + * Wait until PLLA has locked.
6027 + */
6028 + .macro wait_pllalock
6029 + mov r4, #PLLALOCK_TIMEOUT
6030 +1: sub r4, r4, #1
6031 + cmp r4, #0
6032 + beq 2f
6033 + ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
6034 + tst r3, #AT91_PMC_LOCKA
6035 + beq 1b
6036 +2:
6037 + .endm
6038 +
6039 +/*
6040 + * Wait until PLLB has locked.
6041 + */
6042 + .macro wait_pllblock
6043 + mov r4, #PLLBLOCK_TIMEOUT
6044 +1: sub r4, r4, #1
6045 + cmp r4, #0
6046 + beq 2f
6047 + ldr r3, [r1, #(AT91_PMC_SR - AT91_PMC)]
6048 + tst r3, #AT91_PMC_LOCKB
6049 + beq 1b
6050 +2:
6051 + .endm
6052 +
6053 + .text
6054 +
6055 +ENTRY(at91_slow_clock)
6056 + /* Save registers on stack */
6057 + stmfd sp!, {r0 - r12, lr}
6058 +
6059 + /*
6060 + * Register usage:
6061 + * R1 = Base address of AT91_PMC
6062 + * R2 = Base address of AT91_SDRAMC (or AT91_SYS on AT91RM9200)
6063 + * R3 = temporary register
6064 + * R4 = temporary register
6065 + */
6066 + ldr r1, .at91_va_base_pmc
6067 + ldr r2, .at91_va_base_sdramc
6068 +
6069 + /* Drain write buffer */
6070 + mcr p15, 0, r0, c7, c10, 4
6071 +
6072 +#ifdef CONFIG_ARCH_AT91RM9200
6073 + /* Put SDRAM in self-refresh mode */
6074 + mov r3, #1
6075 + str r3, [r2, #AT91_SDRAMC_SRR]
6076 +#elif defined(CONFIG_ARCH_AT91CAP9)
6077 + /* Enable SDRAM self-refresh mode */
6078 + ldr r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
6079 + str r3, .saved_sam9_lpr
6080 +
6081 + mov r3, #AT91_DDRSDRC_LPCB_SELF_REFRESH
6082 + str r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
6083 +#else
6084 + /* Enable SDRAM self-refresh mode */
6085 + ldr r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
6086 + str r3, .saved_sam9_lpr
6087 +
6088 + mov r3, #AT91_SDRAMC_LPCB_SELF_REFRESH
6089 + str r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
6090 +#endif
6091 +
6092 + /* Save Master clock setting */
6093 + ldr r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
6094 + str r3, .saved_mckr
6095 +
6096 + /*
6097 + * Set the Master clock source to slow clock
6098 + */
6099 + bic r3, r3, #AT91_PMC_CSS
6100 + str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
6101 +
6102 + wait_mckrdy
6103 +
6104 +#ifdef SLOWDOWN_MASTER_CLOCK
6105 + /*
6106 + * Set the Master Clock PRES and MDIV fields.
6107 + *
6108 + * See AT91RM9200 errata #27 and #28 for details.
6109 + */
6110 + mov r3, #0
6111 + str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
6112 +
6113 + wait_mckrdy
6114 +#endif
6115 +
6116 + /* Save PLLA setting and disable it */
6117 + ldr r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
6118 + str r3, .saved_pllar
6119 +
6120 + mov r3, #AT91_PMC_PLLCOUNT
6121 + orr r3, r3, #(1 << 29) /* bit 29 always set */
6122 + str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
6123 +
6124 + wait_pllalock
6125 +
6126 + /* Save PLLB setting and disable it */
6127 + ldr r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
6128 + str r3, .saved_pllbr
6129 +
6130 + mov r3, #AT91_PMC_PLLCOUNT
6131 + str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
6132 +
6133 + wait_pllblock
6134 +
6135 + /* Turn off the main oscillator */
6136 + ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
6137 + bic r3, r3, #AT91_PMC_MOSCEN
6138 + str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
6139 +
6140 + /* Wait for interrupt */
6141 + mcr p15, 0, r0, c7, c0, 4
6142 +
6143 + /* Turn on the main oscillator */
6144 + ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
6145 + orr r3, r3, #AT91_PMC_MOSCEN
6146 + str r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
6147 +
6148 + wait_moscrdy
6149 +
6150 + /* Restore PLLB setting */
6151 + ldr r3, .saved_pllbr
6152 + str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
6153 +
6154 + wait_pllblock
6155 +
6156 + /* Restore PLLA setting */
6157 + ldr r3, .saved_pllar
6158 + str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
6159 +
6160 + wait_pllalock
6161 +
6162 +#ifdef SLOWDOWN_MASTER_CLOCK
6163 + /*
6164 + * First set PRES if it was not 0,
6165 + * than set CSS and MDIV fields.
6166 + *
6167 + * See AT91RM9200 errata #27 and #28 for details.
6168 + */
6169 + ldr r3, .saved_mckr
6170 + tst r3, #AT91_PMC_PRES
6171 + beq 2f
6172 + and r3, r3, #AT91_PMC_PRES
6173 + str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
6174 +
6175 + wait_mckrdy
6176 +#endif
6177 +
6178 + /*
6179 + * Restore master clock setting
6180 + */
6181 +2: ldr r3, .saved_mckr
6182 + str r3, [r1, #(AT91_PMC_MCKR - AT91_PMC)]
6183 +
6184 + wait_mckrdy
6185 +
6186 +#ifdef CONFIG_ARCH_AT91RM9200
6187 + /* Do nothing - self-refresh is automatically disabled. */
6188 +#elif defined(CONFIG_ARCH_AT91CAP9)
6189 + /* Restore LPR on AT91CAP9 */
6190 + ldr r3, .saved_sam9_lpr
6191 + str r3, [r2, #AT91_DDRSDRC_LPR - AT91_DDRSDRC]
6192 +#else
6193 + /* Restore LPR on AT91SAM9 */
6194 + ldr r3, .saved_sam9_lpr
6195 + str r3, [r2, #AT91_SDRAMC_LPR - AT91_SDRAMC]
6196 +#endif
6197 +
6198 + /* Restore registers, and return */
6199 + ldmfd sp!, {r0 - r12, pc}
6200 +
6201 +
6202 +.saved_mckr:
6203 + .word 0
6204 +
6205 +.saved_pllar:
6206 + .word 0
6207 +
6208 +.saved_pllbr:
6209 + .word 0
6210 +
6211 +.saved_sam9_lpr:
6212 + .word 0
6213 +
6214 +.at91_va_base_pmc:
6215 + .word AT91_VA_BASE_SYS + AT91_PMC
6216 +
6217 +#ifdef CONFIG_ARCH_AT91RM9200
6218 +.at91_va_base_sdramc:
6219 + .word AT91_VA_BASE_SYS
6220 +#elif defined(CONFIG_ARCH_AT91CAP9)
6221 +.at91_va_base_sdramc:
6222 + .word AT91_VA_BASE_SYS + AT91_DDRSDRC
6223 +#else
6224 +.at91_va_base_sdramc:
6225 + .word AT91_VA_BASE_SYS + AT91_SDRAMC
6226 +#endif
6227 +
6228 +ENTRY(at91_slow_clock_sz)
6229 + .word .-at91_slow_clock
6230 diff -urN -x CVS linux-2.6.25/arch/arm/mach-ks8695/Makefile linux-2.6/arch/arm/mach-ks8695/Makefile
6231 --- linux-2.6.25/arch/arm/mach-ks8695/Makefile 2008-05-03 00:15:44.000000000 +0200
6232 +++ linux-2.6/arch/arm/mach-ks8695/Makefile 2007-12-31 15:04:45.000000000 +0200
6233 @@ -11,5 +11,8 @@
6234 # PCI support is optional
6235 obj-$(CONFIG_PCI) += pci.o
6236
6237 +# LEDs
6238 +obj-$(CONFIG_LEDS) += leds.o
6239 +
6240 # Board-specific support
6241 obj-$(CONFIG_MACH_KS8695) += board-micrel.o
6242 diff -urN -x CVS linux-2.6.25/arch/arm/mach-ks8695/devices.c linux-2.6/arch/arm/mach-ks8695/devices.c
6243 --- linux-2.6.25/arch/arm/mach-ks8695/devices.c 2007-10-09 22:31:38.000000000 +0200
6244 +++ linux-2.6/arch/arm/mach-ks8695/devices.c 2007-12-31 10:43:55.000000000 +0200
6245 @@ -176,6 +176,27 @@
6246 #endif
6247
6248
6249 +/* --------------------------------------------------------------------
6250 + * LEDs
6251 + * -------------------------------------------------------------------- */
6252 +
6253 +#if defined(CONFIG_LEDS)
6254 +short ks8695_leds_cpu = -1;
6255 +short ks8695_leds_timer = -1;
6256 +
6257 +void __init ks8695_init_leds(u8 cpu_led, u8 timer_led)
6258 +{
6259 + /* Enable GPIO to access the LEDs */
6260 + gpio_direction_output(cpu_led, 1);
6261 + gpio_direction_output(timer_led, 1);
6262 +
6263 + ks8695_leds_cpu = cpu_led;
6264 + ks8695_leds_timer = timer_led;
6265 +}
6266 +#else
6267 +void __init ks8695_init_leds(u8 cpu_led, u8 timer_led) {}
6268 +#endif
6269 +
6270 /* -------------------------------------------------------------------- */
6271
6272 /*
6273 diff -urN -x CVS linux-2.6.25/arch/arm/mach-ks8695/gpio.c linux-2.6/arch/arm/mach-ks8695/gpio.c
6274 --- linux-2.6.25/arch/arm/mach-ks8695/gpio.c 2008-05-03 00:15:44.000000000 +0200
6275 +++ linux-2.6/arch/arm/mach-ks8695/gpio.c 2007-12-31 14:49:20.000000000 +0200
6276 @@ -136,9 +136,9 @@
6277 /* set line state */
6278 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
6279 if (state)
6280 - x |= (1 << pin);
6281 + x |= IOPD_(pin);
6282 else
6283 - x &= ~(1 << pin);
6284 + x &= ~IOPD_(pin);
6285 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
6286
6287 /* set pin as output */
6288 @@ -168,9 +168,9 @@
6289 /* set output line state */
6290 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
6291 if (state)
6292 - x |= (1 << pin);
6293 + x |= IOPD_(pin);
6294 else
6295 - x &= ~(1 << pin);
6296 + x &= ~IOPD_(pin);
6297 __raw_writel(x, KS8695_GPIO_VA + KS8695_IOPD);
6298
6299 local_irq_restore(flags);
6300 @@ -189,7 +189,7 @@
6301 return -EINVAL;
6302
6303 x = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD);
6304 - return (x & (1 << pin)) != 0;
6305 + return (x & IOPD_(pin)) != 0;
6306 }
6307 EXPORT_SYMBOL(gpio_get_value);
6308
6309 diff -urN -x CVS linux-2.6.25/arch/arm/mach-ks8695/leds.c linux-2.6/arch/arm/mach-ks8695/leds.c
6310 --- linux-2.6.25/arch/arm/mach-ks8695/leds.c 1970-01-01 02:00:00.000000000 +0200
6311 +++ linux-2.6/arch/arm/mach-ks8695/leds.c 2007-12-31 15:18:25.000000000 +0200
6312 @@ -0,0 +1,94 @@
6313 +/*
6314 + * LED driver for KS8695-based boards.
6315 + *
6316 + * Copyright (C) Andrew Victor
6317 + *
6318 + * This program is free software; you can redistribute it and/or modify
6319 + * it under the terms of the GNU General Public License version 2 as
6320 + * published by the Free Software Foundation.
6321 + */
6322 +
6323 +#include <linux/kernel.h>
6324 +#include <linux/module.h>
6325 +#include <linux/init.h>
6326 +
6327 +#include <asm/mach-types.h>
6328 +#include <asm/leds.h>
6329 +#include <asm/arch/devices.h>
6330 +#include <asm/arch/gpio.h>
6331 +
6332 +
6333 +static inline void ks8695_led_on(unsigned int led)
6334 +{
6335 + gpio_set_value(led, 0);
6336 +}
6337 +
6338 +static inline void ks8695_led_off(unsigned int led)
6339 +{
6340 + gpio_set_value(led, 1);
6341 +}
6342 +
6343 +static inline void ks8695_led_toggle(unsigned int led)
6344 +{
6345 + unsigned long is_off = gpio_get_value(led);
6346 + if (is_off)
6347 + ks8695_led_on(led);
6348 + else
6349 + ks8695_led_off(led);
6350 +}
6351 +
6352 +
6353 +/*
6354 + * Handle LED events.
6355 + */
6356 +static void ks8695_leds_event(led_event_t evt)
6357 +{
6358 + unsigned long flags;
6359 +
6360 + local_irq_save(flags);
6361 +
6362 + switch(evt) {
6363 + case led_start: /* System startup */
6364 + ks8695_led_on(ks8695_leds_cpu);
6365 + break;
6366 +
6367 + case led_stop: /* System stop / suspend */
6368 + ks8695_led_off(ks8695_leds_cpu);
6369 + break;
6370 +
6371 +#ifdef CONFIG_LEDS_TIMER
6372 + case led_timer: /* Every 50 timer ticks */
6373 + ks8695_led_toggle(ks8695_leds_timer);
6374 + break;
6375 +#endif
6376 +
6377 +#ifdef CONFIG_LEDS_CPU
6378 + case led_idle_start: /* Entering idle state */
6379 + ks8695_led_off(ks8695_leds_cpu);
6380 + break;
6381 +
6382 + case led_idle_end: /* Exit idle state */
6383 + ks8695_led_on(ks8695_leds_cpu);
6384 + break;
6385 +#endif
6386 +
6387 + default:
6388 + break;
6389 + }
6390 +
6391 + local_irq_restore(flags);
6392 +}
6393 +
6394 +
6395 +static int __init leds_init(void)
6396 +{
6397 + if ((ks8695_leds_timer == -1) || (ks8695_leds_cpu == -1))
6398 + return -ENODEV;
6399 +
6400 + leds_event = ks8695_leds_event;
6401 +
6402 + leds_event(led_start);
6403 + return 0;
6404 +}
6405 +
6406 +__initcall(leds_init);
6407 diff -urN -x CVS linux-2.6.25/arch/arm/mach-ks8695/pci.c linux-2.6/arch/arm/mach-ks8695/pci.c
6408 --- linux-2.6.25/arch/arm/mach-ks8695/pci.c 2008-05-03 00:15:44.000000000 +0200
6409 +++ linux-2.6/arch/arm/mach-ks8695/pci.c 2008-05-08 22:03:41.000000000 +0200
6410 @@ -141,7 +141,7 @@
6411 .write = ks8695_pci_writeconfig,
6412 };
6413
6414 -static struct pci_bus *ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys)
6415 +static struct pci_bus* __init ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys)
6416 {
6417 return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys);
6418 }
6419 diff -urN -x CVS linux-2.6.25/drivers/char/Kconfig linux-2.6/drivers/char/Kconfig
6420 --- linux-2.6.25/drivers/char/Kconfig 2008-05-03 00:15:47.000000000 +0200
6421 +++ linux-2.6/drivers/char/Kconfig 2008-03-09 15:14:46.000000000 +0200
6422 @@ -1056,5 +1056,21 @@
6423
6424 source "drivers/s390/char/Kconfig"
6425
6426 +config AT91_SPI
6427 + bool "SPI driver (legacy) for AT91RM9200 processors"
6428 + depends on ARCH_AT91RM9200
6429 + default y
6430 + help
6431 + The SPI driver gives access to this serial bus on the AT91RM9200
6432 + processor.
6433 +
6434 +config AT91_SPIDEV
6435 + bool "SPI device interface (legacy) for AT91RM9200 processors"
6436 + depends on ARCH_AT91RM9200 && AT91_SPI
6437 + default n
6438 + help
6439 + The SPI driver gives user mode access to this serial
6440 + bus on the AT91RM9200 processor.
6441 +
6442 endmenu
6443
6444 diff -urN -x CVS linux-2.6.25/drivers/char/Makefile linux-2.6/drivers/char/Makefile
6445 --- linux-2.6.25/drivers/char/Makefile 2008-05-03 00:15:47.000000000 +0200
6446 +++ linux-2.6/drivers/char/Makefile 2008-03-09 15:14:46.000000000 +0200
6447 @@ -98,6 +98,8 @@
6448 obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o
6449 obj-$(CONFIG_GPIO_TB0219) += tb0219.o
6450 obj-$(CONFIG_TELCLOCK) += tlclk.o
6451 +obj-$(CONFIG_AT91_SPI) += at91_spi.o
6452 +obj-$(CONFIG_AT91_SPIDEV) += at91_spidev.o
6453
6454 obj-$(CONFIG_MWAVE) += mwave/
6455 obj-$(CONFIG_AGP) += agp/
6456 diff -urN -x CVS linux-2.6.25/drivers/char/at91_spi.c linux-2.6/drivers/char/at91_spi.c
6457 --- linux-2.6.25/drivers/char/at91_spi.c 1970-01-01 02:00:00.000000000 +0200
6458 +++ linux-2.6/drivers/char/at91_spi.c 2008-04-18 17:38:01.000000000 +0200
6459 @@ -0,0 +1,337 @@
6460 +/*
6461 + * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200 (Thunder)
6462 + *
6463 + * Copyright (C) SAN People (Pty) Ltd
6464 + *
6465 + * This program is free software; you can redistribute it and/or
6466 + * modify it under the terms of the GNU General Public License
6467 + * as published by the Free Software Foundation; either version
6468 + * 2 of the License, or (at your option) any later version.
6469 + */
6470 +
6471 +#include <linux/init.h>
6472 +#include <linux/dma-mapping.h>
6473 +#include <linux/module.h>
6474 +#include <linux/sched.h>
6475 +#include <linux/completion.h>
6476 +#include <linux/interrupt.h>
6477 +#include <linux/clk.h>
6478 +#include <linux/platform_device.h>
6479 +#include <linux/atmel_pdc.h>
6480 +#include <asm/io.h>
6481 +#include <asm/semaphore.h>
6482 +
6483 +#include <asm/arch/at91_spi.h>
6484 +#include <asm/arch/board.h>
6485 +#include <asm/arch/spi.h>
6486 +
6487 +#undef DEBUG_SPI
6488 +
6489 +static struct spi_local spi_dev[NR_SPI_DEVICES]; /* state of the SPI devices */
6490 +static int spi_enabled = 0;
6491 +static struct semaphore spi_lock; /* protect access to SPI bus */
6492 +static int current_device = -1; /* currently selected SPI device */
6493 +static struct clk *spi_clk; /* SPI clock */
6494 +static void __iomem *spi_base; /* SPI peripheral base-address */
6495 +
6496 +DECLARE_COMPLETION(transfer_complete);
6497 +
6498 +
6499 +#define at91_spi_read(reg) __raw_readl(spi_base + (reg))
6500 +#define at91_spi_write(reg, val) __raw_writel((val), spi_base + (reg))
6501 +
6502 +
6503 +/* ......................................................................... */
6504 +
6505 +/*
6506 + * Access and enable the SPI bus.
6507 + * This MUST be called before any transfers are performed.
6508 + */
6509 +void spi_access_bus(short device)
6510 +{
6511 + /* Ensure that requested device is valid */
6512 + if ((device < 0) || (device >= NR_SPI_DEVICES))
6513 + panic("at91_spi: spi_access_bus called with invalid device");
6514 +
6515 + if (spi_enabled == 0) {
6516 + clk_enable(spi_clk); /* Enable Peripheral clock */
6517 + at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIEN); /* Enable SPI */
6518 +#ifdef DEBUG_SPI
6519 + printk("SPI on\n");
6520 +#endif
6521 + }
6522 + spi_enabled++;
6523 +
6524 + /* Lock the SPI bus */
6525 + down(&spi_lock);
6526 + current_device = device;
6527 +
6528 + /* Configure SPI bus for device */
6529 + at91_spi_write(AT91_SPI_MR, AT91_SPI_MSTR | AT91_SPI_MODFDIS | (spi_dev[device].pcs << 16));
6530 +}
6531 +
6532 +/*
6533 + * Relinquish control of the SPI bus.
6534 + */
6535 +void spi_release_bus(short device)
6536 +{
6537 + if (device != current_device)
6538 + panic("at91_spi: spi_release called with invalid device");
6539 +
6540 + /* Release the SPI bus */
6541 + current_device = -1;
6542 + up(&spi_lock);
6543 +
6544 + spi_enabled--;
6545 + if (spi_enabled == 0) {
6546 + at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIDIS); /* Disable SPI */
6547 + clk_disable(spi_clk); /* Disable Peripheral clock */
6548 +#ifdef DEBUG_SPI
6549 + printk("SPI off\n");
6550 +#endif
6551 + }
6552 +}
6553 +
6554 +/*
6555 + * Perform a data transfer over the SPI bus
6556 + */
6557 +int spi_transfer(struct spi_transfer_list* list)
6558 +{
6559 + struct spi_local *device = (struct spi_local *) &spi_dev[current_device];
6560 + int tx_size;
6561 +
6562 + if (!list)
6563 + panic("at91_spi: spi_transfer called with NULL transfer list");
6564 + if (current_device == -1)
6565 + panic("at91_spi: spi_transfer called without acquiring bus");
6566 +
6567 +#ifdef DEBUG_SPI
6568 + printk("SPI transfer start [%i]\n", list->nr_transfers);
6569 +#endif
6570 +
6571 + /* If we are in 16-bit mode, we need to modify what we pass to the PDC */
6572 + tx_size = (at91_spi_read(AT91_SPI_CSR(current_device)) & AT91_SPI_BITS_16) ? 2 : 1;
6573 +
6574 + /* Store transfer list */
6575 + device->xfers = list;
6576 + list->curr = 0;
6577 +
6578 + /* Assume there must be at least one transfer */
6579 + device->tx = dma_map_single(NULL, list->tx[0], list->txlen[0], DMA_TO_DEVICE);
6580 + device->rx = dma_map_single(NULL, list->rx[0], list->rxlen[0], DMA_FROM_DEVICE);
6581 +
6582 + /* Program PDC registers */
6583 + at91_spi_write(ATMEL_PDC_TPR, device->tx);
6584 + at91_spi_write(ATMEL_PDC_RPR, device->rx);
6585 + at91_spi_write(ATMEL_PDC_TCR, list->txlen[0] / tx_size);
6586 + at91_spi_write(ATMEL_PDC_RCR, list->rxlen[0] / tx_size);
6587 +
6588 + /* Is there a second transfer? */
6589 + if (list->nr_transfers > 1) {
6590 + device->txnext = dma_map_single(NULL, list->tx[1], list->txlen[1], DMA_TO_DEVICE);
6591 + device->rxnext = dma_map_single(NULL, list->rx[1], list->rxlen[1], DMA_FROM_DEVICE);
6592 +
6593 + /* Program Next PDC registers */
6594 + at91_spi_write(ATMEL_PDC_TNPR, device->txnext);
6595 + at91_spi_write(ATMEL_PDC_RNPR, device->rxnext);
6596 + at91_spi_write(ATMEL_PDC_TNCR, list->txlen[1] / tx_size);
6597 + at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[1] / tx_size);
6598 + }
6599 + else {
6600 + device->txnext = 0;
6601 + device->rxnext = 0;
6602 + at91_spi_write(ATMEL_PDC_TNCR, 0);
6603 + at91_spi_write(ATMEL_PDC_RNCR, 0);
6604 + }
6605 +
6606 + // TODO: If we are doing consecutive transfers (at high speed, or
6607 + // small buffers), then it might be worth modifying the 'Delay between
6608 + // Consecutive Transfers' in the CSR registers.
6609 + // This is an issue if we cannot chain the next buffer fast enough
6610 + // in the interrupt handler.
6611 +
6612 + /* Enable transmitter and receiver */
6613 + at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN | ATMEL_PDC_TXTEN);
6614 +
6615 + at91_spi_write(AT91_SPI_IER, AT91_SPI_ENDRX); /* enable buffer complete interrupt */
6616 + wait_for_completion(&transfer_complete);
6617 +
6618 +#ifdef DEBUG_SPI
6619 + printk("SPI transfer end\n");
6620 +#endif
6621 +
6622 + return 0;
6623 +}
6624 +
6625 +/* ......................................................................... */
6626 +
6627 +/*
6628 + * Handle interrupts from the SPI controller.
6629 + */
6630 +static irqreturn_t at91spi_interrupt(int irq, void *dev_id)
6631 +{
6632 + unsigned int status;
6633 + struct spi_local *device = (struct spi_local *) &spi_dev[current_device];
6634 + struct spi_transfer_list *list = device->xfers;
6635 +
6636 +#ifdef DEBUG_SPI
6637 + printk("SPI interrupt %i\n", current_device);
6638 +#endif
6639 +
6640 + if (!list)
6641 + panic("at91_spi: spi_interrupt with a NULL transfer list");
6642 +
6643 + status = at91_spi_read(AT91_SPI_SR) & at91_spi_read(AT91_SPI_IMR); /* read status */
6644 +
6645 + dma_unmap_single(NULL, device->tx, list->txlen[list->curr], DMA_TO_DEVICE);
6646 + dma_unmap_single(NULL, device->rx, list->rxlen[list->curr], DMA_FROM_DEVICE);
6647 +
6648 + device->tx = device->txnext; /* move next transfer to current transfer */
6649 + device->rx = device->rxnext;
6650 +
6651 + list->curr = list->curr + 1;
6652 + if (list->curr == list->nr_transfers) { /* all transfers complete */
6653 + at91_spi_write(AT91_SPI_IDR, AT91_SPI_ENDRX); /* disable interrupt */
6654 +
6655 + /* Disable transmitter and receiver */
6656 + at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
6657 +
6658 + device->xfers = NULL;
6659 + complete(&transfer_complete);
6660 + }
6661 + else if (list->curr+1 == list->nr_transfers) { /* no more next transfers */
6662 + device->txnext = 0;
6663 + device->rxnext = 0;
6664 + at91_spi_write(ATMEL_PDC_TNCR, 0);
6665 + at91_spi_write(ATMEL_PDC_RNCR, 0);
6666 + }
6667 + else {
6668 + int i = (list->curr)+1;
6669 +
6670 + /* If we are in 16-bit mode, we need to modify what we pass to the PDC */
6671 + int tx_size = (at91_spi_read(AT91_SPI_CSR(current_device)) & AT91_SPI_BITS_16) ? 2 : 1;
6672 +
6673 + device->txnext = dma_map_single(NULL, list->tx[i], list->txlen[i], DMA_TO_DEVICE);
6674 + device->rxnext = dma_map_single(NULL, list->rx[i], list->rxlen[i], DMA_FROM_DEVICE);
6675 + at91_spi_write(ATMEL_PDC_TNPR, device->txnext);
6676 + at91_spi_write(ATMEL_PDC_RNPR, device->rxnext);
6677 + at91_spi_write(ATMEL_PDC_TNCR, list->txlen[i] / tx_size);
6678 + at91_spi_write(ATMEL_PDC_RNCR, list->rxlen[i] / tx_size);
6679 + }
6680 + return IRQ_HANDLED;
6681 +}
6682 +
6683 +/* ......................................................................... */
6684 +
6685 +/*
6686 + * Initialize the SPI controller
6687 + */
6688 +static int __init at91spi_probe(struct platform_device *pdev)
6689 +{
6690 + int i;
6691 + unsigned long scbr;
6692 + struct resource *res;
6693 +
6694 + init_MUTEX(&spi_lock);
6695 +
6696 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
6697 + if (!res)
6698 + return -ENXIO;
6699 +
6700 + if (!request_mem_region(res->start, res->end - res->start + 1, "at91_spi"))
6701 + return -EBUSY;
6702 +
6703 + spi_base = ioremap(res->start, res->end - res->start + 1);
6704 + if (!spi_base) {
6705 + release_mem_region(res->start, res->end - res->start + 1);
6706 + return -ENOMEM;
6707 + }
6708 +
6709 + spi_clk = clk_get(NULL, "spi_clk");
6710 + if (IS_ERR(spi_clk)) {
6711 + printk(KERN_ERR "at91_spi: no clock defined\n");
6712 + iounmap(spi_base);
6713 + release_mem_region(res->start, res->end - res->start + 1);
6714 + return -ENODEV;
6715 + }
6716 +
6717 + at91_spi_write(AT91_SPI_CR, AT91_SPI_SWRST); /* software reset of SPI controller */
6718 +
6719 + /*
6720 + * Calculate the correct SPI baud-rate divisor.
6721 + */
6722 + scbr = clk_get_rate(spi_clk) / (2 * DEFAULT_SPI_CLK);
6723 + scbr = scbr + 1; /* round up */
6724 +
6725 + printk(KERN_INFO "at91_spi: Baud rate set to %ld\n", clk_get_rate(spi_clk) / (2 * scbr));
6726 +
6727 + /* Set Chip Select registers to good defaults */
6728 + for (i = 0; i < 4; i++) {
6729 + at91_spi_write(AT91_SPI_CSR(i), AT91_SPI_CPOL | AT91_SPI_BITS_8 | (16 << 16) | (scbr << 8));
6730 + }
6731 +
6732 + at91_spi_write(ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
6733 +
6734 + memset(&spi_dev, 0, sizeof(spi_dev));
6735 + spi_dev[0].pcs = 0xE;
6736 + spi_dev[1].pcs = 0xD;
6737 + spi_dev[2].pcs = 0xB;
6738 + spi_dev[3].pcs = 0x7;
6739 +
6740 + if (request_irq(AT91RM9200_ID_SPI, at91spi_interrupt, 0, "spi", NULL)) {
6741 + clk_put(spi_clk);
6742 + iounmap(spi_base);
6743 + release_mem_region(res->start, res->end - res->start + 1);
6744 + return -EBUSY;
6745 + }
6746 +
6747 + at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIEN); /* Enable SPI */
6748 +
6749 + return 0;
6750 +}
6751 +
6752 +static int __devexit at91spi_remove(struct platform_device *pdev)
6753 +{
6754 + struct resource *res;
6755 +
6756 + at91_spi_write(AT91_SPI_CR, AT91_SPI_SPIDIS); /* Disable SPI */
6757 + clk_put(spi_clk);
6758 +
6759 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
6760 + iounmap(spi_base);
6761 + release_mem_region(res->start, res->end - res->start + 1);
6762 +
6763 + free_irq(AT91RM9200_ID_SPI, 0);
6764 + return 0;
6765 +}
6766 +
6767 +static struct platform_driver at91spi_driver = {
6768 + .probe = at91spi_probe,
6769 + .remove = __devexit_p(at91spi_remove),
6770 + .driver = {
6771 + .name = "at91_spi",
6772 + .owner = THIS_MODULE,
6773 + },
6774 +};
6775 +
6776 +static int __init at91spi_init(void)
6777 +{
6778 + return platform_driver_register(&at91spi_driver);
6779 +}
6780 +
6781 +static void __exit at91spi_exit(void)
6782 +{
6783 + platform_driver_unregister(&at91spi_driver);
6784 +}
6785 +
6786 +EXPORT_SYMBOL(spi_access_bus);
6787 +EXPORT_SYMBOL(spi_release_bus);
6788 +EXPORT_SYMBOL(spi_transfer);
6789 +
6790 +module_init(at91spi_init);
6791 +module_exit(at91spi_exit);
6792 +
6793 +MODULE_LICENSE("GPL")
6794 +MODULE_AUTHOR("Andrew Victor")
6795 +MODULE_DESCRIPTION("SPI driver for Atmel AT91RM9200")
6796 +MODULE_ALIAS("platform:at91_spi");
6797 diff -urN -x CVS linux-2.6.25/drivers/char/at91_spidev.c linux-2.6/drivers/char/at91_spidev.c
6798 --- linux-2.6.25/drivers/char/at91_spidev.c 1970-01-01 02:00:00.000000000 +0200
6799 +++ linux-2.6/drivers/char/at91_spidev.c 2007-12-31 15:18:43.000000000 +0200
6800 @@ -0,0 +1,233 @@
6801 +/*
6802 + * User-space interface to the SPI bus on Atmel AT91RM9200
6803 + *
6804 + * Copyright (C) 2003 SAN People (Pty) Ltd
6805 + *
6806 + * Based on SPI driver by Rick Bronson
6807 + *
6808 + * This program is free software; you can redistribute it and/or
6809 + * modify it under the terms of the GNU General Public License
6810 + * as published by the Free Software Foundation; either version
6811 + * 2 of the License, or (at your option) any later version.
6812 + */
6813 +
6814 +#include <linux/module.h>
6815 +#include <linux/init.h>
6816 +#include <linux/slab.h>
6817 +#include <linux/highmem.h>
6818 +#include <linux/pagemap.h>
6819 +#include <asm/arch/spi.h>
6820 +
6821 +#ifdef CONFIG_DEVFS_FS
6822 +#include <linux/devfs_fs_kernel.h>
6823 +#endif
6824 +
6825 +
6826 +#undef DEBUG_SPIDEV
6827 +
6828 +/* ......................................................................... */
6829 +
6830 +/*
6831 + * Read or Write to SPI bus.
6832 + */
6833 +static ssize_t spidev_rd_wr(struct file *file, char *buf, size_t count, loff_t *offset)
6834 +{
6835 + unsigned int spi_device = (unsigned int) file->private_data;
6836 +
6837 + struct mm_struct * mm;
6838 + struct page ** maplist;
6839 + struct spi_transfer_list* list;
6840 + int pgcount;
6841 +
6842 + unsigned int ofs, pagelen;
6843 + int res, i, err;
6844 +
6845 + if (!count) {
6846 + return 0;
6847 + }
6848 +
6849 + list = kmalloc(sizeof(struct spi_transfer_list), GFP_KERNEL);
6850 + if (!list) {
6851 + return -ENOMEM;
6852 + }
6853 +
6854 + mm = current->mm;
6855 +
6856 + pgcount = ((unsigned long)buf+count+PAGE_SIZE-1)/PAGE_SIZE - (unsigned long)buf/PAGE_SIZE;
6857 +
6858 + if (pgcount >= MAX_SPI_TRANSFERS) {
6859 + kfree(list);
6860 + return -EFBIG;
6861 + }
6862 +
6863 + maplist = kmalloc (pgcount * sizeof (struct page *), GFP_KERNEL);
6864 +
6865 + if (!maplist) {
6866 + kfree(list);
6867 + return -ENOMEM;
6868 + }
6869 + flush_cache_all();
6870 + down_read(&mm->mmap_sem);
6871 + err= get_user_pages(current, mm, (unsigned long)buf, pgcount, 1, 0, maplist, NULL);
6872 + up_read(&mm->mmap_sem);
6873 +
6874 + if (err < 0) {
6875 + kfree(list);
6876 + kfree(maplist);
6877 + return err;
6878 + }
6879 + pgcount = err;
6880 +
6881 +#ifdef DEBUG_SPIDEV
6882 + printk("spidev_rd_rw: %i %i\n", count, pgcount);
6883 +#endif
6884 +
6885 + /* Set default return value = transfer length */
6886 + res = count;
6887 +
6888 + /*
6889 + * At this point, the virtual area buf[0] .. buf[count-1] will have
6890 + * corresponding pages mapped in the physical memory and locked until
6891 + * we unmap the kiobuf. The pages cannot be swapped out or moved
6892 + * around.
6893 + */
6894 + ofs = (unsigned long) buf & (PAGE_SIZE -1);
6895 + pagelen = PAGE_SIZE - ofs;
6896 + if (count < pagelen)
6897 + pagelen = count;
6898 +
6899 + for (i = 0; i < pgcount; i++) {
6900 + flush_dcache_page(maplist[i]);
6901 +
6902 + list->tx[i] = list->rx[i] = page_address(maplist[i]) + ofs;
6903 + list->txlen[i] = list->rxlen[i] = pagelen;
6904 +
6905 +#ifdef DEBUG_SPIDEV
6906 + printk(" %i: %x (%i)\n", i, list->tx[i], list->txlen[i]);
6907 +#endif
6908 +
6909 + ofs = 0; /* all subsequent transfers start at beginning of a page */
6910 + count = count - pagelen;
6911 + pagelen = (count < PAGE_SIZE) ? count : PAGE_SIZE;
6912 + }
6913 + list->nr_transfers = pgcount;
6914 +
6915 + /* Perform transfer on SPI bus */
6916 + spi_access_bus(spi_device);
6917 + spi_transfer(list);
6918 + spi_release_bus(spi_device);
6919 +
6920 + while (pgcount--) {
6921 + page_cache_release (maplist[pgcount]);
6922 + }
6923 + flush_cache_all();
6924 +
6925 + kfree(maplist);
6926 + kfree(list);
6927 +
6928 + return res;
6929 +}
6930 +
6931 +static int spidev_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
6932 +{
6933 + int spi_device = MINOR(inode->i_rdev);
6934 +
6935 + if (spi_device >= NR_SPI_DEVICES)
6936 + return -ENODEV;
6937 +
6938 + // TODO: This interface can be used to configure the SPI bus.
6939 + // Configurable options could include: Speed, Clock Polarity, Clock Phase
6940 +
6941 + switch(cmd) {
6942 + default:
6943 + return -ENOIOCTLCMD;
6944 + }
6945 +}
6946 +
6947 +/*
6948 + * Open the SPI device
6949 + */
6950 +static int spidev_open(struct inode *inode, struct file *file)
6951 +{
6952 + unsigned int spi_device = MINOR(inode->i_rdev);
6953 +
6954 + if (spi_device >= NR_SPI_DEVICES)
6955 + return -ENODEV;
6956 +
6957 + /*
6958 + * 'private_data' is actually a pointer, but we overload it with the
6959 + * value we want to store.
6960 + */
6961 + file->private_data = (void *)spi_device;
6962 +
6963 + return 0;
6964 +}
6965 +
6966 +/*
6967 + * Close the SPI device
6968 + */
6969 +static int spidev_close(struct inode *inode, struct file *file)
6970 +{
6971 + return 0;
6972 +}
6973 +
6974 +/* ......................................................................... */
6975 +
6976 +static struct file_operations spidev_fops = {
6977 + .owner = THIS_MODULE,
6978 + .llseek = no_llseek,
6979 + .read = spidev_rd_wr,
6980 + .write = (int (*) (struct file *file, const char *buf, size_t count, loff_t *offset))spidev_rd_wr,
6981 + .ioctl = spidev_ioctl,
6982 + .open = spidev_open,
6983 + .release = spidev_close,
6984 +};
6985 +
6986 +/*
6987 + * Install the SPI /dev interface driver
6988 + */
6989 +static int __init at91_spidev_init(void)
6990 +{
6991 +#ifdef CONFIG_DEVFS_FS
6992 + int i;
6993 +#endif
6994 +
6995 + if (register_chrdev(SPI_MAJOR, "spi", &spidev_fops)) {
6996 + printk(KERN_ERR "at91_spidev: Unable to get major %d for SPI bus\n", SPI_MAJOR);
6997 + return -EIO;
6998 + }
6999 +
7000 +#ifdef CONFIG_DEVFS_FS
7001 + devfs_mk_dir("spi");
7002 + for (i = 0; i < NR_SPI_DEVICES; i++) {
7003 + devfs_mk_cdev(MKDEV(SPI_MAJOR, i), S_IFCHR | S_IRUSR | S_IWUSR, "spi/%d",i);
7004 + }
7005 +#endif
7006 + printk(KERN_INFO "AT91 SPI driver loaded\n");
7007 +
7008 + return 0;
7009 +}
7010 +
7011 +/*
7012 + * Remove the SPI /dev interface driver
7013 + */
7014 +static void __exit at91_spidev_exit(void)
7015 +{
7016 +#ifdef CONFIG_DEVFS_FS
7017 + int i;
7018 + for (i = 0; i < NR_SPI_DEVICES; i++) {
7019 + devfs_remove("spi/%d", i);
7020 + }
7021 +
7022 + devfs_remove("spi");
7023 +#endif
7024 +
7025 + unregister_chrdev(SPI_MAJOR, "spi");
7026 +}
7027 +
7028 +module_init(at91_spidev_init);
7029 +module_exit(at91_spidev_exit);
7030 +
7031 +MODULE_LICENSE("GPL")
7032 +MODULE_AUTHOR("Andrew Victor")
7033 +MODULE_DESCRIPTION("SPI /dev interface for Atmel AT91RM9200")
7034 diff -urN -x CVS linux-2.6.25/drivers/i2c/busses/Kconfig linux-2.6/drivers/i2c/busses/Kconfig
7035 --- linux-2.6.25/drivers/i2c/busses/Kconfig 2008-05-03 00:15:47.000000000 +0200
7036 +++ linux-2.6/drivers/i2c/busses/Kconfig 2008-04-02 22:11:28.000000000 +0200
7037 @@ -88,6 +88,14 @@
7038 to support combined I2C messages. Use the i2c-gpio driver
7039 unless your system can cope with those limitations.
7040
7041 +config I2C_AT91_CLOCKRATE
7042 + prompt "Atmel AT91 I2C/TWI clock-rate"
7043 + depends on I2C_AT91
7044 + int
7045 + default 100000
7046 + help
7047 + Set the AT91 I2C/TWI clock-rate.
7048 +
7049 config I2C_AU1550
7050 tristate "Au1550/Au1200 SMBus interface"
7051 depends on SOC_AU1550 || SOC_AU1200
7052 @@ -626,6 +634,14 @@
7053 This driver can also be built as a module. If so, the module
7054 will be called i2c-voodoo3.
7055
7056 +config I2C_PCA
7057 + tristate "PCA9564"
7058 + depends on I2C
7059 + select I2C_ALGOPCA
7060 + help
7061 + This driver support the Philips PCA 9564 Parallel bus to I2C
7062 + bus controller.
7063 +
7064 config I2C_PCA_ISA
7065 tristate "PCA9564 on an ISA bus"
7066 depends on ISA
7067 diff -urN -x CVS linux-2.6.25/drivers/i2c/busses/Makefile linux-2.6/drivers/i2c/busses/Makefile
7068 --- linux-2.6.25/drivers/i2c/busses/Makefile 2008-05-03 00:15:47.000000000 +0200
7069 +++ linux-2.6/drivers/i2c/busses/Makefile 2008-03-09 15:14:46.000000000 +0200
7070 @@ -29,6 +29,7 @@
7071 obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o
7072 obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o
7073 obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o
7074 +obj-$(CONFIG_I2C_PCA) += i2c-pca.o
7075 obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o
7076 obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o
7077 obj-$(CONFIG_I2C_PMCMSP) += i2c-pmcmsp.o
7078 diff -urN -x CVS linux-2.6.25/drivers/i2c/busses/i2c-at91.c linux-2.6/drivers/i2c/busses/i2c-at91.c
7079 --- linux-2.6.25/drivers/i2c/busses/i2c-at91.c 2008-05-03 00:15:35.000000000 +0200
7080 +++ linux-2.6/drivers/i2c/busses/i2c-at91.c 2008-01-16 13:15:34.000000000 +0200
7081 @@ -31,8 +31,11 @@
7082 #include <asm/arch/board.h>
7083 #include <asm/arch/cpu.h>
7084
7085 -#define TWI_CLOCK 100000 /* Hz. max 400 Kbits/sec */
7086
7087 +/* Clockrate is configurable - max 400 Kbits/sec */
7088 +static unsigned int clockrate = CONFIG_I2C_AT91_CLOCKRATE;
7089 +module_param(clockrate, uint, 0);
7090 +MODULE_PARM_DESC(clockrate, "The TWI clockrate");
7091
7092 static struct clk *twi_clk;
7093 static void __iomem *twi_base;
7094 @@ -53,7 +56,7 @@
7095 at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN); /* Set Master mode */
7096
7097 /* Calcuate clock dividers */
7098 - cdiv = (clk_get_rate(twi_clk) / (2 * TWI_CLOCK)) - 3;
7099 + cdiv = (clk_get_rate(twi_clk) / (2 * clockrate)) - 3;
7100 cdiv = cdiv + 1; /* round up */
7101 ckdiv = 0;
7102 while (cdiv > 255) {
7103 @@ -61,11 +64,12 @@
7104 cdiv = cdiv >> 1;
7105 }
7106
7107 - if (cpu_is_at91rm9200()) { /* AT91RM9200 Errata #22 */
7108 - if (ckdiv > 5) {
7109 - printk(KERN_ERR "AT91 I2C: Invalid TWI_CLOCK value!\n");
7110 - ckdiv = 5;
7111 - }
7112 + if (cpu_is_at91rm9200() && (ckdiv > 5)) { /* AT91RM9200 Errata #22 */
7113 + printk(KERN_ERR "AT91 I2C: Invalid TWI clockrate!\n");
7114 + ckdiv = 5;
7115 + } else if (ckdiv > 7) {
7116 + printk(KERN_ERR "AT91 I2C: Invalid TWI clockrate!\n");
7117 + ckdiv = 7;
7118 }
7119
7120 at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv);
7121 diff -urN -x CVS linux-2.6.25/drivers/i2c/busses/i2c-pca.c linux-2.6/drivers/i2c/busses/i2c-pca.c
7122 --- linux-2.6.25/drivers/i2c/busses/i2c-pca.c 1970-01-01 02:00:00.000000000 +0200
7123 +++ linux-2.6/drivers/i2c/busses/i2c-pca.c 2007-12-31 15:18:43.000000000 +0200
7124 @@ -0,0 +1,213 @@
7125 +/*
7126 + * Platform driver for PCA9564 I2C bus controller.
7127 + *
7128 + * (C) 2006 Andrew Victor
7129 + *
7130 + * Based on i2c-pca-isa.c driver for PCA9564 on ISA boards
7131 + * Copyright (C) 2004 Arcom Control Systems
7132 + *
7133 + * This program is free software; you can redistribute it and/or modify
7134 + * it under the terms of the GNU General Public License as published by
7135 + * the Free Software Foundation; either version 2 of the License, or
7136 + * (at your option) any later version.
7137 + *
7138 + * This program is distributed in the hope that it will be useful,
7139 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
7140 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
7141 + * GNU General Public License for more details.
7142 + *
7143 + * You should have received a copy of the GNU General Public License
7144 + * along with this program; if not, write to the Free Software
7145 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
7146 + */
7147 +
7148 +#include <linux/kernel.h>
7149 +#include <linux/module.h>
7150 +#include <linux/moduleparam.h>
7151 +#include <linux/delay.h>
7152 +#include <linux/init.h>
7153 +#include <linux/interrupt.h>
7154 +#include <linux/wait.h>
7155 +#include <linux/platform_device.h>
7156 +
7157 +#include <linux/i2c.h>
7158 +#include <linux/i2c-algo-pca.h>
7159 +
7160 +#include <asm/io.h>
7161 +
7162 +#include "../algos/i2c-algo-pca.h"
7163 +
7164 +#define PCA_OWN_ADDRESS 0x55 /* our address for slave mode */
7165 +#define PCA_CLOCK I2C_PCA_CON_59kHz
7166 +
7167 +//#define REG_SHIFT 2
7168 +#define REG_SHIFT 0
7169 +
7170 +//#define DEBUG_IO
7171 +
7172 +#define PCA_IO_SIZE 4
7173 +
7174 +static void __iomem *base_addr;
7175 +static int irq;
7176 +static wait_queue_head_t pca_wait;
7177 +
7178 +static int pca_getown(struct i2c_algo_pca_data *adap)
7179 +{
7180 + return PCA_OWN_ADDRESS;
7181 +}
7182 +
7183 +static int pca_getclock(struct i2c_algo_pca_data *adap)
7184 +{
7185 + return PCA_CLOCK;
7186 +}
7187 +
7188 +static void pca_writebyte(struct i2c_algo_pca_data *adap, int reg, int val)
7189 +{
7190 +#ifdef DEBUG_IO
7191 + static char *names[] = { "T/O", "DAT", "ADR", "CON" };
7192 + printk("*** write %s at %#lx <= %#04x\n", names[reg], (unsigned long) base_addr+reg, val);
7193 +#endif
7194 + udelay(1);
7195 + outb(val, base_addr + (reg << REG_SHIFT));
7196 +}
7197 +
7198 +static int pca_readbyte(struct i2c_algo_pca_data *adap, int reg)
7199 +{
7200 + int res;
7201 +
7202 + udelay(1);
7203 + res = inb(base_addr + (reg << REG_SHIFT));
7204 +#ifdef DEBUG_IO
7205 + {
7206 + static char *names[] = { "STA", "DAT", "ADR", "CON" };
7207 + printk("*** read %s => %#04x\n", names[reg], res);
7208 + }
7209 +#endif
7210 + return res;
7211 +}
7212 +
7213 +static int pca_waitforinterrupt(struct i2c_algo_pca_data *adap)
7214 +{
7215 + int ret = 0;
7216 +
7217 + if (irq > -1) {
7218 + ret = wait_event_interruptible(pca_wait,
7219 + pca_readbyte(adap, I2C_PCA_CON) & I2C_PCA_CON_SI);
7220 + } else {
7221 + while ((pca_readbyte(adap, I2C_PCA_CON) & I2C_PCA_CON_SI) == 0)
7222 + udelay(100);
7223 + }
7224 + return ret;
7225 +}
7226 +
7227 +static irqreturn_t pca_handler(int this_irq, void *dev_id)
7228 +{
7229 + wake_up_interruptible(&pca_wait);
7230 + return IRQ_HANDLED;
7231 +}
7232 +
7233 +static struct i2c_algo_pca_data pca_i2c_data = {
7234 + .get_own = pca_getown,
7235 + .get_clock = pca_getclock,
7236 + .write_byte = pca_writebyte,
7237 + .read_byte = pca_readbyte,
7238 + .wait_for_interrupt = pca_waitforinterrupt,
7239 +};
7240 +
7241 +static struct i2c_adapter pca_i2c_ops = {
7242 + .owner = THIS_MODULE,
7243 + .id = I2C_HW_A_PLAT,
7244 + .algo_data = &pca_i2c_data,
7245 + .name = "PCA9564",
7246 + .class = I2C_CLASS_HWMON,
7247 +};
7248 +
7249 +static int __devinit pca_i2c_probe(struct platform_device *pdev)
7250 +{
7251 + struct resource *res;
7252 +
7253 + init_waitqueue_head(&pca_wait);
7254 +
7255 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
7256 + if (!res)
7257 + return -ENODEV;
7258 +
7259 + if (!request_mem_region(res->start, PCA_IO_SIZE, "PCA9564"))
7260 + return -ENXIO;
7261 +
7262 + base_addr = ioremap(res->start, PCA_IO_SIZE);
7263 + if (base_addr == NULL)
7264 + goto out_region;
7265 +
7266 + irq = platform_get_irq(pdev, 0);
7267 + if (irq > -1) {
7268 + if (request_irq(irq, pca_handler, 0, "pca9564", NULL) < 0) {
7269 + printk(KERN_ERR "i2c-pca: Request irq%d failed\n", irq);
7270 + goto out_remap;
7271 + }
7272 + }
7273 +
7274 + /* set up the driverfs linkage to our parent device */
7275 + pca_i2c_ops.dev.parent = &pdev->dev;
7276 +
7277 + if (i2c_pca_add_bus(&pca_i2c_ops) < 0) {
7278 + printk(KERN_ERR "i2c-pca: Failed to add i2c bus\n");
7279 + goto out_irq;
7280 + }
7281 +
7282 + return 0;
7283 +
7284 + out_irq:
7285 + if (irq > -1)
7286 + free_irq(irq, &pca_i2c_ops);
7287 +
7288 + out_remap:
7289 + iounmap(base_addr);
7290 +
7291 + out_region:
7292 + release_mem_region(res->start, PCA_IO_SIZE);
7293 + return -ENODEV;
7294 +}
7295 +
7296 +static int __devexit pca_i2c_remove(struct platform_device *pdev)
7297 +{
7298 + struct resource *res;
7299 +
7300 + i2c_del_adapter(&pca_i2c_ops);
7301 +
7302 + if (irq > 0)
7303 + free_irq(irq, NULL);
7304 +
7305 + iounmap(base_addr);
7306 +
7307 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
7308 + release_mem_region(res->start, PCA_IO_SIZE);
7309 +
7310 + return 0;
7311 +}
7312 +
7313 +static struct platform_driver pca_i2c_driver = {
7314 + .probe = pca_i2c_probe,
7315 + .remove = __devexit_p(pca_i2c_remove),
7316 + .driver = {
7317 + .name = "pca9564",
7318 + .owner = THIS_MODULE,
7319 + },
7320 +};
7321 +
7322 +static int __init pca_i2c_init(void)
7323 +{
7324 + return platform_driver_register(&pca_i2c_driver);
7325 +}
7326 +
7327 +static void __exit pca_i2c_exit(void)
7328 +{
7329 + platform_driver_unregister(&pca_i2c_driver);
7330 +}
7331 +
7332 +module_init(pca_i2c_init);
7333 +module_exit(pca_i2c_exit);
7334 +
7335 +MODULE_AUTHOR("Andrew Victor");
7336 +MODULE_DESCRIPTION("PCA9564 platform driver");
7337 +MODULE_LICENSE("GPL");
7338 diff -urN -x CVS linux-2.6.25/drivers/mmc/host/at91_mci.c linux-2.6/drivers/mmc/host/at91_mci.c
7339 --- linux-2.6.25/drivers/mmc/host/at91_mci.c 2008-05-03 00:15:48.000000000 +0200
7340 +++ linux-2.6/drivers/mmc/host/at91_mci.c 2008-04-18 17:32:40.000000000 +0200
7341 @@ -659,13 +659,14 @@
7342 /* maybe switch power to the card */
7343 if (host->board->vcc_pin) {
7344 switch (ios->power_mode) {
7345 - case MMC_POWER_OFF:
7346 - gpio_set_value(host->board->vcc_pin, 0);
7347 - break;
7348 - case MMC_POWER_UP:
7349 - case MMC_POWER_ON:
7350 - gpio_set_value(host->board->vcc_pin, 1);
7351 - break;
7352 + case MMC_POWER_OFF:
7353 + gpio_set_value(host->board->vcc_pin, 0);
7354 + break;
7355 + case MMC_POWER_UP:
7356 + gpio_set_value(host->board->vcc_pin, 1);
7357 + break;
7358 + default:
7359 + break;
7360 }
7361 }
7362 }
7363 diff -urN -x CVS linux-2.6.25/drivers/mtd/devices/Kconfig linux-2.6/drivers/mtd/devices/Kconfig
7364 --- linux-2.6.25/drivers/mtd/devices/Kconfig 2008-05-03 00:15:36.000000000 +0200
7365 +++ linux-2.6/drivers/mtd/devices/Kconfig 2007-12-31 10:44:25.000000000 +0200
7366 @@ -270,5 +270,17 @@
7367 LinuxBIOS or if you need to recover a DiskOnChip Millennium on which
7368 you have managed to wipe the first block.
7369
7370 -endmenu
7371 +config MTD_AT91_DATAFLASH
7372 + tristate "AT91RM9200 DataFlash AT45DBxxx (legacy driver)"
7373 + depends on MTD && ARCH_AT91RM9200 && AT91_SPI
7374 + help
7375 + This enables access to the DataFlash (AT45DBxxx) on the AT91RM9200.
7376 + If you have such a board, say 'Y'.
7377 +
7378 +config DATAFLASH_ALWAYS_ADD_DEVICE
7379 + bool "Register whole DataFlash device"
7380 + depends on MTD_AT91_DATAFLASH
7381 + help
7382 + Always add the whole DataFlash device when using MTD partitions.
7383
7384 +endmenu
7385 diff -urN -x CVS linux-2.6.25/drivers/mtd/devices/Makefile linux-2.6/drivers/mtd/devices/Makefile
7386 --- linux-2.6.25/drivers/mtd/devices/Makefile 2008-05-03 00:15:36.000000000 +0200
7387 +++ linux-2.6/drivers/mtd/devices/Makefile 2007-12-31 10:48:27.000000000 +0200
7388 @@ -17,3 +17,4 @@
7389 obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
7390 obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
7391 obj-$(CONFIG_MTD_M25P80) += m25p80.o
7392 +obj-$(CONFIG_MTD_AT91_DATAFLASH)+= at91_dataflash.o
7393 diff -urN -x CVS linux-2.6.25/drivers/mtd/devices/at91_dataflash.c linux-2.6/drivers/mtd/devices/at91_dataflash.c
7394 --- linux-2.6.25/drivers/mtd/devices/at91_dataflash.c 1970-01-01 02:00:00.000000000 +0200
7395 +++ linux-2.6/drivers/mtd/devices/at91_dataflash.c 2007-12-31 15:18:43.000000000 +0200
7396 @@ -0,0 +1,673 @@
7397 +/*
7398 + * Atmel DataFlash driver for Atmel AT91RM9200 (Thunder)
7399 + *
7400 + * Copyright (C) SAN People (Pty) Ltd
7401 + *
7402 + * This program is free software; you can redistribute it and/or
7403 + * modify it under the terms of the GNU General Public License
7404 + * as published by the Free Software Foundation; either version
7405 + * 2 of the License, or (at your option) any later version.
7406 +*/
7407 +
7408 +#include <linux/module.h>
7409 +#include <linux/init.h>
7410 +#include <linux/slab.h>
7411 +#include <linux/pci.h>
7412 +#include <linux/mtd/mtd.h>
7413 +#include <linux/mtd/partitions.h>
7414 +
7415 +#include <asm/mach-types.h>
7416 +
7417 +#include <asm/arch/spi.h>
7418 +
7419 +
7420 +#undef DEBUG_DATAFLASH
7421 +
7422 +#define DATAFLASH_MAX_DEVICES 4 /* max number of dataflash devices */
7423 +
7424 +#define OP_READ_CONTINUOUS 0xE8
7425 +#define OP_READ_PAGE 0xD2
7426 +#define OP_READ_BUFFER1 0xD4
7427 +#define OP_READ_BUFFER2 0xD6
7428 +#define OP_READ_STATUS 0xD7
7429 +
7430 +#define OP_ERASE_PAGE 0x81
7431 +#define OP_ERASE_BLOCK 0x50
7432 +
7433 +#define OP_TRANSFER_BUF1 0x53
7434 +#define OP_TRANSFER_BUF2 0x55
7435 +#define OP_COMPARE_BUF1 0x60
7436 +#define OP_COMPARE_BUF2 0x61
7437 +
7438 +#define OP_PROGRAM_VIA_BUF1 0x82
7439 +#define OP_PROGRAM_VIA_BUF2 0x85
7440 +
7441 +struct dataflash_local
7442 +{
7443 + int spi; /* SPI chip-select number */
7444 +
7445 + unsigned int page_size; /* number of bytes per page */
7446 + unsigned short page_offset; /* page offset in flash address */
7447 +};
7448 +
7449 +
7450 +/* Detected DataFlash devices */
7451 +static struct mtd_info* mtd_devices[DATAFLASH_MAX_DEVICES];
7452 +static int nr_devices = 0;
7453 +
7454 +/* ......................................................................... */
7455 +
7456 +#ifdef CONFIG_MTD_PARTITIONS
7457 +
7458 +static struct mtd_partition static_partitions_2M[] =
7459 +{
7460 + {
7461 + .name = "bootloader",
7462 + .offset = 0,
7463 + .size = 1 * 32 * 8 * 528, /* 1st sector = 32 blocks * 8 pages * 528 bytes */
7464 + .mask_flags = MTD_WRITEABLE, /* read-only */
7465 + },
7466 + {
7467 + .name = "kernel",
7468 + .offset = MTDPART_OFS_NXTBLK,
7469 + .size = 6 * 32 * 8 * 528, /* 6 sectors */
7470 + },
7471 + {
7472 + .name = "filesystem",
7473 + .offset = MTDPART_OFS_NXTBLK,
7474 + .size = MTDPART_SIZ_FULL, /* rest = 9 sectors */
7475 + }
7476 +};
7477 +
7478 +static struct mtd_partition static_partitions_4M[] =
7479 +{
7480 + {
7481 + .name = "bootloader",
7482 + .offset = 0,
7483 + .size = 1 * 64 * 8 * 528, /* 1st sector = 64 blocks * 8 pages * 528 bytes */
7484 + .mask_flags = MTD_WRITEABLE, /* read-only */
7485 + },
7486 + {
7487 + .name = "kernel",
7488 + .offset = MTDPART_OFS_NXTBLK,
7489 + .size = 4 * 64 * 8 * 528, /* 4 sectors */
7490 + },
7491 + {
7492 + .name = "filesystem",
7493 + .offset = MTDPART_OFS_NXTBLK,
7494 + .size = MTDPART_SIZ_FULL, /* rest = 11 sectors */
7495 + }
7496 +};
7497 +
7498 +#if defined(CONFIG_MACH_KAFA)
7499 +static struct mtd_partition static_partitions_8M[] =
7500 +{
7501 + {
7502 + name: "romboot",
7503 + offset: 0,
7504 + size: 16 * 1056, /* 160 Kb */
7505 + mask_flags: MTD_WRITEABLE, /* read-only */
7506 + },
7507 + {
7508 + name: "uboot",
7509 + offset: MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
7510 + size: 128 * 1056, /* 1 MB */
7511 + },
7512 + {
7513 + name: "kernel",
7514 + offset: MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
7515 + size: 1024 * 1056, /* 1 MB */
7516 + },
7517 + {
7518 + name: "filesystem",
7519 + offset: MTDPART_OFS_APPEND, /* Sperry, NXTBLK is broken */
7520 + size: MTDPART_SIZ_FULL,
7521 + }
7522 +};
7523 +
7524 +#elif defined(CONFIG_MACH_MULTMDP)
7525 +
7526 +static struct mtd_partition static_partitions_8M[] =
7527 +{
7528 + {
7529 + .name = "bootloader",
7530 + .offset = 0,
7531 + .size = 12 * 1056, /* 1st sector = 32 blocks * 8 pages * 1056 bytes */
7532 + .mask_flags = MTD_WRITEABLE, /* read-only */
7533 + },
7534 + {
7535 + .name = "configuration",
7536 + .offset = MTDPART_OFS_NXTBLK,
7537 + .size = 20 * 1056,
7538 + },
7539 + {
7540 + .name = "kernel",
7541 + .offset = MTDPART_OFS_NXTBLK,
7542 + .size = 1520 * 1056,
7543 + },
7544 + {
7545 + .name = "filesystem",
7546 + .offset = MTDPART_OFS_NXTBLK,
7547 + .size = MTDPART_SIZ_FULL,
7548 + }
7549 +};
7550 +
7551 +#else
7552 +
7553 +static struct mtd_partition static_partitions_8M[] =
7554 +{
7555 + {
7556 + .name = "bootloader",
7557 + .offset = 0,
7558 + .size = 1 * 32 * 8 * 1056, /* 1st sector = 32 blocks * 8 pages * 1056 bytes */
7559 + .mask_flags = MTD_WRITEABLE, /* read-only */
7560 + },
7561 + {
7562 + .name = "kernel",
7563 + .offset = MTDPART_OFS_NXTBLK,
7564 + .size = 5 * 32 * 8 * 1056, /* 5 sectors */
7565 + },
7566 + {
7567 + .name = "filesystem",
7568 + .offset = MTDPART_OFS_NXTBLK,
7569 + .size = MTDPART_SIZ_FULL, /* rest = 26 sectors */
7570 + }
7571 +};
7572 +#endif
7573 +
7574 +static const char *part_probes[] = { "cmdlinepart", NULL, };
7575 +
7576 +#endif
7577 +
7578 +/* ......................................................................... */
7579 +
7580 +/* Allocate a single SPI transfer descriptor. We're assuming that if multiple
7581 + SPI transfers occur at the same time, spi_access_bus() will serialize them.
7582 + If this is not valid, then either (i) each dataflash 'priv' structure
7583 + needs it's own transfer descriptor, (ii) we lock this one, or (iii) use
7584 + another mechanism. */
7585 +static struct spi_transfer_list* spi_transfer_desc;
7586 +
7587 +/*
7588 + * Perform a SPI transfer to access the DataFlash device.
7589 + */
7590 +static int do_spi_transfer(int nr, char* tx, int tx_len, char* rx, int rx_len,
7591 + char* txnext, int txnext_len, char* rxnext, int rxnext_len)
7592 +{
7593 + struct spi_transfer_list* list = spi_transfer_desc;
7594 +
7595 + list->tx[0] = tx; list->txlen[0] = tx_len;
7596 + list->rx[0] = rx; list->rxlen[0] = rx_len;
7597 +
7598 + list->tx[1] = txnext; list->txlen[1] = txnext_len;
7599 + list->rx[1] = rxnext; list->rxlen[1] = rxnext_len;
7600 +
7601 + list->nr_transfers = nr;
7602 +
7603 + return spi_transfer(list);
7604 +}
7605 +
7606 +/* ......................................................................... */
7607 +
7608 +/*
7609 + * Poll the DataFlash device until it is READY.
7610 + */
7611 +static void at91_dataflash_waitready(void)
7612 +{
7613 + char* command = kmalloc(2, GFP_KERNEL);
7614 +
7615 + if (!command)
7616 + return;
7617 +
7618 + do {
7619 + command[0] = OP_READ_STATUS;
7620 + command[1] = 0;
7621 +
7622 + do_spi_transfer(1, command, 2, command, 2, NULL, 0, NULL, 0);
7623 + } while ((command[1] & 0x80) == 0);
7624 +
7625 + kfree(command);
7626 +}
7627 +
7628 +/*
7629 + * Return the status of the DataFlash device.
7630 + */
7631 +static unsigned short at91_dataflash_status(void)
7632 +{
7633 + unsigned short status;
7634 + char* command = kmalloc(2, GFP_KERNEL);
7635 +
7636 + if (!command)
7637 + return 0;
7638 +
7639 + command[0] = OP_READ_STATUS;
7640 + command[1] = 0;
7641 +
7642 + do_spi_transfer(1, command, 2, command, 2, NULL, 0, NULL, 0);
7643 + status = command[1];
7644 +
7645 + kfree(command);
7646 + return status;
7647 +}
7648 +
7649 +/* ......................................................................... */
7650 +
7651 +/*
7652 + * Erase blocks of flash.
7653 + */
7654 +static int at91_dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
7655 +{
7656 + struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
7657 + unsigned int pageaddr;
7658 + char* command;
7659 +
7660 +#ifdef DEBUG_DATAFLASH
7661 + printk("dataflash_erase: addr=%i len=%i\n", instr->addr, instr->len);
7662 +#endif
7663 +
7664 + /* Sanity checks */
7665 + if (instr->addr + instr->len > mtd->size)
7666 + return -EINVAL;
7667 + if ((instr->len % mtd->erasesize != 0) || (instr->len % priv->page_size != 0))
7668 + return -EINVAL;
7669 + if ((instr->addr % priv->page_size) != 0)
7670 + return -EINVAL;
7671 +
7672 + command = kmalloc(4, GFP_KERNEL);
7673 + if (!command)
7674 + return -ENOMEM;
7675 +
7676 + while (instr->len > 0) {
7677 + /* Calculate flash page address */
7678 + pageaddr = (instr->addr / priv->page_size) << priv->page_offset;
7679 +
7680 + command[0] = OP_ERASE_PAGE;
7681 + command[1] = (pageaddr & 0x00FF0000) >> 16;
7682 + command[2] = (pageaddr & 0x0000FF00) >> 8;
7683 + command[3] = 0;
7684 +#ifdef DEBUG_DATAFLASH
7685 + printk("ERASE: (%x) %x %x %x [%i]\n", command[0], command[1], command[2], command[3], pageaddr);
7686 +#endif
7687 +
7688 + /* Send command to SPI device */
7689 + spi_access_bus(priv->spi);
7690 + do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
7691 +
7692 + at91_dataflash_waitready(); /* poll status until ready */
7693 + spi_release_bus(priv->spi);
7694 +
7695 + instr->addr += priv->page_size; /* next page */
7696 + instr->len -= priv->page_size;
7697 + }
7698 +
7699 + kfree(command);
7700 +
7701 + /* Inform MTD subsystem that erase is complete */
7702 + instr->state = MTD_ERASE_DONE;
7703 + if (instr->callback)
7704 + instr->callback(instr);
7705 +
7706 + return 0;
7707 +}
7708 +
7709 +/*
7710 + * Read from the DataFlash device.
7711 + * from : Start offset in flash device
7712 + * len : Amount to read
7713 + * retlen : About of data actually read
7714 + * buf : Buffer containing the data
7715 + */
7716 +static int at91_dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
7717 +{
7718 + struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
7719 + unsigned int addr;
7720 + char* command;
7721 +
7722 +#ifdef DEBUG_DATAFLASH
7723 + printk("dataflash_read: %lli .. %lli\n", from, from+len);
7724 +#endif
7725 +
7726 + *retlen = 0;
7727 +
7728 + /* Sanity checks */
7729 + if (!len)
7730 + return 0;
7731 + if (from + len > mtd->size)
7732 + return -EINVAL;
7733 +
7734 + /* Calculate flash page/byte address */
7735 + addr = (((unsigned)from / priv->page_size) << priv->page_offset) + ((unsigned)from % priv->page_size);
7736 +
7737 + command = kmalloc(8, GFP_KERNEL);
7738 + if (!command)
7739 + return -ENOMEM;
7740 +
7741 + command[0] = OP_READ_CONTINUOUS;
7742 + command[1] = (addr & 0x00FF0000) >> 16;
7743 + command[2] = (addr & 0x0000FF00) >> 8;
7744 + command[3] = (addr & 0x000000FF);
7745 +#ifdef DEBUG_DATAFLASH
7746 + printk("READ: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
7747 +#endif
7748 +
7749 + /* Send command to SPI device */
7750 + spi_access_bus(priv->spi);
7751 + do_spi_transfer(2, command, 8, command, 8, buf, len, buf, len);
7752 + spi_release_bus(priv->spi);
7753 +
7754 + *retlen = len;
7755 + kfree(command);
7756 + return 0;
7757 +}
7758 +
7759 +/*
7760 + * Write to the DataFlash device.
7761 + * to : Start offset in flash device
7762 + * len : Amount to write
7763 + * retlen : Amount of data actually written
7764 + * buf : Buffer containing the data
7765 + */
7766 +static int at91_dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
7767 +{
7768 + struct dataflash_local *priv = (struct dataflash_local *) mtd->priv;
7769 + unsigned int pageaddr, addr, offset, writelen;
7770 + size_t remaining;
7771 + u_char *writebuf;
7772 + unsigned short status;
7773 + int res = 0;
7774 + char* command;
7775 + char* tmpbuf = NULL;
7776 +
7777 +#ifdef DEBUG_DATAFLASH
7778 + printk("dataflash_write: %lli .. %lli\n", to, to+len);
7779 +#endif
7780 +
7781 + *retlen = 0;
7782 +
7783 + /* Sanity checks */
7784 + if (!len)
7785 + return 0;
7786 + if (to + len > mtd->size)
7787 + return -EINVAL;
7788 +
7789 + command = kmalloc(4, GFP_KERNEL);
7790 + if (!command)
7791 + return -ENOMEM;
7792 +
7793 + pageaddr = ((unsigned)to / priv->page_size);
7794 + offset = ((unsigned)to % priv->page_size);
7795 + if (offset + len > priv->page_size)
7796 + writelen = priv->page_size - offset;
7797 + else
7798 + writelen = len;
7799 + writebuf = (u_char *)buf;
7800 + remaining = len;
7801 +
7802 + /* Allocate temporary buffer */
7803 + tmpbuf = kmalloc(priv->page_size, GFP_KERNEL);
7804 + if (!tmpbuf) {
7805 + kfree(command);
7806 + return -ENOMEM;
7807 + }
7808 +
7809 + /* Gain access to the SPI bus */
7810 + spi_access_bus(priv->spi);
7811 +
7812 + while (remaining > 0) {
7813 +#ifdef DEBUG_DATAFLASH
7814 + printk("write @ %i:%i len=%i\n", pageaddr, offset, writelen);
7815 +#endif
7816 +
7817 + /* (1) Transfer to Buffer1 */
7818 + if (writelen != priv->page_size) {
7819 + addr = pageaddr << priv->page_offset;
7820 + command[0] = OP_TRANSFER_BUF1;
7821 + command[1] = (addr & 0x00FF0000) >> 16;
7822 + command[2] = (addr & 0x0000FF00) >> 8;
7823 + command[3] = 0;
7824 +#ifdef DEBUG_DATAFLASH
7825 + printk("TRANSFER: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
7826 +#endif
7827 + do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
7828 + at91_dataflash_waitready();
7829 + }
7830 +
7831 + /* (2) Program via Buffer1 */
7832 + addr = (pageaddr << priv->page_offset) + offset;
7833 + command[0] = OP_PROGRAM_VIA_BUF1;
7834 + command[1] = (addr & 0x00FF0000) >> 16;
7835 + command[2] = (addr & 0x0000FF00) >> 8;
7836 + command[3] = (addr & 0x000000FF);
7837 +#ifdef DEBUG_DATAFLASH
7838 + printk("PROGRAM: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
7839 +#endif
7840 + do_spi_transfer(2, command, 4, command, 4, writebuf, writelen, tmpbuf, writelen);
7841 + at91_dataflash_waitready();
7842 +
7843 + /* (3) Compare to Buffer1 */
7844 + addr = pageaddr << priv->page_offset;
7845 + command[0] = OP_COMPARE_BUF1;
7846 + command[1] = (addr & 0x00FF0000) >> 16;
7847 + command[2] = (addr & 0x0000FF00) >> 8;
7848 + command[3] = 0;
7849 +#ifdef DEBUG_DATAFLASH
7850 + printk("COMPARE: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
7851 +#endif
7852 + do_spi_transfer(1, command, 4, command, 4, NULL, 0, NULL, 0);
7853 + at91_dataflash_waitready();
7854 +
7855 + /* Get result of the compare operation */
7856 + status = at91_dataflash_status();
7857 + if (status & 0x40) {
7858 + printk("at91_dataflash: Write error on page %i\n", pageaddr);
7859 + remaining = 0;
7860 + writelen = 0;
7861 + res = -EIO;
7862 + }
7863 +
7864 + remaining = remaining - writelen;
7865 + pageaddr++;
7866 + offset = 0;
7867 + writebuf += writelen;
7868 + *retlen += writelen;
7869 +
7870 + if (remaining > priv->page_size)
7871 + writelen = priv->page_size;
7872 + else
7873 + writelen = remaining;
7874 + }
7875 +
7876 + /* Release SPI bus */
7877 + spi_release_bus(priv->spi);
7878 +
7879 + kfree(tmpbuf);
7880 + kfree(command);
7881 + return res;
7882 +}
7883 +
7884 +/* ......................................................................... */
7885 +
7886 +/*
7887 + * Initialize and register DataFlash device with MTD subsystem.
7888 + */
7889 +static int __init add_dataflash(int channel, char *name, int IDsize,
7890 + int nr_pages, int pagesize, int pageoffset)
7891 +{
7892 + struct mtd_info *device;
7893 + struct dataflash_local *priv;
7894 +#ifdef CONFIG_MTD_PARTITIONS
7895 + struct mtd_partition *mtd_parts = 0;
7896 + int mtd_parts_nr = 0;
7897 +#endif
7898 +
7899 + if (nr_devices >= DATAFLASH_MAX_DEVICES) {
7900 + printk(KERN_ERR "at91_dataflash: Too many devices detected\n");
7901 + return 0;
7902 + }
7903 +
7904 + device = kmalloc(sizeof(struct mtd_info) + strlen(name) + 8, GFP_KERNEL);
7905 + if (!device)
7906 + return -ENOMEM;
7907 + memset(device, 0, sizeof(struct mtd_info));
7908 +
7909 + device->name = (char *)&device[1];
7910 + sprintf(device->name, "%s.spi%d", name, channel);
7911 + device->size = nr_pages * pagesize;
7912 + device->erasesize = pagesize;
7913 + device->writesize = pagesize;
7914 + device->owner = THIS_MODULE;
7915 + device->type = MTD_DATAFLASH;
7916 + device->flags = MTD_WRITEABLE;
7917 + device->erase = at91_dataflash_erase;
7918 + device->read = at91_dataflash_read;
7919 + device->write = at91_dataflash_write;
7920 +
7921 + priv = (struct dataflash_local *) kmalloc(sizeof(struct dataflash_local), GFP_KERNEL);
7922 + if (!priv) {
7923 + kfree(device);
7924 + return -ENOMEM;
7925 + }
7926 + memset(priv, 0, sizeof(struct dataflash_local));
7927 +
7928 + priv->spi = channel;
7929 + priv->page_size = pagesize;
7930 + priv->page_offset = pageoffset;
7931 + device->priv = priv;
7932 +
7933 + mtd_devices[nr_devices] = device;
7934 + nr_devices++;
7935 + printk("at91_dataflash: %s detected [spi%i] (%i bytes)\n", name, channel, device->size);
7936 +
7937 +#ifdef CONFIG_MTD_PARTITIONS
7938 +#ifdef CONFIG_MTD_CMDLINE_PARTS
7939 + mtd_parts_nr = parse_mtd_partitions(device, part_probes, &mtd_parts, 0);
7940 +#endif
7941 + if (mtd_parts_nr <= 0) {
7942 + switch (IDsize) {
7943 + case SZ_2M:
7944 + mtd_parts = static_partitions_2M;
7945 + mtd_parts_nr = ARRAY_SIZE(static_partitions_2M);
7946 + break;
7947 + case SZ_4M:
7948 + mtd_parts = static_partitions_4M;
7949 + mtd_parts_nr = ARRAY_SIZE(static_partitions_4M);
7950 + break;
7951 + case SZ_8M:
7952 + mtd_parts = static_partitions_8M;
7953 + mtd_parts_nr = ARRAY_SIZE(static_partitions_8M);
7954 + break;
7955 + }
7956 + }
7957 +
7958 + if (mtd_parts_nr > 0) {
7959 +#ifdef CONFIG_DATAFLASH_ALWAYS_ADD_DEVICE
7960 + add_mtd_device(device);
7961 +#endif
7962 + return add_mtd_partitions(device, mtd_parts, mtd_parts_nr);
7963 + }
7964 +#endif
7965 + return add_mtd_device(device); /* add whole device */
7966 +}
7967 +
7968 +/*
7969 + * Detect and initialize DataFlash device connected to specified SPI channel.
7970 + *
7971 + * Device Density ID code Nr Pages Page Size Page offset
7972 + * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
7973 + * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1025 264 9
7974 + * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
7975 + * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
7976 + * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
7977 + * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
7978 + * AT45DB0642 64Mbit (8M) xx1111xx (0x3c) 8192 1056 11
7979 + * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
7980 + */
7981 +static int __init at91_dataflash_detect(int channel)
7982 +{
7983 + int res = 0;
7984 + unsigned short status;
7985 +
7986 + spi_access_bus(channel);
7987 + status = at91_dataflash_status();
7988 + spi_release_bus(channel);
7989 + if (status != 0xff) { /* no dataflash device there */
7990 + switch (status & 0x3c) {
7991 + case 0x0c: /* 0 0 1 1 */
7992 + res = add_dataflash(channel, "AT45DB011B", SZ_128K, 512, 264, 9);
7993 + break;
7994 + case 0x14: /* 0 1 0 1 */
7995 + res = add_dataflash(channel, "AT45DB021B", SZ_256K, 1025, 264, 9);
7996 + break;
7997 + case 0x1c: /* 0 1 1 1 */
7998 + res = add_dataflash(channel, "AT45DB041B", SZ_512K, 2048, 264, 9);
7999 + break;
8000 + case 0x24: /* 1 0 0 1 */
8001 + res = add_dataflash(channel, "AT45DB081B", SZ_1M, 4096, 264, 9);
8002 + break;
8003 + case 0x2c: /* 1 0 1 1 */
8004 + res = add_dataflash(channel, "AT45DB161B", SZ_2M, 4096, 528, 10);
8005 + break;
8006 + case 0x34: /* 1 1 0 1 */
8007 + res = add_dataflash(channel, "AT45DB321B", SZ_4M, 8192, 528, 10);
8008 + break;
8009 + case 0x3c: /* 1 1 1 1 */
8010 + res = add_dataflash(channel, "AT45DB642", SZ_8M, 8192, 1056, 11);
8011 + break;
8012 +// Currently unsupported since Atmel removed the "Main Memory Program via Buffer" commands.
8013 +// case 0x10: /* 0 1 0 0 */
8014 +// res = add_dataflash(channel, "AT45DB1282", SZ_16M, 16384, 1056, 11);
8015 +// break;
8016 + default:
8017 + printk(KERN_ERR "at91_dataflash: Unknown device (%x)\n", status & 0x3c);
8018 + }
8019 + }
8020 +
8021 + return res;
8022 +}
8023 +
8024 +static int __init at91_dataflash_init(void)
8025 +{
8026 + spi_transfer_desc = kmalloc(sizeof(struct spi_transfer_list), GFP_KERNEL);
8027 + if (!spi_transfer_desc)
8028 + return -ENOMEM;
8029 +
8030 + /* DataFlash (SPI chip select 0) */
8031 + at91_dataflash_detect(0);
8032 +
8033 + if (machine_is_sweda_tms())
8034 + at91_dataflash_detect(1); /* DataFlash device (SPI chip select 1) */
8035 +
8036 +#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
8037 + /* DataFlash card (SPI chip select 3) */
8038 + at91_dataflash_detect(3);
8039 +#endif
8040 +
8041 + return 0;
8042 +}
8043 +
8044 +static void __exit at91_dataflash_exit(void)
8045 +{
8046 + int i;
8047 +
8048 + for (i = 0; i < DATAFLASH_MAX_DEVICES; i++) {
8049 + if (mtd_devices[i]) {
8050 +#ifdef CONFIG_MTD_PARTITIONS
8051 + del_mtd_partitions(mtd_devices[i]);
8052 +#else
8053 + del_mtd_device(mtd_devices[i]);
8054 +#endif
8055 + kfree(mtd_devices[i]->priv);
8056 + kfree(mtd_devices[i]);
8057 + }
8058 + }
8059 + nr_devices = 0;
8060 + kfree(spi_transfer_desc);
8061 +}
8062 +
8063 +
8064 +module_init(at91_dataflash_init);
8065 +module_exit(at91_dataflash_exit);
8066 +
8067 +MODULE_LICENSE("GPL");
8068 +MODULE_AUTHOR("Andrew Victor");
8069 +MODULE_DESCRIPTION("DataFlash driver for Atmel AT91RM9200");
8070 diff -urN -x CVS linux-2.6.25/drivers/mtd/nand/Kconfig linux-2.6/drivers/mtd/nand/Kconfig
8071 --- linux-2.6.25/drivers/mtd/nand/Kconfig 2008-05-03 00:15:48.000000000 +0200
8072 +++ linux-2.6/drivers/mtd/nand/Kconfig 2008-04-18 17:52:53.000000000 +0200
8073 @@ -273,12 +273,53 @@
8074 If you say "m", the module will be called "cs553x_nand.ko".
8075
8076 config MTD_NAND_AT91
8077 - bool "Support for NAND Flash / SmartMedia on AT91"
8078 + tristate "Support for NAND Flash / SmartMedia on AT91"
8079 depends on ARCH_AT91
8080 help
8081 Enables support for NAND Flash / Smart Media Card interface
8082 on Atmel AT91 processors.
8083
8084 +choice
8085 + prompt "ECC management for NAND Flash / SmartMedia on AT91"
8086 + depends on MTD_NAND_AT91
8087 +
8088 +config MTD_NAND_AT91_ECC_SOFT
8089 + bool "Software ECC"
8090 + depends on MTD_NAND_AT91
8091 + help
8092 + Uses software ECC.
8093 +
8094 + NB : hardware and software ECC schemes are incompatible.
8095 + If you switch from one to another, you'll have to erase your
8096 + mtd partition.
8097 +
8098 +config MTD_NAND_AT91_ECC_HW
8099 + bool "Hardware ECC"
8100 + depends on MTD_NAND_AT91 && (ARCH_AT91SAM9260 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9)
8101 + help
8102 + Uses hardware ECC provided by the AT91 processor
8103 + instead of software ECC.
8104 + The hardware ECC controller is capable of single bit error
8105 + correction and 2-bit random detection per page.
8106 +
8107 + NB : hardware and software ECC schemes are incompatible.
8108 + If you switch from one to another, you'll have to erase your
8109 + mtd partition.
8110 +
8111 + If unsure, say Y
8112 +
8113 +config MTD_NAND_AT91_ECC_NONE
8114 + bool "No ECC (Testing Only)"
8115 + depends on MTD_NAND_AT91
8116 + help
8117 + No ECC will be used.
8118 + It's not a good idea and it should be reserved for testing
8119 + purpose only.
8120 +
8121 + If unsure, say N
8122 +
8123 +endchoice
8124 +
8125 config MTD_NAND_CM_X270
8126 tristate "Support for NAND Flash on CM-X270 modules"
8127 depends on MTD_NAND && MACH_ARMCORE
8128 diff -urN -x CVS linux-2.6.25/drivers/mtd/nand/at91_nand.c linux-2.6/drivers/mtd/nand/at91_nand.c
8129 --- linux-2.6.25/drivers/mtd/nand/at91_nand.c 2008-05-03 00:15:48.000000000 +0200
8130 +++ linux-2.6/drivers/mtd/nand/at91_nand.c 2008-05-03 00:53:39.000000000 +0200
8131 @@ -9,6 +9,15 @@
8132 * Derived from drivers/mtd/spia.c
8133 * Copyright (C) 2000 Steven J. Hill (sjhill@cotw.com)
8134 *
8135 + *
8136 + * Add Hardware ECC support for AT91SAM9260 / AT91SAM9263
8137 + * Richard Genoud (richard.genoud@gmail.com), Adeneo Copyright (C) 2007
8138 + *
8139 + * Derived from Das U-Boot source code
8140 + * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
8141 + * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
8142 + *
8143 + *
8144 * This program is free software; you can redistribute it and/or modify
8145 * it under the terms of the GNU General Public License version 2 as
8146 * published by the Free Software Foundation.
8147 @@ -28,15 +37,75 @@
8148 #include <asm/hardware.h>
8149 #include <asm/arch/board.h>
8150 #include <asm/arch/gpio.h>
8151 +#include <asm/arch/at91_ecc.h>
8152 +
8153 +#ifdef CONFIG_MTD_NAND_AT91_ECC_HW
8154 +#define hard_ecc 1
8155 +#else
8156 +#define hard_ecc 0
8157 +#endif
8158 +
8159 +#ifdef CONFIG_MTD_NAND_AT91_ECC_NONE
8160 +#define no_ecc 1
8161 +#else
8162 +#define no_ecc 0
8163 +#endif
8164 +
8165 +/* Register access macros */
8166 +#define ecc_readl(base, reg) __raw_readl(base + reg)
8167 +#define ecc_writel(base, reg, value) __raw_writel((value), base + reg)
8168 +
8169 +
8170 +/*
8171 + * OOB layout for large page size.
8172 + * bad block info is on bytes 0 and 1
8173 + * the bytes must be consecutives to avoid several NAND_CMD_RNDOUT during read.
8174 + */
8175 +static struct nand_ecclayout at91_oobinfo_large = {
8176 + .eccbytes = 4,
8177 + .eccpos = {60, 61, 62, 63},
8178 + .oobfree = { {2, 58} },
8179 +};
8180 +
8181 +/*
8182 + * OOB layout for small page size
8183 + * bad block info is on bytes 4 and 5
8184 + * the bytes must be consecutives to avoid several NAND_CMD_RNDOUT during read.
8185 + */
8186 +static struct nand_ecclayout at91_oobinfo_small = {
8187 + .eccbytes = 4,
8188 + .eccpos = {0, 1, 2, 3},
8189 + .oobfree = { {6, 10} },
8190 +};
8191
8192 struct at91_nand_host {
8193 struct nand_chip nand_chip;
8194 struct mtd_info mtd;
8195 void __iomem *io_base;
8196 struct at91_nand_data *board;
8197 + struct device *dev;
8198 + void __iomem *ecc;
8199 };
8200
8201 /*
8202 + * Enable NAND chip-select.
8203 + */
8204 +static void at91_nand_enable(struct at91_nand_host *host)
8205 +{
8206 + if (host->board->enable_pin)
8207 + at91_set_gpio_value(host->board->enable_pin, 0);
8208 +}
8209 +
8210 +/*
8211 + * Disable NAND chip-select.
8212 + */
8213 +static void at91_nand_disable(struct at91_nand_host *host)
8214 +{
8215 + if (host->board->enable_pin)
8216 + at91_set_gpio_value(host->board->enable_pin, 1);
8217 +}
8218 +
8219 +/*
8220 * Hardware specific access to control-lines
8221 */
8222 static void at91_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
8223 @@ -44,6 +113,13 @@
8224 struct nand_chip *nand_chip = mtd->priv;
8225 struct at91_nand_host *host = nand_chip->priv;
8226
8227 + if (ctrl & NAND_CTRL_CHANGE) {
8228 + if (ctrl & NAND_NCE)
8229 + at91_nand_enable(host);
8230 + else
8231 + at91_nand_disable(host);
8232 + }
8233 +
8234 if (cmd == NAND_CMD_NONE)
8235 return;
8236
8237 @@ -65,27 +141,249 @@
8238 }
8239
8240 /*
8241 - * Enable NAND.
8242 + * write oob for small pages
8243 */
8244 -static void at91_nand_enable(struct at91_nand_host *host)
8245 +static int at91_nand_write_oob_512(struct mtd_info *mtd,
8246 + struct nand_chip *chip, int page)
8247 {
8248 - if (host->board->enable_pin)
8249 - at91_set_gpio_value(host->board->enable_pin, 0);
8250 + int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
8251 + int eccsize = chip->ecc.size, length = mtd->oobsize;
8252 + int len, pos, status = 0;
8253 + const uint8_t *bufpoi = chip->oob_poi;
8254 +
8255 + pos = eccsize + chunk;
8256 +
8257 + chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page);
8258 + len = min_t(int, length, chunk);
8259 + chip->write_buf(mtd, bufpoi, len);
8260 + bufpoi += len;
8261 + length -= len;
8262 + if (length > 0)
8263 + chip->write_buf(mtd, bufpoi, length);
8264 +
8265 + chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
8266 + status = chip->waitfunc(mtd, chip);
8267 +
8268 + return status & NAND_STATUS_FAIL ? -EIO : 0;
8269 +
8270 }
8271
8272 /*
8273 - * Disable NAND.
8274 + * read oob for small pages
8275 */
8276 -static void at91_nand_disable(struct at91_nand_host *host)
8277 +static int at91_nand_read_oob_512(struct mtd_info *mtd,
8278 + struct nand_chip *chip, int page, int sndcmd)
8279 {
8280 - if (host->board->enable_pin)
8281 - at91_set_gpio_value(host->board->enable_pin, 1);
8282 + if (sndcmd) {
8283 + chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
8284 + sndcmd = 0;
8285 + }
8286 + chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
8287 + return sndcmd;
8288 +}
8289 +
8290 +/*
8291 + * Calculate HW ECC
8292 + *
8293 + * mtd: MTD block structure
8294 + * dat: raw data (unused)
8295 + * ecc_code: buffer for ECC
8296 + */
8297 +static int at91_nand_calculate(struct mtd_info *mtd,
8298 + const u_char *dat, unsigned char *ecc_code)
8299 +{
8300 + struct nand_chip *nand_chip = mtd->priv;
8301 + struct at91_nand_host *host = nand_chip->priv;
8302 + uint32_t *eccpos = nand_chip->ecc.layout->eccpos;
8303 + unsigned int ecc_value;
8304 +
8305 + /* get the first 2 ECC bytes */
8306 + ecc_value = ecc_readl(host->ecc, AT91_ECC_PR) & (AT91_ECC_BITADDR | AT91_ECC_WORDADDR);
8307 +
8308 + ecc_code[eccpos[0]] = ecc_value & 0xFF;
8309 + ecc_code[eccpos[1]] = (ecc_value >> 8) & 0xFF;
8310 +
8311 + /* get the last 2 ECC bytes */
8312 + ecc_value = ecc_readl(host->ecc, AT91_ECC_NPR) & AT91_ECC_NPARITY;
8313 +
8314 + ecc_code[eccpos[2]] = ecc_value & 0xFF;
8315 + ecc_code[eccpos[3]] = (ecc_value >> 8) & 0xFF;
8316 +
8317 + return 0;
8318 }
8319
8320 +/*
8321 + * HW ECC read page function
8322 + *
8323 + * mtd: mtd info structure
8324 + * chip: nand chip info structure
8325 + * buf: buffer to store read data
8326 + */
8327 +static int at91_nand_read_page(struct mtd_info *mtd,
8328 + struct nand_chip *chip, uint8_t *buf)
8329 +{
8330 + int eccsize = chip->ecc.size;
8331 + int eccbytes = chip->ecc.bytes;
8332 + uint32_t *eccpos = chip->ecc.layout->eccpos;
8333 + uint8_t *p = buf;
8334 + uint8_t *oob = chip->oob_poi;
8335 + uint8_t *ecc_pos;
8336 + int stat;
8337 +
8338 + /* read the page */
8339 + chip->read_buf(mtd, p, eccsize);
8340 +
8341 + /* move to ECC position if needed */
8342 + if (eccpos[0] != 0) {
8343 + /*
8344 + * This only works on large pages because the ECC controller
8345 + * waits for NAND_CMD_RNDOUTSTART after the NAND_CMD_RNDOUT.
8346 + * Anyway, for small pages, the eccpos[0] == 0
8347 + */
8348 + chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
8349 + mtd->writesize + eccpos[0], -1);
8350 + }
8351 +
8352 + /* the ECC controller needs to read the ECC just after the data */
8353 + ecc_pos = oob + eccpos[0];
8354 + chip->read_buf(mtd, ecc_pos, eccbytes);
8355 +
8356 + /* check if there's an error */
8357 + stat = chip->ecc.correct(mtd, p, oob, NULL);
8358 +
8359 + if (stat < 0)
8360 + mtd->ecc_stats.failed++;
8361 + else
8362 + mtd->ecc_stats.corrected += stat;
8363 +
8364 + /* get back to oob start (end of page) */
8365 + chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1);
8366 +
8367 + /* read the oob */
8368 + chip->read_buf(mtd, oob, mtd->oobsize);
8369 +
8370 + return 0;
8371 +}
8372 +
8373 +/*
8374 + * HW ECC Correction
8375 + *
8376 + * mtd: MTD block structure
8377 + * dat: raw data read from the chip
8378 + * read_ecc: ECC from the chip (unused)
8379 + * isnull: unused
8380 + *
8381 + * Detect and correct a 1 bit error for a page
8382 + */
8383 +static int at91_nand_correct(struct mtd_info *mtd, u_char *dat,
8384 + u_char *read_ecc, u_char *isnull)
8385 +{
8386 + struct nand_chip *nand_chip = mtd->priv;
8387 + struct at91_nand_host *host = nand_chip->priv;
8388 + unsigned int ecc_status;
8389 + unsigned int ecc_word, ecc_bit;
8390 +
8391 + /* get the status from the Status Register */
8392 + ecc_status = ecc_readl(host->ecc, AT91_ECC_SR);
8393 +
8394 + /* if there's no error */
8395 + if (likely(!(ecc_status & AT91_ECC_RECERR)))
8396 + return 0;
8397 +
8398 + /* get error bit offset (4 bits) */
8399 + ecc_bit = ecc_readl(host->ecc, AT91_ECC_PR) & AT91_ECC_BITADDR;
8400 + /* get word address (12 bits) */
8401 + ecc_word = ecc_readl(host->ecc, AT91_ECC_PR) & AT91_ECC_WORDADDR;
8402 + ecc_word >>= 4;
8403 +
8404 + /* if there are multiple errors */
8405 + if (ecc_status & AT91_ECC_MULERR) {
8406 + /* Check if it is a freshly erased block (filled with 0xff) */
8407 + if ((ecc_bit == AT91_ECC_BITADDR)
8408 + && (ecc_word == (AT91_ECC_WORDADDR >> 4))) {
8409 + /* the block has just been erased, return OK */
8410 + return 0;
8411 + }
8412 + /*
8413 + * It doesn't seems to be a freshly-erased block.
8414 + * We can't correct so many errors.
8415 + */
8416 + dev_dbg(host->dev, "at91_nand : multiple errors detected."
8417 + " Unable to correct.\n");
8418 + return -EIO;
8419 + }
8420 +
8421 + /* if there's a single bit error : we can correct it */
8422 + if (ecc_status & AT91_ECC_ECCERR) {
8423 + /*
8424 + * There's nothing much to do here.
8425 + * The bit error is on the ECC itself.
8426 + */
8427 + dev_dbg(host->dev, "at91_nand : one bit error on ECC code."
8428 + " Nothing to correct\n");
8429 + return 0;
8430 + }
8431 +
8432 + dev_dbg(host->dev, "at91_nand : one bit error on data."
8433 + " (word offset in the page :"
8434 + " 0x%x bit offset : 0x%x)\n",
8435 + ecc_word, ecc_bit);
8436 + /* correct the error */
8437 + if (nand_chip->options & NAND_BUSWIDTH_16) {
8438 + /* 16 bits words */
8439 + ((unsigned short *) dat)[ecc_word] ^= (1 << ecc_bit);
8440 + } else {
8441 + /* 8 bits words */
8442 + dat[ecc_word] ^= (1 << ecc_bit);
8443 + }
8444 + dev_dbg(host->dev, "at91_nand : error corrected\n");
8445 + return 1;
8446 +}
8447 +
8448 +/*
8449 + * Enable HW ECC : unsused
8450 + */
8451 +static void at91_nand_hwctl(struct mtd_info *mtd, int mode) { ; }
8452 +
8453 +/*
8454 + * Over-ride the standard functions with our optimized versions.
8455 + * We can use read/write blocks to move data to/from the controller.
8456 + */
8457 +static void at91_read_buf8(struct mtd_info *mtd, u8 *buf, int len)
8458 +{
8459 + struct nand_chip *nand_chip = mtd->priv;
8460 +
8461 + __raw_readsb(nand_chip->IO_ADDR_R, buf, len);
8462 +}
8463 +
8464 +static void at91_read_buf16(struct mtd_info *mtd, u8 *buf, int len)
8465 +{
8466 + struct nand_chip *nand_chip = mtd->priv;
8467 +
8468 + __raw_readsw(nand_chip->IO_ADDR_R, buf, len / 2);
8469 +}
8470 +
8471 +static void at91_write_buf8(struct mtd_info *mtd, const u8 *buf, int len)
8472 +{
8473 + struct nand_chip *nand_chip = mtd->priv;
8474 +
8475 + __raw_writesb(nand_chip->IO_ADDR_W, buf, len);
8476 +}
8477 +
8478 +static void at91_write_buf16(struct mtd_info *mtd, const u8 *buf, int len)
8479 +{
8480 + struct nand_chip *nand_chip = mtd->priv;
8481 +
8482 + __raw_writesw(nand_chip->IO_ADDR_W, buf, len / 2);
8483 +}
8484 +
8485 +
8486 #ifdef CONFIG_MTD_PARTITIONS
8487 -const char *part_probes[] = { "cmdlinepart", NULL };
8488 +static const char *part_probes[] = { "cmdlinepart", NULL };
8489 #endif
8490
8491 +static char* ecc_modes[] __initdata = { "No", "Software", "Hardware" };
8492 +
8493 /*
8494 * Probe for the NAND device.
8495 */
8496 @@ -94,6 +392,8 @@
8497 struct at91_nand_host *host;
8498 struct mtd_info *mtd;
8499 struct nand_chip *nand_chip;
8500 + struct resource *regs;
8501 + struct resource *mem;
8502 int res;
8503
8504 #ifdef CONFIG_MTD_PARTITIONS
8505 @@ -108,8 +408,13 @@
8506 return -ENOMEM;
8507 }
8508
8509 - host->io_base = ioremap(pdev->resource[0].start,
8510 - pdev->resource[0].end - pdev->resource[0].start + 1);
8511 + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
8512 + if (!mem) {
8513 + printk(KERN_ERR "at91_nand: can't get I/O resource mem\n");
8514 + return -ENXIO;
8515 + }
8516 +
8517 + host->io_base = ioremap(mem->start, mem->end - mem->start + 1);
8518 if (host->io_base == NULL) {
8519 printk(KERN_ERR "at91_nand: ioremap failed\n");
8520 kfree(host);
8521 @@ -119,6 +424,7 @@
8522 mtd = &host->mtd;
8523 nand_chip = &host->nand_chip;
8524 host->board = pdev->dev.platform_data;
8525 + host->dev = &pdev->dev;
8526
8527 nand_chip->priv = host; /* link the private data structures */
8528 mtd->priv = nand_chip;
8529 @@ -132,11 +438,40 @@
8530 if (host->board->rdy_pin)
8531 nand_chip->dev_ready = at91_nand_device_ready;
8532
8533 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
8534 + if (!regs && hard_ecc) {
8535 + printk(KERN_ERR "at91_nand: can't get I/O resource "
8536 + "regs\nFalling back on software ECC\n");
8537 + }
8538 +
8539 nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */
8540 + if (no_ecc)
8541 + nand_chip->ecc.mode = NAND_ECC_NONE;
8542 + if (hard_ecc && regs) {
8543 + host->ecc = (void __force __iomem *) (AT91_VA_BASE_SYS - AT91_BASE_SYS);
8544 + host->ecc += regs->start;
8545 +
8546 + nand_chip->ecc.mode = NAND_ECC_HW_SYNDROME; /* HW SYNDROME ECC */
8547 + nand_chip->ecc.calculate = at91_nand_calculate; /* function called after a write */
8548 + nand_chip->ecc.correct = at91_nand_correct; /* function called after a read */
8549 + nand_chip->ecc.hwctl = at91_nand_hwctl; /* unused */
8550 + nand_chip->ecc.read_page = at91_nand_read_page; /* read page function */
8551 + nand_chip->ecc.bytes = 4; /* 4 ECC bytes for any page size */
8552 + nand_chip->ecc.prepad = 0;
8553 + nand_chip->ecc.postpad = 0;
8554 + }
8555 +
8556 nand_chip->chip_delay = 20; /* 20us command delay time */
8557
8558 - if (host->board->bus_width_16) /* 16-bit bus width */
8559 + if (host->board->bus_width_16) { /* 16-bit bus width */
8560 nand_chip->options |= NAND_BUSWIDTH_16;
8561 + nand_chip->read_buf = at91_read_buf16;
8562 + nand_chip->write_buf = at91_write_buf16;
8563 + }
8564 + else {
8565 + nand_chip->read_buf = at91_read_buf8;
8566 + nand_chip->write_buf = at91_write_buf8;
8567 + }
8568
8569 platform_set_drvdata(pdev, host);
8570 at91_nand_enable(host);
8571 @@ -149,8 +484,60 @@
8572 }
8573 }
8574
8575 - /* Scan to find existance of the device */
8576 - if (nand_scan(mtd, 1)) {
8577 + /* first scan to find the device and get the page size */
8578 + if (nand_scan_ident(mtd, 1)) {
8579 + res = -ENXIO;
8580 + goto out;
8581 + }
8582 +
8583 + if (nand_chip->ecc.mode == NAND_ECC_HW_SYNDROME) {
8584 + /* ECC is calculated for the whole page (1 step) */
8585 + nand_chip->ecc.size = mtd->writesize;
8586 +
8587 + /* set ECC page size and oob layout */
8588 + switch (mtd->writesize) {
8589 + case 512:
8590 + nand_chip->ecc.layout = &at91_oobinfo_small;
8591 + nand_chip->ecc.read_oob = at91_nand_read_oob_512;
8592 + nand_chip->ecc.write_oob = at91_nand_write_oob_512;
8593 + ecc_writel(host->ecc, AT91_ECC_MR, AT91_ECC_PAGESIZE_528);
8594 + break;
8595 + case 1024:
8596 + nand_chip->ecc.layout = &at91_oobinfo_large;
8597 + ecc_writel(host->ecc, AT91_ECC_MR, AT91_ECC_PAGESIZE_1056);
8598 + break;
8599 + case 2048:
8600 + nand_chip->ecc.layout = &at91_oobinfo_large;
8601 + ecc_writel(host->ecc, AT91_ECC_MR, AT91_ECC_PAGESIZE_2112);
8602 + break;
8603 + case 4096:
8604 + nand_chip->ecc.layout = &at91_oobinfo_large;
8605 + ecc_writel(host->ecc, AT91_ECC_MR, AT91_ECC_PAGESIZE_4224);
8606 + break;
8607 + default:
8608 + /*
8609 + * Page size not supported by HW ECC.
8610 + * So switch back to soft ECC
8611 + */
8612 + nand_chip->ecc.mode = NAND_ECC_SOFT;
8613 + nand_chip->ecc.calculate = NULL;
8614 + nand_chip->ecc.correct = NULL;
8615 + nand_chip->ecc.hwctl = NULL;
8616 + nand_chip->ecc.read_page = NULL;
8617 + nand_chip->ecc.postpad = 0;
8618 + nand_chip->ecc.prepad = 0;
8619 + nand_chip->ecc.bytes = 0;
8620 + break;
8621 + }
8622 + }
8623 +
8624 + printk(KERN_INFO "AT91 NAND: %i-bit, %s ECC\n",
8625 + (nand_chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
8626 + ecc_modes[nand_chip->ecc.mode]
8627 + );
8628 +
8629 + /* second phase scan */
8630 + if (nand_scan_tail(mtd)) {
8631 res = -ENXIO;
8632 goto out;
8633 }
8634 @@ -179,8 +566,11 @@
8635 if (!res)
8636 return res;
8637
8638 +#ifdef CONFIG_MTD_PARTITIONS
8639 release:
8640 +#endif
8641 nand_release(mtd);
8642 +
8643 out:
8644 at91_nand_disable(host);
8645 platform_set_drvdata(pdev, NULL);
8646 @@ -192,7 +582,7 @@
8647 /*
8648 * Remove a NAND device.
8649 */
8650 -static int __devexit at91_nand_remove(struct platform_device *pdev)
8651 +static int __exit at91_nand_remove(struct platform_device *pdev)
8652 {
8653 struct at91_nand_host *host = platform_get_drvdata(pdev);
8654 struct mtd_info *mtd = &host->mtd;
8655 @@ -208,8 +598,7 @@
8656 }
8657
8658 static struct platform_driver at91_nand_driver = {
8659 - .probe = at91_nand_probe,
8660 - .remove = at91_nand_remove,
8661 + .remove = __exit_p(at91_nand_remove),
8662 .driver = {
8663 .name = "at91_nand",
8664 .owner = THIS_MODULE,
8665 @@ -218,7 +607,7 @@
8666
8667 static int __init at91_nand_init(void)
8668 {
8669 - return platform_driver_register(&at91_nand_driver);
8670 + return platform_driver_probe(&at91_nand_driver, at91_nand_probe);
8671 }
8672
8673
8674 @@ -233,4 +622,4 @@
8675
8676 MODULE_LICENSE("GPL");
8677 MODULE_AUTHOR("Rick Bronson");
8678 -MODULE_DESCRIPTION("NAND/SmartMedia driver for AT91RM9200");
8679 +MODULE_DESCRIPTION("NAND/SmartMedia driver for AT91RM9200 / AT91SAM9 / AT91CAP9");
8680 diff -urN -x CVS linux-2.6.25/drivers/net/arm/Kconfig linux-2.6/drivers/net/arm/Kconfig
8681 --- linux-2.6.25/drivers/net/arm/Kconfig 2007-10-09 22:31:38.000000000 +0200
8682 +++ linux-2.6/drivers/net/arm/Kconfig 2008-03-04 21:52:40.000000000 +0200
8683 @@ -47,3 +47,10 @@
8684 help
8685 This is a driver for the ethernet hardware included in EP93xx CPUs.
8686 Say Y if you are building a kernel for EP93xx based devices.
8687 +
8688 +config ARM_KS8695_ETHER
8689 + tristate "KS8695 Ethernet support"
8690 + depends on NET_ETHERNET && ARM && ARCH_KS8695
8691 + help
8692 + If you wish to compile a kernel for an KS8695-based board
8693 + and enable Ethernet support, then select this option.
8694 diff -urN -x CVS linux-2.6.25/drivers/net/arm/Makefile linux-2.6/drivers/net/arm/Makefile
8695 --- linux-2.6.25/drivers/net/arm/Makefile 2007-10-09 22:31:38.000000000 +0200
8696 +++ linux-2.6/drivers/net/arm/Makefile 2008-03-04 21:51:41.000000000 +0200
8697 @@ -9,3 +9,4 @@
8698 obj-$(CONFIG_ARM_ETHER1) += ether1.o
8699 obj-$(CONFIG_ARM_AT91_ETHER) += at91_ether.o
8700 obj-$(CONFIG_EP93XX_ETH) += ep93xx_eth.o
8701 +obj-$(CONFIG_ARM_KS8695_ETHER) += ks8695_ether.o
8702 diff -urN -x CVS linux-2.6.25/drivers/net/arm/at91_ether.c linux-2.6/drivers/net/arm/at91_ether.c
8703 --- linux-2.6.25/drivers/net/arm/at91_ether.c 2008-05-03 00:15:48.000000000 +0200
8704 +++ linux-2.6/drivers/net/arm/at91_ether.c 2008-05-08 21:47:22.000000000 +0200
8705 @@ -220,7 +220,7 @@
8706 if (!(phy & (1 << 0)))
8707 goto done;
8708 }
8709 - else if (lp->phy_type == MII_KS8721_ID) {
8710 + else if ((lp->phy_type == MII_KS8721_ID) || (lp->phy_type == MII_KSZ8041_ID)) {
8711 read_phy(lp->phy_address, MII_TPISTATUS, &phy); /* ack interrupt in Micrel PHY */
8712 if (!(phy & ((1 << 2) | 1)))
8713 goto done;
8714 @@ -286,7 +286,7 @@
8715 dsintr = (1 << 15) | ( 1 << 14);
8716 write_phy(lp->phy_address, MII_BCMINTR_REG, dsintr);
8717 }
8718 - else if (lp->phy_type == MII_KS8721_ID) { /* for Micrel PHY */
8719 + else if ((lp->phy_type == MII_KS8721_ID) || (lp->phy_type == MII_KSZ8041_ID)) { /* for Micrel PHY */
8720 dsintr = (1 << 10) | ( 1 << 8);
8721 write_phy(lp->phy_address, MII_TPISTATUS, dsintr);
8722 }
8723 @@ -341,7 +341,7 @@
8724 dsintr = ~(1 << 14);
8725 write_phy(lp->phy_address, MII_BCMINTR_REG, dsintr);
8726 }
8727 - else if (lp->phy_type == MII_KS8721_ID) { /* for Micrel PHY */
8728 + else if ((lp->phy_type == MII_KS8721_ID) || (lp->phy_type == MII_KSZ8041_ID)) { /* for Micrel PHY */
8729 read_phy(lp->phy_address, MII_TPISTATUS, &dsintr);
8730 dsintr = ~((1 << 10) | (1 << 8));
8731 write_phy(lp->phy_address, MII_TPISTATUS, dsintr);
8732 @@ -820,7 +820,7 @@
8733 lp->skb = skb;
8734 lp->skb_length = skb->len;
8735 lp->skb_physaddr = dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE);
8736 - lp->stats.tx_bytes += skb->len;
8737 + dev->stats.tx_bytes += skb->len;
8738
8739 /* Set address of the data in the Transmit Address register */
8740 at91_emac_write(AT91_EMAC_TAR, lp->skb_physaddr);
8741 @@ -843,34 +843,32 @@
8742 */
8743 static struct net_device_stats *at91ether_stats(struct net_device *dev)
8744 {
8745 - struct at91_private *lp = netdev_priv(dev);
8746 - int ale, lenerr, seqe, lcol, ecol;
8747 + int ale, lenerr, seqe, ecol;
8748
8749 if (netif_running(dev)) {
8750 - lp->stats.rx_packets += at91_emac_read(AT91_EMAC_OK); /* Good frames received */
8751 + dev->stats.rx_packets += at91_emac_read(AT91_EMAC_OK); /* Good frames received */
8752 ale = at91_emac_read(AT91_EMAC_ALE);
8753 - lp->stats.rx_frame_errors += ale; /* Alignment errors */
8754 + dev->stats.rx_frame_errors += ale; /* Alignment errors */
8755 lenerr = at91_emac_read(AT91_EMAC_ELR) + at91_emac_read(AT91_EMAC_USF);
8756 - lp->stats.rx_length_errors += lenerr; /* Excessive Length or Undersize Frame error */
8757 + dev->stats.rx_length_errors += lenerr; /* Excessive Length or Undersize Frame error */
8758 seqe = at91_emac_read(AT91_EMAC_SEQE);
8759 - lp->stats.rx_crc_errors += seqe; /* CRC error */
8760 - lp->stats.rx_fifo_errors += at91_emac_read(AT91_EMAC_DRFC); /* Receive buffer not available */
8761 - lp->stats.rx_errors += (ale + lenerr + seqe
8762 + dev->stats.rx_crc_errors += seqe; /* CRC error */
8763 + dev->stats.rx_fifo_errors += at91_emac_read(AT91_EMAC_DRFC); /* Receive buffer not available */
8764 + dev->stats.rx_errors += (ale + lenerr + seqe
8765 + at91_emac_read(AT91_EMAC_CDE) + at91_emac_read(AT91_EMAC_RJB));
8766
8767 - lp->stats.tx_packets += at91_emac_read(AT91_EMAC_FRA); /* Frames successfully transmitted */
8768 - lp->stats.tx_fifo_errors += at91_emac_read(AT91_EMAC_TUE); /* Transmit FIFO underruns */
8769 - lp->stats.tx_carrier_errors += at91_emac_read(AT91_EMAC_CSE); /* Carrier Sense errors */
8770 - lp->stats.tx_heartbeat_errors += at91_emac_read(AT91_EMAC_SQEE);/* Heartbeat error */
8771 + dev->stats.tx_packets += at91_emac_read(AT91_EMAC_FRA); /* Frames successfully transmitted */
8772 + dev->stats.tx_fifo_errors += at91_emac_read(AT91_EMAC_TUE); /* Transmit FIFO underruns */
8773 + dev->stats.tx_carrier_errors += at91_emac_read(AT91_EMAC_CSE); /* Carrier Sense errors */
8774 + dev->stats.tx_heartbeat_errors += at91_emac_read(AT91_EMAC_SQEE);/* Heartbeat error */
8775
8776 - lcol = at91_emac_read(AT91_EMAC_LCOL);
8777 + dev->stats.tx_window_errors += at91_emac_read(AT91_EMAC_LCOL); /* Late collisions */
8778 ecol = at91_emac_read(AT91_EMAC_ECOL);
8779 - lp->stats.tx_window_errors += lcol; /* Late collisions */
8780 - lp->stats.tx_aborted_errors += ecol; /* 16 collisions */
8781 + dev->stats.tx_aborted_errors += ecol; /* 16 collisions */
8782
8783 - lp->stats.collisions += (at91_emac_read(AT91_EMAC_SCOL) + at91_emac_read(AT91_EMAC_MCOL) + lcol + ecol);
8784 + dev->stats.collisions += (at91_emac_read(AT91_EMAC_SCOL) + at91_emac_read(AT91_EMAC_MCOL) + ecol);
8785 }
8786 - return &lp->stats;
8787 + return &dev->stats;
8788 }
8789
8790 /*
8791 @@ -896,16 +894,16 @@
8792
8793 skb->protocol = eth_type_trans(skb, dev);
8794 dev->last_rx = jiffies;
8795 - lp->stats.rx_bytes += pktlen;
8796 + dev->stats.rx_bytes += pktlen;
8797 netif_rx(skb);
8798 }
8799 else {
8800 - lp->stats.rx_dropped += 1;
8801 + dev->stats.rx_dropped += 1;
8802 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
8803 }
8804
8805 if (dlist->descriptors[lp->rxBuffIndex].size & EMAC_MULTICAST)
8806 - lp->stats.multicast++;
8807 + dev->stats.multicast++;
8808
8809 dlist->descriptors[lp->rxBuffIndex].addr &= ~EMAC_DESC_DONE; /* reset ownership bit */
8810 if (lp->rxBuffIndex == MAX_RX_DESCR-1) /* wrap after last buffer */
8811 @@ -934,7 +932,7 @@
8812 if (intstatus & AT91_EMAC_TCOM) { /* Transmit complete */
8813 /* The TCOM bit is set even if the transmission failed. */
8814 if (intstatus & (AT91_EMAC_TUND | AT91_EMAC_RTRY))
8815 - lp->stats.tx_errors += 1;
8816 + dev->stats.tx_errors += 1;
8817
8818 if (lp->skb) {
8819 dev_kfree_skb_irq(lp->skb);
8820 @@ -978,15 +976,22 @@
8821 struct net_device *dev;
8822 struct at91_private *lp;
8823 unsigned int val;
8824 - int res;
8825 + struct resource *res;
8826 + int ret;
8827 DECLARE_MAC_BUF(mac);
8828
8829 dev = alloc_etherdev(sizeof(struct at91_private));
8830 if (!dev)
8831 return -ENOMEM;
8832
8833 - dev->base_addr = AT91_VA_BASE_EMAC;
8834 - dev->irq = AT91RM9200_ID_EMAC;
8835 + /* Get I/O base address and IRQ */
8836 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
8837 + if (!res) {
8838 + free_netdev(dev);
8839 + return -ENODEV;
8840 + }
8841 + dev->base_addr = res->start;
8842 + dev->irq = platform_get_irq(pdev, 0);
8843
8844 /* Install the interrupt handler */
8845 if (request_irq(dev->irq, at91ether_interrupt, 0, dev->name, dev)) {
8846 @@ -1043,7 +1048,9 @@
8847 } else if (machine_is_csb337()) {
8848 /* mix link activity status into LED2 link state */
8849 write_phy(phy_address, MII_LEDCTRL_REG, 0x0d22);
8850 - }
8851 + } else if (machine_is_ecbat91())
8852 + write_phy(phy_address, MII_LEDCTRL_REG, 0x156A);
8853 +
8854 disable_mdi();
8855 spin_unlock_irq(&lp->lock);
8856
8857 @@ -1058,12 +1065,12 @@
8858 lp->phy_address = phy_address; /* MDI address of PHY */
8859
8860 /* Register the network interface */
8861 - res = register_netdev(dev);
8862 - if (res) {
8863 + ret = register_netdev(dev);
8864 + if (ret) {
8865 free_irq(dev->irq, dev);
8866 free_netdev(dev);
8867 dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys);
8868 - return res;
8869 + return ret;
8870 }
8871
8872 /* Determine current link speed */
8873 @@ -1101,6 +1108,8 @@
8874 printk(KERN_INFO "%s: National Semiconductor DP83848 PHY\n", dev->name);
8875 else if (phy_type == MII_AC101L_ID)
8876 printk(KERN_INFO "%s: Altima AC101L PHY\n", dev->name);
8877 + else if (phy_type == MII_KSZ8041_ID)
8878 + printk(KERN_INFO "%s: Micrel KSZ8041 PHY\n", dev->name);
8879 else if (phy_type == MII_KS8721_ID)
8880 printk(KERN_INFO "%s: Micrel KS8721 PHY\n", dev->name);
8881 else if (phy_type == MII_T78Q21x3_ID)
8882 @@ -1146,6 +1155,7 @@
8883 case MII_DP83847_ID: /* National Semiconductor DP83847: */
8884 case MII_DP83848_ID: /* National Semiconductor DP83848: */
8885 case MII_AC101L_ID: /* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */
8886 + case MII_KSZ8041_ID: /* Micrel KSZ8041: PHY_ID1 = 0x22, PHY_ID2 = 0x1512 */
8887 case MII_KS8721_ID: /* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */
8888 case MII_T78Q21x3_ID: /* Teridian 78Q21x3: PHY_ID1 = 0x0E, PHY_ID2 = 7237 */
8889 case MII_LAN83C185_ID: /* SMSC LAN83C185: PHY_ID1 = 0x0007, PHY_ID2 = 0xC0A1 */
8890 @@ -1246,3 +1256,4 @@
8891 MODULE_LICENSE("GPL");
8892 MODULE_DESCRIPTION("AT91RM9200 EMAC Ethernet driver");
8893 MODULE_AUTHOR("Andrew Victor");
8894 +MODULE_ALIAS("platform:" DRV_NAME);
8895 diff -urN -x CVS linux-2.6.25/drivers/net/arm/at91_ether.h linux-2.6/drivers/net/arm/at91_ether.h
8896 --- linux-2.6.25/drivers/net/arm/at91_ether.h 2007-10-09 22:31:38.000000000 +0200
8897 +++ linux-2.6/drivers/net/arm/at91_ether.h 2008-05-08 21:47:31.000000000 +0200
8898 @@ -48,6 +48,9 @@
8899 /* Altima AC101L PHY */
8900 #define MII_AC101L_ID 0x00225520
8901
8902 +/* Micrel KSZ8041 PHY */
8903 +#define MII_KSZ8041_ID 0x00221510
8904 +
8905 /* Micrel KS8721 PHY */
8906 #define MII_KS8721_ID 0x00221610
8907
8908 @@ -84,7 +87,6 @@
8909
8910 struct at91_private
8911 {
8912 - struct net_device_stats stats;
8913 struct mii_if_info mii; /* ethtool support */
8914 struct at91_eth_data board_data; /* board-specific configuration */
8915 struct clk *ether_clk; /* clock */
8916 diff -urN -x CVS linux-2.6.25/drivers/net/arm/ks8695_ether.c linux-2.6/drivers/net/arm/ks8695_ether.c
8917 --- linux-2.6.25/drivers/net/arm/ks8695_ether.c 1970-01-01 02:00:00.000000000 +0200
8918 +++ linux-2.6/drivers/net/arm/ks8695_ether.c 2008-05-08 21:52:35.000000000 +0200
8919 @@ -0,0 +1,1009 @@
8920 +/*
8921 + * Ethernet driver for the Kendin/Micrel KS8695.
8922 + *
8923 + * Copyright (C) 2006 Andrew Victor
8924 + *
8925 + * This program is free software; you can redistribute it and/or
8926 + * modify it under the terms of the GNU General Public License
8927 + * as published by the Free Software Foundation; either version
8928 + * 2 of the License, or (at your option) any later version.
8929 + */
8930 +
8931 +#include <linux/module.h>
8932 +#include <linux/init.h>
8933 +#include <linux/mii.h>
8934 +#include <linux/netdevice.h>
8935 +#include <linux/etherdevice.h>
8936 +#include <linux/skbuff.h>
8937 +#include <linux/dma-mapping.h>
8938 +#include <linux/delay.h>
8939 +#include <linux/ethtool.h>
8940 +#include <linux/platform_device.h>
8941 +
8942 +#include <asm/io.h>
8943 +#include <asm/mach/irq.h>
8944 +#include <asm/uaccess.h>
8945 +#include <asm/arch/regs-wan.h>
8946 +#include <asm/arch/regs-lan.h>
8947 +#include <asm/arch/regs-hpna.h>
8948 +#include <asm/arch/regs-switch.h>
8949 +#include <asm/arch/regs-misc.h>
8950 +
8951 +#include <asm/arch/regs-irq.h>
8952 +
8953 +#include "ks8695_ether.h"
8954 +
8955 +
8956 +#define DRV_NAME "ks8695_ether"
8957 +#define DRV_VERSION "0.01"
8958 +
8959 +/* ..................................................................... */
8960 +
8961 +static inline unsigned long ks8695_read(struct net_device *dev, unsigned int reg)
8962 +{
8963 + return __raw_readl(dev->base_addr + reg);
8964 +}
8965 +
8966 +static inline void ks8695_write(struct net_device *dev, unsigned int reg, unsigned long value)
8967 +{
8968 + __raw_writel(value, dev->base_addr + reg);
8969 +}
8970 +
8971 +
8972 +/* ......................... ADDRESS MANAGEMENT ........................ */
8973 +
8974 +#define KS8695_NR_ADDRESSES 16
8975 +
8976 +/*
8977 + * Add the specified multicast addresses to the Additional Station
8978 + * Address registers.
8979 + */
8980 +static void ks8695_set_mcast_address(struct net_device *dev, struct dev_mc_list *addr, int nr_addr)
8981 +{
8982 + unsigned long low, high;
8983 + int i;
8984 +
8985 + /* Set multicast addresses in Additional Station Address registers */
8986 + for (i = 0; i < nr_addr; i++, addr = addr->next) {
8987 + if (!addr) break; /* unexpected end of list */
8988 + else if (i == KS8695_NR_ADDRESSES) break; /* too many addresses */
8989 +
8990 + low = (addr->dmi_addr[2] << 24) | (addr->dmi_addr[3] << 16) | (addr->dmi_addr[4] << 8) | (addr->dmi_addr[5]);
8991 + high = (addr->dmi_addr[0] << 8) | (addr->dmi_addr[1]);
8992 +
8993 + ks8695_write(dev, KS8695_WMAAL_(i), low);
8994 + ks8695_write(dev, KS8695_WMAAH_(i), WMAAH_E | high);
8995 + }
8996 +
8997 + /* Clear the remaining Additional Station Addresses */
8998 + for (; i < KS8695_NR_ADDRESSES; i++) {
8999 + ks8695_write(dev, KS8695_WMAAL_(i), 0);
9000 + ks8695_write(dev, KS8695_WMAAH_(i), 0);
9001 + }
9002 +}
9003 +
9004 +/*
9005 + * Enable/Disable promiscuous and multicast modes.
9006 + */
9007 +static void ks8695eth_set_multi(struct net_device *dev)
9008 +{
9009 + unsigned long ctrl;
9010 +
9011 + ctrl = ks8695_read(dev, KS8695_WMDRXC);
9012 +
9013 + if (dev->flags & IFF_PROMISC) /* enable promiscuous mode */
9014 + ctrl |= WMDRXC_WMRA;
9015 + else if (dev->flags & ~IFF_PROMISC) /* disable promiscuous mode */
9016 + ctrl &= ~WMDRXC_WMRA;
9017 +
9018 + if (dev->flags & IFF_ALLMULTI) /* enable all multicast mode */
9019 + ctrl |= WMDRXC_WMRM;
9020 + else if (dev->mc_count > KS8695_NR_ADDRESSES) /* more specific multicast addresses than can be handled in hardware */
9021 + ctrl |= WMDRXC_WMRM;
9022 + else if (dev->mc_count > 0) { /* enable specific multicasts */
9023 + ctrl &= ~WMDRXC_WMRM;
9024 + ks8695_set_mcast_address(dev, dev->mc_list, dev->mc_count);
9025 + }
9026 + else if (dev->flags & ~IFF_ALLMULTI) { /* disable multicast mode */
9027 + ctrl &= ~WMDRXC_WMRM;
9028 + ks8695_set_mcast_address(dev, NULL, 0);
9029 + }
9030 +
9031 + ks8695_write(dev, KS8695_WMDRXC, ctrl);
9032 +}
9033 +
9034 +/*
9035 + * Program the hardware MAC address from dev->dev_addr.
9036 + */
9037 +static void update_mac_address(struct net_device *dev)
9038 +{
9039 + unsigned long low, high;
9040 +
9041 + low = (dev->dev_addr[2] << 24) | (dev->dev_addr[3] << 16) | (dev->dev_addr[4] << 8) | (dev->dev_addr[5]);
9042 + high = (dev->dev_addr[0] << 8) | (dev->dev_addr[1]);
9043 +
9044 + ks8695_write(dev, KS8695_WMAL, low);
9045 + ks8695_write(dev, KS8695_WMAH, high);
9046 +}
9047 +
9048 +/*
9049 + * Store the new hardware address in dev->dev_addr, and update the MAC.
9050 + */
9051 +static int ks8695eth_set_mac(struct net_device *dev, void* addr)
9052 +{
9053 + struct sockaddr *address = addr;
9054 + DECLARE_MAC_BUF(mac);
9055 +
9056 + if (!is_valid_ether_addr(address->sa_data))
9057 + return -EADDRNOTAVAIL;
9058 +
9059 + memcpy(dev->dev_addr, address->sa_data, dev->addr_len);
9060 + update_mac_address(dev);
9061 +
9062 + printk("%s: Setting MAC address to %s\n", dev->name, print_mac(mac, dev->dev_addr));
9063 +
9064 + return 0;
9065 +}
9066 +
9067 +/*
9068 + * Retrieve the MAC address set by the bootloader.
9069 + */
9070 +static void __init get_mac_address(struct net_device *dev)
9071 +{
9072 + unsigned char addr[6];
9073 + unsigned long low, high;
9074 +
9075 + low = ks8695_read(dev, KS8695_WMAL);
9076 + high = ks8695_read(dev, KS8695_WMAH);
9077 +
9078 + addr[0] = (high & 0xff00) >> 8;
9079 + addr[1] = (high & 0xff);
9080 + addr[2] = (low & 0xff000000) >> 24;
9081 + addr[3] = (low & 0xff0000) >> 16;
9082 + addr[4] = (low & 0xff00) >> 8;
9083 + addr[5] = (low & 0xff);
9084 +
9085 + if (is_valid_ether_addr(addr))
9086 + memcpy(dev->dev_addr, &addr, 6);
9087 +}
9088 +
9089 +
9090 +/* ......................... ETHTOOL SUPPORT ........................... */
9091 +
9092 +/*
9093 + * Get device-specific settings.
9094 + */
9095 +static int ks8695eth_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
9096 +{
9097 + unsigned long ctrl;
9098 +
9099 + /* the defaults for all ports */
9100 + cmd->supported = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full
9101 + | SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full
9102 + | SUPPORTED_TP | SUPPORTED_MII;
9103 + cmd->advertising = ADVERTISED_TP | ADVERTISED_MII;
9104 + cmd->port = PORT_MII;
9105 + cmd->transceiver = XCVR_INTERNAL;
9106 +
9107 + if (dev->base_addr == KS8695_HPNA_VA) {
9108 + cmd->phy_address = 0;
9109 + cmd->autoneg = AUTONEG_DISABLE; /* not supported for HPNA */
9110 +
9111 + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_HMC);
9112 + cmd->speed = (ctrl & HMC_HSS) ? SPEED_100 : SPEED_10;
9113 + cmd->duplex = (ctrl & HMC_HDS) ? DUPLEX_FULL : DUPLEX_HALF;
9114 + }
9115 + else if (dev->base_addr == KS8695_WAN_VA) {
9116 + cmd->supported |= (SUPPORTED_Autoneg | SUPPORTED_Pause);
9117 + cmd->phy_address = 0;
9118 +
9119 + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC);
9120 + if ((ctrl & WMC_WAND) == 0) { /* auto-negotiation is enabled */
9121 + cmd->advertising |= ADVERTISED_Autoneg;
9122 + if (ctrl & WMC_WANA100F)
9123 + cmd->advertising |= ADVERTISED_100baseT_Full;
9124 + if (ctrl & WMC_WANA100H)
9125 + cmd->advertising |= ADVERTISED_100baseT_Half;
9126 + if (ctrl & WMC_WANA10F)
9127 + cmd->advertising |= ADVERTISED_10baseT_Full;
9128 + if (ctrl & WMC_WANA10H)
9129 + cmd->advertising |= ADVERTISED_10baseT_Half;
9130 + if (ctrl & WMC_WANAP)
9131 + cmd->advertising |= ADVERTISED_Pause;
9132 + cmd->autoneg = AUTONEG_ENABLE;
9133 +
9134 + cmd->speed = (ctrl & WMC_WSS) ? SPEED_100 : SPEED_10;
9135 + cmd->duplex = (ctrl & WMC_WDS) ? DUPLEX_FULL : DUPLEX_HALF;
9136 + }
9137 + else { /* auto-negotiation is disabled */
9138 + cmd->autoneg = AUTONEG_DISABLE;
9139 +
9140 + cmd->speed = (ctrl & WMC_WANF100) ? SPEED_100 : SPEED_10;
9141 + cmd->duplex = (ctrl & WMC_WANFF) ? DUPLEX_FULL : DUPLEX_HALF;
9142 + }
9143 + }
9144 + else if (dev->base_addr == KS8695_LAN_VA) {
9145 + // TODO: Implement for Switch ports
9146 + }
9147 +
9148 + return 0;
9149 +}
9150 +
9151 +/*
9152 + * Set device-specific settings.
9153 + */
9154 +static int ks8695eth_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
9155 +{
9156 + unsigned long ctrl;
9157 +
9158 + if ((cmd->speed != SPEED_10) && (cmd->speed != SPEED_100))
9159 + return -EINVAL;
9160 + if ((cmd->duplex != DUPLEX_HALF) && (cmd->duplex != DUPLEX_FULL))
9161 + return -EINVAL;
9162 + if (cmd->port != PORT_MII)
9163 + return -EINVAL;
9164 + if (cmd->transceiver != XCVR_INTERNAL)
9165 + return -EINVAL;
9166 + if ((cmd->autoneg != AUTONEG_DISABLE) && (cmd->autoneg != AUTONEG_ENABLE))
9167 + return -EINVAL;
9168 +
9169 + if (cmd->autoneg == AUTONEG_ENABLE) {
9170 + if ((cmd->advertising & (ADVERTISED_10baseT_Half |
9171 + ADVERTISED_10baseT_Full |
9172 + ADVERTISED_100baseT_Half |
9173 + ADVERTISED_100baseT_Full)) == 0)
9174 + return -EINVAL;
9175 +
9176 + if (dev->base_addr == KS8695_HPNA_VA)
9177 + return -EINVAL; /* HPNA does not support auto-negotiation. */
9178 + else if (dev->base_addr == KS8695_WAN_VA) {
9179 + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC);
9180 +
9181 + ctrl &= ~(WMC_WAND | WMC_WANA100F | WMC_WANA100H | WMC_WANA10F | WMC_WANA10H);
9182 + if (cmd->advertising & ADVERTISED_100baseT_Full)
9183 + ctrl |= WMC_WANA100F;
9184 + if (cmd->advertising & ADVERTISED_100baseT_Half)
9185 + ctrl |= WMC_WANA100H;
9186 + if (cmd->advertising & ADVERTISED_10baseT_Full)
9187 + ctrl |= WMC_WANA10F;
9188 + if (cmd->advertising & ADVERTISED_10baseT_Half)
9189 + ctrl |= WMC_WANA10H;
9190 +
9191 + ctrl |= WMC_WANR; /* force a re-negotiation */
9192 + __raw_writel(ctrl, KS8695_MISC_VA + KS8695_WMC);
9193 + }
9194 + else if (dev->base_addr == KS8695_LAN_VA) {
9195 + // TODO: Implement for Switch ports
9196 + }
9197 +
9198 + }
9199 + else {
9200 + if (dev->base_addr == KS8695_HPNA_VA) {
9201 + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_HMC);
9202 +
9203 + ctrl &= ~(HMC_HSS | HMC_HDS);
9204 + if (cmd->speed == SPEED_100)
9205 + ctrl |= HMC_HSS;
9206 + if (cmd->duplex == DUPLEX_FULL)
9207 + ctrl |= HMC_HDS;
9208 +
9209 + __raw_writel(ctrl, KS8695_MISC_VA + KS8695_HMC);
9210 + }
9211 + else if (dev->base_addr == KS8695_WAN_VA) {
9212 + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC);
9213 +
9214 + ctrl |= WMC_WAND; /* disable auto-negotiation */
9215 + ctrl &= ~(WMC_WANF100 | WMC_WANFF);
9216 + if (cmd->speed == SPEED_100)
9217 + ctrl |= WMC_WANF100;
9218 + if (cmd->duplex == DUPLEX_FULL)
9219 + ctrl |= WMC_WANFF;
9220 +
9221 + __raw_writel(ctrl, KS8695_MISC_VA + KS8695_WMC);
9222 + }
9223 + else if (dev->base_addr == KS8695_LAN_VA) {
9224 + // TODO: Implement for Switch ports
9225 + }
9226 + }
9227 +
9228 + return 0;
9229 +}
9230 +
9231 +/*
9232 + * Restart the auto-negotiation.
9233 + */
9234 +static int ks8695eth_nwayreset(struct net_device *dev)
9235 +{
9236 + unsigned long ctrl;
9237 +
9238 + if (dev->base_addr == KS8695_HPNA_VA) /* HPNA has no auto-negotiation */
9239 + return -EINVAL;
9240 + else if (dev->base_addr == KS8695_WAN_VA) {
9241 + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC);
9242 +
9243 + if ((ctrl & WMC_WAND) == 0)
9244 + __raw_writel(ctrl | WMC_WANR, KS8695_MISC_VA + KS8695_WMC);
9245 + else
9246 + return -EINVAL; /* auto-negitiation not enabled */
9247 + }
9248 + else if (dev->base_addr == KS8695_LAN_VA) {
9249 + // TODO: Implement for Switch ports
9250 + }
9251 +
9252 + return 0;
9253 +}
9254 +
9255 +static void ks8695eth_get_pause(struct net_device *dev, struct ethtool_pauseparam *param)
9256 +{
9257 + unsigned long ctrl;
9258 +
9259 + if (dev->base_addr == KS8695_HPNA_VA)
9260 + return;
9261 + else if (dev->base_addr == KS8695_WAN_VA) {
9262 + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC); /* advertise Pause */
9263 + param->autoneg = (ctrl & WMC_WANAP);
9264 +
9265 + ctrl = ks8695_read(dev, KS8695_WMDRXC); /* current Tx Flow-control */
9266 + param->rx_pause = (ctrl & WMDRXC_WMRFCE);
9267 +
9268 + ctrl = ks8695_read(dev, KS8695_WMDRXC); /* current Rx Flow-control */
9269 + param->tx_pause = (ctrl & WMDTXC_WMTFCE);
9270 + }
9271 + else if (dev->base_addr == KS8695_LAN_VA) {
9272 + // TODO: Implement for Switch ports
9273 + }
9274 +}
9275 +
9276 +static int ks8695eth_set_pause(struct net_device *dev, struct ethtool_pauseparam *param)
9277 +{
9278 + // TODO.
9279 +
9280 + return 0;
9281 +}
9282 +
9283 +static u32 ks8695eth_get_link(struct net_device *dev)
9284 +{
9285 + unsigned long ctrl;
9286 +
9287 + if (dev->base_addr == KS8695_HPNA_VA)
9288 + return 1; /* HPNA always has link */
9289 + else if (dev->base_addr == KS8695_WAN_VA) {
9290 + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC);
9291 + return (ctrl & WMC_WLS);
9292 + }
9293 + else if (dev->base_addr == KS8695_LAN_VA) {
9294 + // TODO: Implement for Switch ports
9295 + }
9296 +
9297 + return 0;
9298 +}
9299 +
9300 +/*
9301 + * Report driver information.
9302 + */
9303 +static void ks8695eth_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
9304 +{
9305 + strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
9306 + strlcpy(info->version, DRV_VERSION, sizeof(info->version));
9307 + strlcpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
9308 +}
9309 +
9310 +static struct ethtool_ops ks8695eth_ethtool_ops = {
9311 + .get_settings = ks8695eth_get_settings,
9312 + .set_settings = ks8695eth_set_settings,
9313 + .get_drvinfo = ks8695eth_get_drvinfo,
9314 + .nway_reset = ks8695eth_nwayreset,
9315 + .get_pauseparam = ks8695eth_get_pause,
9316 + .set_pauseparam = ks8695eth_set_pause,
9317 + .get_link = ks8695eth_get_link,
9318 +};
9319 +
9320 +
9321 +/* ................................ MAC ................................ */
9322 +
9323 +/*
9324 + * Setup the RX DMA descriptors, and enable and start the DMA receiver.
9325 + */
9326 +static void ks8695eth_start_rx(struct net_device *dev)
9327 +{
9328 + struct ks8695eth_priv *lp = (struct ks8695eth_priv *) dev->priv;
9329 + unsigned long ctrl;
9330 + int i;
9331 +
9332 + /* Setup the DMA descriptors */
9333 + for (i = 0; i < MAX_RX_DESC; i++) {
9334 + lp->rxdma[i].length = MAX_RXBUF_SIZE;
9335 + lp->rxdma[i].addr = (unsigned long) lp->rxSkb[i].dma;
9336 + lp->rxdma[i].next = (unsigned long) lp->rxdma_phys + (sizeof(struct rx_descriptor) * (i+1));
9337 + lp->rxdma[i].status = RDES_OWN;
9338 + }
9339 +
9340 + /* Create ring of DMA descriptors */
9341 + lp->rxdma[MAX_RX_DESC-1].next = (unsigned long) lp->rxdma_phys; /* phys address of 1st descriptor */
9342 +
9343 + /* Reset receive index (since hardware was reset) */
9344 + lp->rx_idx = 0;
9345 +
9346 + /* Program address of 1st descriptor in KS8695 */
9347 + ks8695_write(dev, KS8695_WRDLB, (unsigned long) lp->rxdma_phys);
9348 +
9349 + /* Enable and start the DMA Receiver */
9350 + ctrl = ks8695_read(dev, KS8695_WMDRXC);
9351 + ks8695_write(dev, KS8695_WMDRXC, ctrl | WMDRXC_WMRE);
9352 + ks8695_write(dev, KS8695_WMDRSC, 0);
9353 +}
9354 +
9355 +/*
9356 + * Stop the DMA receiver.
9357 + */
9358 +static void ks8695eth_stop_rx(struct net_device *dev)
9359 +{
9360 + unsigned long ctrl;
9361 +
9362 + /* Disable receive DMA */
9363 + ctrl = ks8695_read(dev, KS8695_WMDRXC);
9364 + ks8695_write(dev, KS8695_WMDRXC, ctrl & ~WMDRXC_WMRE);
9365 +}
9366 +
9367 +/*
9368 + * Setup the TX DMA descriptors, and enable DMA transmitter.
9369 + */
9370 +static void ks8695eth_start_tx(struct net_device *dev)
9371 +{
9372 + struct ks8695eth_priv *lp = (struct ks8695eth_priv *) dev->priv;
9373 + unsigned long ctrl;
9374 + int i;
9375 +
9376 + /* Setup the DMA descriptors */
9377 + for (i = 0; i < MAX_TX_DESC; i++) {
9378 + lp->txdma[i].ownership = 0;
9379 + lp->txdma[i].status = 0;
9380 + lp->txdma[i].addr = 0;
9381 + lp->txdma[i].next = (unsigned long) lp->txdma_phys + (sizeof(struct tx_descriptor) * (i+1));
9382 + }
9383 +
9384 + /* Create ring of DMA descriptors */
9385 + lp->txdma[MAX_TX_DESC-1].next = (unsigned long) lp->txdma_phys; /* phys address of 1st desc */
9386 +
9387 + /* Reset transmit indexes (since hardware was reset) */
9388 + lp->tx_head = 0;
9389 + lp->tx_tail = 0;
9390 +
9391 + /* Program address of 1st descriptor in KS8695 */
9392 + ks8695_write(dev, KS8695_WTDLB, (unsigned long) lp->txdma_phys);
9393 +
9394 + /* Enable the DMA transmitter (will be started on first packet) */
9395 + ctrl = ks8695_read(dev, KS8695_WMDTXC);
9396 + ks8695_write(dev, KS8695_WMDTXC, ctrl | WMDTXC_WMTE);
9397 +}
9398 +
9399 +/*
9400 + * Stop the DMA transmitter.
9401 + */
9402 +static void ks8695eth_stop_tx(struct net_device *dev)
9403 +{
9404 + struct ks8695eth_priv *lp = (struct ks8695eth_priv *) dev->priv;
9405 + unsigned long ctrl;
9406 + int i;
9407 +
9408 + /* Disable transmit DMA */
9409 + ctrl = ks8695_read(dev, KS8695_WMDTXC);
9410 + ks8695_write(dev, KS8695_WMDTXC, ctrl & ~WMDTXC_WMTE);
9411 +
9412 + /* Clear any pending skb's still on transmit queue */
9413 + for (i = 0; i < MAX_TX_DESC; i++) {
9414 + lp->txdma[i].ownership = 0;
9415 + lp->txdma[i].status = 0;
9416 + lp->txdma[i].addr = 0;
9417 +
9418 + if (lp->txSkb[i].skb) {
9419 + dma_unmap_single(lp->dev, lp->txSkb[i].dma, lp->txSkb[i].length, DMA_TO_DEVICE);
9420 + dev_kfree_skb_irq(lp->txSkb[i].skb);
9421 + lp->txSkb[i].skb = NULL;
9422 + }
9423 + }
9424 +}
9425 +
9426 +/*
9427 + * Reset the MAC hardware.
9428 + */
9429 +static void ks8695eth_hw_reset(struct net_device *dev)
9430 +{
9431 + /* Perform hardware reset */
9432 + ks8695_write(dev, KS8695_WMDTXC, WMDTXC_WMTRST);
9433 + while (ks8695_read(dev, KS8695_WMDTXC) & WMDTXC_WMTRST) { barrier(); }
9434 +
9435 + /* Initialize the hardware */
9436 + ks8695_write(dev, KS8695_WMDRXC, WMDRXC_WMRU | WMDRXC_WMRB); /* RX: receive Unicast & Broadcast */
9437 + ks8695_write(dev, KS8695_WMDTXC, WMDTXC_WMTEP | WMDTXC_WMTAC); /* TX: add Padding & CRC */
9438 +
9439 + // TODO: Can set Rx/Tx PBL: (Micrel using 8)
9440 + // TODO: Enable hardware checksumming.
9441 + // TODO: Enable Rx/Tx flow-control
9442 +}
9443 +
9444 +/*
9445 + * Enable or Disable the IRQs associated with a network interface.
9446 + */
9447 +static void ks8695eth_set_irq(struct net_device *dev, short enable)
9448 +{
9449 + struct ks8695eth_priv *lp = (struct ks8695eth_priv *) dev->priv;
9450 + int i;
9451 +
9452 + for (i = 0; i < NR_IRQS; i++) {
9453 + if (lp->irqs & (1 << i)) {
9454 + if (enable)
9455 + enable_irq(i);
9456 + else
9457 + disable_irq(i);
9458 + }
9459 + }
9460 +}
9461 +
9462 +/*
9463 + * Open the ethernet interface.
9464 + */
9465 +static int ks8695eth_open(struct net_device *dev)
9466 +{
9467 + if (!is_valid_ether_addr(dev->dev_addr))
9468 + return -EADDRNOTAVAIL;
9469 +
9470 + /* MUST reset hardware in _open() */
9471 + ks8695eth_hw_reset(dev);
9472 +
9473 + /* Update the MAC address (incase user has changed it) */
9474 + update_mac_address(dev);
9475 +
9476 + /* Start DMA */
9477 + ks8695eth_start_tx(dev);
9478 + ks8695eth_start_rx(dev);
9479 +
9480 + /* Enable interrupts */
9481 + ks8695eth_set_irq(dev, 1);
9482 +
9483 + netif_start_queue(dev);
9484 + return 0;
9485 +}
9486 +
9487 +/*
9488 + * Close the ethernet interface.
9489 + */
9490 +static int ks8695eth_close(struct net_device *dev)
9491 +{
9492 + /* Stop DMA */
9493 + ks8695eth_stop_rx(dev);
9494 + ks8695eth_stop_tx(dev);
9495 +
9496 + /* Disable interrupts */
9497 + ks8695eth_set_irq(dev, 0);
9498 +
9499 + netif_stop_queue(dev);
9500 + return 0;
9501 +}
9502 +
9503 +/*
9504 + * Return the current statistics.
9505 + */
9506 +static struct net_device_stats *ks8695eth_stats(struct net_device *dev)
9507 +{
9508 + return &dev->stats;
9509 +}
9510 +
9511 +/*
9512 + * Queue a packet for transmission in next TX DMA descriptor.
9513 + */
9514 +static int ks8695eth_xmit_frame(struct sk_buff *skb, struct net_device *dev)
9515 +{
9516 + struct ks8695eth_priv *lp = (struct ks8695eth_priv *) dev->priv;
9517 + int i;
9518 +
9519 + /* Packets are added to head of array */
9520 + i = lp->tx_head;
9521 +
9522 + /* Store packet information */
9523 + lp->txSkb[i].skb = skb;
9524 + lp->txSkb[i].length = skb->len;
9525 + lp->txSkb[i].dma = dma_map_single(lp->dev, skb->data, skb->len, DMA_TO_DEVICE);
9526 +
9527 + spin_lock_irq(&lp->tx_lock);
9528 +
9529 + /* Set Tx descriptor information */
9530 + lp->txdma[i].addr = lp->txSkb[i].dma;
9531 + lp->txdma[i].status = TDES_IC | TDES_FS | TDES_LS | (lp->txSkb[i].length & TDES_TBS);
9532 + lp->txdma[i].ownership = TDES_OWN;
9533 +
9534 + /* Start the DMA transmitter (if necessary) */
9535 + ks8695_write(dev, KS8695_WMDTSC, 0);
9536 +
9537 + lp->tx_head = (lp->tx_head + 1) % MAX_TX_DESC;
9538 + if (lp->tx_head == lp->tx_tail) /* no more descriptors */
9539 + netif_stop_queue(dev);
9540 +
9541 + spin_unlock_irq(&lp->tx_lock);
9542 +
9543 + dev->trans_start = jiffies;
9544 + return 0;
9545 +}
9546 +
9547 +/* ..................................................................... */
9548 +
9549 +/*
9550 + * The link state of the WAN port has changed.
9551 + * (Called from interrupt context)
9552 + */
9553 +static void ks8695eth_wan_link(struct net_device *dev)
9554 +{
9555 + unsigned long ctrl;
9556 +
9557 + ctrl = __raw_readl(KS8695_MISC_VA + KS8695_WMC);
9558 + if (ctrl & WMC_WLS) {
9559 + netif_carrier_on(dev);
9560 + printk(KERN_INFO "%s: Link is now %s-%s\n", dev->name,
9561 + (ctrl & WMC_WSS) ? "100" : "10",
9562 + (ctrl & WMC_WDS) ? "FullDuplex" : "HalfDuplex");
9563 + }
9564 + else {
9565 + netif_carrier_off(dev);
9566 + printk(KERN_INFO "%s: Link down.\n", dev->name);
9567 + }
9568 +}
9569 +
9570 +/* ..................................................................... */
9571 +
9572 +/*
9573 + * A frame has been received. Exteract from buffer descriptor and deliver to
9574 + * upper layers.
9575 + * (Called from interrupt context)
9576 + */
9577 +static void ks8695eth_rx_interrupt(struct net_device *dev)
9578 +{
9579 + struct ks8695eth_priv *lp = (struct ks8695eth_priv *) dev->priv;
9580 + struct sk_buff *skb;
9581 + unsigned long flags;
9582 + unsigned int pktlen;
9583 +
9584 + while (!(lp->rxdma[lp->rx_idx].status & RDES_OWN)) {
9585 + flags = lp->rxdma[lp->rx_idx].status;
9586 +
9587 + if ((flags & (RDES_FS | RDES_LS)) != (RDES_FS | RDES_LS)) {
9588 + printk(KERN_ERR "%s: Spanning packet detected\n", dev->name);
9589 + goto rx_complete;
9590 + }
9591 +
9592 + /* handle errors */
9593 + if (flags & (RDES_ES | RDES_RE)) {
9594 + dev->stats.rx_errors++;
9595 +
9596 + if (flags & RDES_TL) /* Frame too long */
9597 + dev->stats.rx_length_errors++;
9598 + else if (flags & RDES_RF) /* Runt frame */
9599 + dev->stats.rx_length_errors++;
9600 + else if (flags & RDES_CE) /* CRC error */
9601 + dev->stats.rx_crc_errors++;
9602 + else if (flags & RDES_RE) /* MII error */
9603 + dev->stats.rx_missed_errors++;
9604 + // TODO: If hardware checksumming, then check IP/TCP/UDP errors.
9605 +
9606 + goto rx_complete;
9607 + }
9608 +
9609 + pktlen = flags & RDES_FLEN;
9610 + pktlen = pktlen - 4; /* remove CRC */
9611 +
9612 + // OLD CALL: consistent_sync(lp->rxSkb[lp->rx_idx].skb->data, MAX_RXBUF_SIZE, DMA_FROM_DEVICE);
9613 + dma_sync_single_for_cpu(lp->dev, lp->rxSkb[lp->rx_idx].dma, MAX_RXBUF_SIZE, DMA_FROM_DEVICE);
9614 +
9615 + skb = dev_alloc_skb(pktlen+2); /* +2 to align IP header */
9616 + if (!skb) {
9617 + dev->stats.rx_dropped++;
9618 + printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
9619 + goto rx_complete;
9620 + }
9621 +
9622 + skb_reserve(skb, 2); /* align IP header */
9623 + memcpy(skb_put(skb, pktlen), lp->rxSkb[lp->rx_idx].skb->data, pktlen);
9624 +
9625 + skb->protocol = eth_type_trans(skb, dev);
9626 + netif_rx(skb);
9627 +
9628 + /* update statistics */
9629 + dev->stats.rx_packets++;
9630 + dev->stats.rx_bytes += pktlen;
9631 + if (flags & RDES_MF)
9632 + dev->stats.multicast++;
9633 + dev->last_rx = jiffies;
9634 +
9635 +rx_complete:
9636 + lp->rxdma[lp->rx_idx].status = RDES_OWN; /* reset ownership bit */
9637 +
9638 + lp->rx_idx = (lp->rx_idx + 1) % MAX_RX_DESC; /* next descriptor */
9639 + }
9640 +
9641 + /* restart DMA receiver incase it was suspended */
9642 + ks8695_write(dev, KS8695_WMDRSC, 0);
9643 +}
9644 +
9645 +/*
9646 + * A packet has been transmitted.
9647 + * (Called from interrupt context)
9648 + */
9649 +static void ks8695eth_tx_interrupt(struct net_device *dev)
9650 +{
9651 + struct ks8695eth_priv *lp = (struct ks8695eth_priv *) dev->priv;
9652 + int i;
9653 +
9654 + /* Packets are removed from tail of array */
9655 + i = lp->tx_tail;
9656 +
9657 + // TODO: Loop through multiple times?
9658 +
9659 + if (lp->txSkb[i].skb) {
9660 + /* update statistics */
9661 + dev->stats.tx_packets++;
9662 + dev->stats.tx_bytes += lp->txSkb[i].length;
9663 +
9664 + /* free packet */
9665 + dma_unmap_single(lp->dev, lp->txSkb[i].dma, lp->txSkb[i].length, DMA_TO_DEVICE);
9666 + dev_kfree_skb_irq(lp->txSkb[i].skb);
9667 + lp->txSkb[i].skb = NULL;
9668 +
9669 + /* Not necessary to clear descriptor since we still own it */
9670 + }
9671 +
9672 + lp->tx_tail = (lp->tx_tail + 1) % MAX_TX_DESC;
9673 +
9674 + netif_wake_queue(dev);
9675 +}
9676 +
9677 +/*
9678 + * MAC interrupt handler
9679 + */
9680 +static irqreturn_t ks8695eth_interrupt(int irq, void *dev_id)
9681 +{
9682 + struct net_device *dev = (struct net_device *) dev_id;
9683 +
9684 + switch (irq) {
9685 + case KS8695_IRQ_LAN_RX_STATUS:
9686 + case KS8695_IRQ_HPNA_RX_STATUS:
9687 + case KS8695_IRQ_WAN_RX_STATUS:
9688 + ks8695eth_rx_interrupt(dev);
9689 + return IRQ_HANDLED;
9690 +
9691 + case KS8695_IRQ_LAN_TX_STATUS:
9692 + case KS8695_IRQ_HPNA_TX_STATUS:
9693 + case KS8695_IRQ_WAN_TX_STATUS:
9694 + ks8695eth_tx_interrupt(dev);
9695 + return IRQ_HANDLED;
9696 +
9697 + case KS8695_IRQ_WAN_LINK:
9698 + ks8695eth_wan_link(dev);
9699 + return IRQ_HANDLED;
9700 +
9701 + default:
9702 + return IRQ_NONE;
9703 + }
9704 +}
9705 +
9706 +
9707 +/* ..................................................................... */
9708 +
9709 +/*
9710 + * Initialize the WAN hardware to known defaults.
9711 + */
9712 +static void __init ks8695eth_init_wan(void)
9713 +{
9714 + unsigned long ctrl;
9715 +
9716 + /* Support auto-negotiation */
9717 + ctrl = WMC_WANAP | WMC_WANA100F | WMC_WANA100H | WMC_WANA10F | WMC_WANA10H;
9718 +
9719 + /* LED0 = Activity , LED1 = Link */
9720 + ctrl |= (WLED0S_ACTIVITY | WLED1S_LINK);
9721 +
9722 + /* Restart Auto-negotiation */
9723 + ctrl |= WMC_WANR;
9724 +
9725 + __raw_writel(ctrl, KS8695_MISC_VA + KS8695_WMC);
9726 +
9727 + __raw_writel(0, KS8695_MISC_VA + KS8695_WPPM);
9728 + __raw_writel(0, KS8695_MISC_VA + KS8695_PPS);
9729 +}
9730 +
9731 +/*
9732 + * Initialize the LAN Switch hardware to known defaults.
9733 + */
9734 +static void __init ks8695eth_init_switch(void)
9735 +{
9736 + unsigned long ctrl;
9737 +
9738 + ctrl = 0x40819e00; /* default */
9739 +
9740 + /* LED0 = Speed LED1 = Link/Activity */
9741 + ctrl &= ~(SEC0_LLED1S | SEC0_LLED0S);
9742 + ctrl |= (LLED0S_LINK | LLED1S_LINK_ACTIVITY);
9743 +
9744 + /* Enable Switch */
9745 + ctrl |= SEC0_ENABLE;
9746 +
9747 + __raw_writel(ctrl, KS8695_SWITCH_VA + KS8695_SEC0);
9748 +
9749 + __raw_writel(0x9400100, KS8695_SWITCH_VA + KS8695_SEC1); /* reset defaults */
9750 +}
9751 +
9752 +static int ks8695eth_hook_irqs(struct platform_device *pdev, struct net_device *dev, unsigned long *irqset)
9753 +{
9754 + struct resource *res;
9755 + int i = 0, ret;
9756 +
9757 + while ((res = platform_get_resource(pdev, IORESOURCE_IRQ, i))) {
9758 + set_irq_flags(res->start, IRQF_VALID | IRQF_NOAUTOEN);
9759 +
9760 + ret = request_irq(res->start, ks8695eth_interrupt, IRQF_DISABLED | IRQF_SHARED, res->name, dev);
9761 + if (ret) {
9762 + printk(KERN_ERR "%s: return_irq %u failed\n", dev->name, res->start);
9763 + return -EBUSY;
9764 + }
9765 +
9766 + *irqset |= (1 << res->start);
9767 +
9768 + // TODO: Can set different priorities for interrupts [0x BB AA FF].
9769 +
9770 + i++;
9771 + }
9772 +
9773 + return 0;
9774 +}
9775 +
9776 +static int __init ks8695eth_probe(struct platform_device *pdev)
9777 +{
9778 + struct net_device *dev;
9779 + struct ks8695eth_priv *lp;
9780 + struct resource *res;
9781 + int i = 0, ret, size;
9782 + DECLARE_MAC_BUF(mac);
9783 +
9784 + /* Create ethernet device */
9785 + dev = alloc_etherdev(sizeof(struct ks8695eth_priv));
9786 + if (!dev)
9787 + return -ENOMEM;
9788 +
9789 + /* Get I/O base address */
9790 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
9791 + if (!res) {
9792 + free_netdev(dev);
9793 + return -ENODEV;
9794 + }
9795 + dev->base_addr = res->start;
9796 +
9797 + lp = (struct ks8695eth_priv *) dev->priv;
9798 +
9799 + /* Retreive MAC address before the MAC registers are reset */
9800 + get_mac_address(dev);
9801 +
9802 + /* Reset the hardware */
9803 + ks8695_write(dev, KS8695_WMDTXC, WMDTXC_WMTRST);
9804 + while (ks8695_read(dev, KS8695_WMDTXC) & WMDTXC_WMTRST) { barrier(); }
9805 +
9806 + /* Get IRQ's */
9807 + dev->irq = platform_get_irq(pdev, 0);
9808 + ret = ks8695eth_hook_irqs(pdev, dev, &lp->irqs);
9809 + if (ret) {
9810 + // Cleanup.
9811 + }
9812 +
9813 + /* Allocate DMA-able memory for Tx descriptor */
9814 + size = sizeof(struct tx_descriptor) * MAX_TX_DESC;
9815 + lp->txdma = dma_alloc_coherent(&pdev->dev, size, &lp->txdma_phys, GFP_KERNEL);
9816 + if (lp->txdma == NULL) {
9817 + // free IRQs
9818 + free_netdev(dev);
9819 + return -ENOMEM;
9820 + }
9821 + memset(lp->txdma, 0, size);
9822 + lp->tx_head = 0;
9823 + lp->tx_tail = 0;
9824 +
9825 + /* Allocate DMA-able memory for Rx descriptor */
9826 + size = sizeof(struct rx_descriptor) * MAX_RX_DESC;
9827 + lp->rxdma = dma_alloc_coherent(&pdev->dev, size, &lp->rxdma_phys, GFP_KERNEL);
9828 + if (lp->rxdma == NULL) {
9829 + // free IRQs
9830 + // Free TX descriptor memory.
9831 + free_netdev(dev);
9832 + return -ENOMEM;
9833 + }
9834 + memset(lp->rxdma, 0, size);
9835 + lp->rx_idx = 0;
9836 +
9837 + /* Allocate DMA-able memory for Rx Data */
9838 + for (i = 0; i < MAX_RX_DESC; i++) {
9839 + lp->rxSkb[i].skb = alloc_skb(MAX_RXBUF_SIZE, GFP_KERNEL);
9840 + if (lp->rxSkb[i].skb == NULL) {
9841 + // Cleanup
9842 + return -ENOMEM;
9843 + }
9844 + lp->rxSkb[i].length = MAX_RXBUF_SIZE;
9845 + lp->rxSkb[i].dma = dma_map_single(&pdev->dev, lp->rxSkb[i].skb->data, MAX_RXBUF_SIZE, DMA_FROM_DEVICE);
9846 + }
9847 +
9848 + spin_lock_init(&lp->tx_lock);
9849 +
9850 + platform_set_drvdata(pdev, dev);
9851 +
9852 + ether_setup(dev);
9853 + dev->open = ks8695eth_open;
9854 + dev->stop = ks8695eth_close;
9855 + dev->hard_start_xmit = ks8695eth_xmit_frame;
9856 + dev->get_stats = ks8695eth_stats;
9857 + dev->set_multicast_list = ks8695eth_set_multi;
9858 + dev->set_mac_address = ks8695eth_set_mac;
9859 + dev->ethtool_ops = &ks8695eth_ethtool_ops;
9860 +
9861 + SET_NETDEV_DEV(dev, &pdev->dev);
9862 + lp->dev = &pdev->dev;
9863 +
9864 + if (dev->base_addr == KS8695_WAN_VA)
9865 + ks8695eth_init_wan();
9866 + else if (dev->base_addr == KS8695_LAN_VA)
9867 + ks8695eth_init_switch();
9868 +
9869 + /* Register the network interface */
9870 + ret = register_netdev(dev);
9871 + if (ret) {
9872 + // free IRQs
9873 + free_netdev(dev);
9874 +// dma_free_coherent(&pdev->dev, sizeof(struct ks8695_tx_dma), lp->txdma, lp->txdma_phys);
9875 +// dma_free_coherent(&pdev->dev, sizeof(struct ks8695_rx_dma), lp->rxdma, lp->rxdma_phys);
9876 + return ret;
9877 + }
9878 +
9879 + printk(KERN_INFO "%s: KS8695 ethernet (%s)\n", dev->name, print_mac(mac, dev->dev_addr));
9880 +
9881 + return 0;
9882 +}
9883 +
9884 +static int __devexit ks8695eth_remove(struct platform_device *pdev)
9885 +{
9886 + struct net_device *dev = platform_get_drvdata(pdev);
9887 +// struct ks8695eth_priv *lp = (struct ks8695eth_priv *) dev->priv;
9888 +
9889 + unregister_netdev(dev);
9890 +
9891 + // Free IRQ
9892 +// dma_free_coherent(&pdev->dev, sizeof(struct ks8695_tx_dma), lp->txdma, lp->txdma_phys);
9893 +// dma_free_coherent(&pdev->dev, sizeof(struct ks8695_rx_dma), lp->rxdma, lp->rxdma_phys);
9894 +
9895 + platform_set_drvdata(pdev, NULL);
9896 + free_netdev(dev);
9897 + return 0;
9898 +}
9899 +
9900 +static struct platform_driver ks8695ether_driver = {
9901 + .probe = ks8695eth_probe,
9902 + .remove = __devexit_p(ks8695eth_remove),
9903 +// .suspend =
9904 +// .resume =
9905 + .driver = {
9906 + .name = DRV_NAME,
9907 + .owner = THIS_MODULE,
9908 + },
9909 +};
9910 +
9911 +
9912 +static int __init ks8695eth_init(void)
9913 +{
9914 + return platform_driver_register(&ks8695ether_driver);
9915 +}
9916 +
9917 +static void __exit ks8695eth_exit(void)
9918 +{
9919 + platform_driver_unregister(&ks8695ether_driver);
9920 +}
9921 +
9922 +module_init(ks8695eth_init);
9923 +module_exit(ks8695eth_exit);
9924 +
9925 +MODULE_LICENSE("GPL");
9926 +MODULE_DESCRIPTION("KS8695 Ethernet driver");
9927 +MODULE_AUTHOR("Andrew Victor");
9928 +MODULE_ALIAS("platform:" DRV_NAME);
9929 diff -urN -x CVS linux-2.6.25/drivers/net/arm/ks8695_ether.h linux-2.6/drivers/net/arm/ks8695_ether.h
9930 --- linux-2.6.25/drivers/net/arm/ks8695_ether.h 1970-01-01 02:00:00.000000000 +0200
9931 +++ linux-2.6/drivers/net/arm/ks8695_ether.h 2008-05-08 21:51:23.000000000 +0200
9932 @@ -0,0 +1,92 @@
9933 +/*
9934 + * Ethernet driver for the Micrel/Kendin KS8695 (Centaur)
9935 + *
9936 + * (C) 2006 Andrew Victor
9937 + *
9938 + */
9939 +
9940 +#ifndef KS8695_ETHERNET
9941 +#define KS8695_ETHERNET
9942 +
9943 +/* .... Hardware Descriptors ................................................ */
9944 +
9945 +struct rx_descriptor {
9946 + unsigned long status;
9947 + unsigned long length;
9948 + unsigned long addr;
9949 + unsigned long next;
9950 +};
9951 +
9952 +#define RDES_OWN (1 << 31) /* Ownership */
9953 +#define RDES_FS (1 << 30) /* First Descriptor */
9954 +#define RDES_LS (1 << 29) /* Last Descriptor */
9955 +#define RDES_IPE (1 << 28) /* IP Checksum error */
9956 +#define RDES_TCPE (1 << 27) /* TCP Checksum error */
9957 +#define RDES_UDPE (1 << 26) /* UDP Checksum error */
9958 +#define RDES_ES (1 << 25) /* Error summary */
9959 +#define RDES_MF (1 << 24) /* Multicast Frame */
9960 +#define RDES_RE (1 << 19) /* MII Error reported */
9961 +#define RDES_TL (1 << 18) /* Frame too Long */
9962 +#define RDES_RF (1 << 17) /* Runt Frame */
9963 +#define RDES_CE (1 << 16) /* CRC error */
9964 +#define RDES_FT (1 << 15) /* Frame Type */
9965 +#define RDES_FLEN (0x7ff) /* Frame Length */
9966 +
9967 +#define RDES_RER (1 << 25) /* Receive End of Ring */
9968 +#define RDES_RBS (0x7ff) /* Receive Buffer Size */
9969 +
9970 +
9971 +struct tx_descriptor {
9972 + unsigned long ownership;
9973 + unsigned long status;
9974 + unsigned long addr;
9975 + unsigned long next;
9976 +};
9977 +
9978 +#define TDES_OWN (1 << 31) /* Ownership */
9979 +
9980 +#define TDES_IC (1 << 31) /* Interrupt on Completion */
9981 +#define TDES_FS (1 << 30) /* First Segment */
9982 +#define TDES_LS (1 << 29) /* Last Segment */
9983 +#define TDES_IPCKG (1 << 28) /* IP Checksum generate */
9984 +#define TDES_TCPCKG (1 << 27) /* TCP Checksum generate */
9985 +#define TDES_UDPCKG (1 << 26) /* UDP Checksum generate */
9986 +#define TDES_TER (1 << 25) /* Transmit End of Ring */
9987 +#define TDES_TBS (0x7ff) /* Transmit Buffer Size */
9988 +
9989 +
9990 +/* .... ..................................................................... */
9991 +
9992 +#define MAX_RX_DESC 16 /* number of receive descriptors */
9993 +#define MAX_TX_DESC 8 /* number of transmit descriptors */
9994 +#define MAX_RXBUF_SIZE 0x600 /* 1518 rounded-up */
9995 +
9996 +struct ks8695_buffer
9997 +{
9998 + struct sk_buff *skb;
9999 + dma_addr_t dma;
10000 + unsigned long length;
10001 +};
10002 +
10003 +
10004 +struct ks8695eth_priv
10005 +{
10006 + struct device *dev;
10007 + unsigned long irqs; /* IRQ bitset */
10008 +
10009 + /* Transmit */
10010 + struct tx_descriptor *txdma; /* Tx DMA descriptors */
10011 + dma_addr_t txdma_phys; /* TX DMA descriptors (phys address) */
10012 + unsigned int tx_head; /* descriptor index (add) */
10013 + unsigned int tx_tail; /* descriptor index (remove) */
10014 + spinlock_t tx_lock;
10015 + struct ks8695_buffer txSkb[MAX_TX_DESC]; /* packets being transmitted */
10016 +
10017 + /* Receive */
10018 + struct rx_descriptor *rxdma; /* Rx DMA descriptors */
10019 + dma_addr_t rxdma_phys; /* Rx DMA descriptors (phys address) */
10020 + unsigned int rx_idx; /* descriptor index */
10021 + struct ks8695_buffer rxSkb[MAX_RX_DESC];
10022 +};
10023 +
10024 +#endif
10025 diff -urN -x CVS linux-2.6.25/drivers/rtc/Kconfig linux-2.6/drivers/rtc/Kconfig
10026 --- linux-2.6.25/drivers/rtc/Kconfig 2008-05-03 00:15:49.000000000 +0200
10027 +++ linux-2.6/drivers/rtc/Kconfig 2008-04-15 21:48:11.000000000 +0200
10028 @@ -487,12 +487,12 @@
10029 this is powered by the backup power supply.
10030
10031 config RTC_DRV_AT91SAM9
10032 - tristate "AT91SAM9x"
10033 + tristate "AT91SAM9x or AT91CAP9"
10034 depends on ARCH_AT91 && !(ARCH_AT91RM9200 || ARCH_AT91X40)
10035 help
10036 - RTC driver for the Atmel AT91SAM9x internal RTT (Real Time Timer).
10037 - These timers are powered by the backup power supply (such as a
10038 - small coin cell battery), but do not need to be used as RTCs.
10039 + RTC driver for the Atmel AT91SAM9x and AT91CAP9 internal RTT (Real
10040 + Time Timer). These timers are powered by the backup power supply
10041 + (such as a small coin cell battery), but do not need to be used as RTCs.
10042
10043 (On AT91SAM9rl chips you probably want to use the dedicated RTC
10044 module and leave the RTT available for other uses.)
10045 diff -urN -x CVS linux-2.6.25/drivers/rtc/rtc-at91rm9200.c linux-2.6/drivers/rtc/rtc-at91rm9200.c
10046 --- linux-2.6.25/drivers/rtc/rtc-at91rm9200.c 2008-05-03 00:15:49.000000000 +0200
10047 +++ linux-2.6/drivers/rtc/rtc-at91rm9200.c 2008-04-25 23:15:05.000000000 +0200
10048 @@ -29,9 +29,6 @@
10049 #include <linux/completion.h>
10050
10051 #include <asm/uaccess.h>
10052 -#include <asm/rtc.h>
10053 -
10054 -#include <asm/mach/time.h>
10055
10056 #include <asm/arch/at91_rtc.h>
10057
10058 @@ -307,12 +304,6 @@
10059 return ret;
10060 }
10061
10062 - /* cpu init code should really have flagged this device as
10063 - * being wake-capable; if it didn't, do that here.
10064 - */
10065 - if (!device_can_wakeup(&pdev->dev))
10066 - device_init_wakeup(&pdev->dev, 1);
10067 -
10068 rtc = rtc_device_register(pdev->name, &pdev->dev,
10069 &at91_rtc_ops, THIS_MODULE);
10070 if (IS_ERR(rtc)) {
10071 diff -urN -x CVS linux-2.6.25/drivers/rtc/rtc-at91sam9.c linux-2.6/drivers/rtc/rtc-at91sam9.c
10072 --- linux-2.6.25/drivers/rtc/rtc-at91sam9.c 2008-05-03 00:15:49.000000000 +0200
10073 +++ linux-2.6/drivers/rtc/rtc-at91sam9.c 2008-05-05 22:01:39.000000000 +0200
10074 @@ -21,6 +21,7 @@
10075
10076 #include <asm/mach/time.h>
10077 #include <asm/arch/board.h>
10078 +#include <asm/arch/cpu.h>
10079 #include <asm/arch/at91_rtt.h>
10080
10081
10082 @@ -150,6 +151,9 @@
10083 return 0;
10084 }
10085
10086 +/*
10087 + * Read alarm time and date in RTC
10088 + */
10089 static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
10090 {
10091 struct sam9_rtc *rtc = dev_get_drvdata(dev);
10092 @@ -176,6 +180,9 @@
10093 return 0;
10094 }
10095
10096 +/*
10097 + * Set alarm time and date in RTC
10098 + */
10099 static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
10100 {
10101 struct sam9_rtc *rtc = dev_get_drvdata(dev);
10102 @@ -321,10 +328,6 @@
10103 if (!rtc)
10104 return -ENOMEM;
10105
10106 - /* platform setup code should have handled this; sigh */
10107 - if (!device_can_wakeup(&pdev->dev))
10108 - device_init_wakeup(&pdev->dev, 1);
10109 -
10110 platform_set_drvdata(pdev, rtc);
10111 rtc->rtt = (void __force __iomem *) (AT91_VA_BASE_SYS - AT91_BASE_SYS);
10112 rtc->rtt += r->start;
10113 diff -urN -x CVS linux-2.6.25/drivers/spi/Kconfig linux-2.6/drivers/spi/Kconfig
10114 --- linux-2.6.25/drivers/spi/Kconfig 2008-05-03 00:15:50.000000000 +0200
10115 +++ linux-2.6/drivers/spi/Kconfig 2008-03-09 15:14:53.000000000 +0200
10116 @@ -105,6 +105,15 @@
10117 inexpensive battery powered microcontroller evaluation board.
10118 This same cable can be used to flash new firmware.
10119
10120 +config SPI_AT91
10121 + tristate "AT91RM9200 Bitbang SPI Master"
10122 + depends on SPI_MASTER && ARCH_AT91RM9200 && !SPI_ATMEL && EXPERIMENTAL
10123 + select SPI_BITBANG
10124 + help
10125 + This is dumb PIO bitbanging driver for the Atmel AT91RM9200.
10126 + The SPI_ATMEL driver will be its replacement, using the native
10127 + SPI hardware and its DMA controller.
10128 +
10129 config SPI_IMX
10130 tristate "Freescale iMX SPI controller"
10131 depends on SPI_MASTER && ARCH_IMX && EXPERIMENTAL
10132 diff -urN -x CVS linux-2.6.25/drivers/spi/Makefile linux-2.6/drivers/spi/Makefile
10133 --- linux-2.6.25/drivers/spi/Makefile 2008-05-03 00:15:50.000000000 +0200
10134 +++ linux-2.6/drivers/spi/Makefile 2008-03-09 17:54:27.000000000 +0200
10135 @@ -29,6 +29,7 @@
10136 obj-$(CONFIG_SPI_TXX9) += spi_txx9.o
10137 obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o
10138 obj-$(CONFIG_SPI_SH_SCI) += spi_sh_sci.o
10139 +obj-$(CONFIG_SPI_AT91) += spi_at91_bitbang.o
10140 # ... add above this line ...
10141
10142 # SPI protocol drivers (device/link on bus)
10143 diff -urN -x CVS linux-2.6.25/drivers/spi/spi_at91_bitbang.c linux-2.6/drivers/spi/spi_at91_bitbang.c
10144 --- linux-2.6.25/drivers/spi/spi_at91_bitbang.c 1970-01-01 02:00:00.000000000 +0200
10145 +++ linux-2.6/drivers/spi/spi_at91_bitbang.c 2008-04-18 17:38:19.000000000 +0200
10146 @@ -0,0 +1,208 @@
10147 +/*
10148 + * at91_spi.c - at91 SPI driver (BOOTSTRAP/BITBANG VERSION)
10149 + *
10150 + * Copyright (C) 2006 David Brownell
10151 + *
10152 + * This program is free software; you can redistribute it and/or modify
10153 + * it under the terms of the GNU General Public License as published by
10154 + * the Free Software Foundation; either version 2 of the License, or
10155 + * (at your option) any later version.
10156 + *
10157 + * This program is distributed in the hope that it will be useful,
10158 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
10159 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10160 + * GNU General Public License for more details.
10161 + *
10162 + * You should have received a copy of the GNU General Public License
10163 + * along with this program; if not, write to the Free Software
10164 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
10165 + */
10166 +#include <linux/kernel.h>
10167 +#include <linux/init.h>
10168 +#include <linux/platform_device.h>
10169 +
10170 +#include <linux/spi/spi.h>
10171 +#include <linux/spi/spi_bitbang.h>
10172 +
10173 +#include <asm/arch/gpio.h>
10174 +
10175 +
10176 +/*
10177 + * FIXME this bitbanging version is just to help bootstrap systems until
10178 + * there's a native SPI+IRQ+DMA controller driver ... such a driver should
10179 + * be a drop-in replacement for this one, and much faster.
10180 + *
10181 + * remember:
10182 + *
10183 + * - other at91 parts (like at91sam9) have multiple controllers
10184 + * and different pin muxing; this version is at91rm9200 specfic.
10185 + *
10186 + * - at91sam9261 SPI0 pins are directly muxed with MMC/SD pins.
10187 + *
10188 + * - rm9200 spi chipselects drop wrongly, so the native driver
10189 + * will need to use gpios much like this does.
10190 + *
10191 + * - real hardware only allows 8..16 bits per word, while this
10192 + * bitbanger allows 1..32 (incompatible superset).
10193 + *
10194 + * - this disregards clock parameters. with inlined gpio calls,
10195 + * gcc 3.4.4 produces about 1.5 mbit/sec, more than 2x faster
10196 + * than using the subroutined veresion from txrx_word().
10197 + *
10198 + * - suspend/resume and <linux/clk.h> support is missing ...
10199 + */
10200 +
10201 +#define spi_miso_bit AT91_PIN_PA0
10202 +#define spi_mosi_bit AT91_PIN_PA1
10203 +#define spi_sck_bit AT91_PIN_PA2
10204 +
10205 +struct at91_spi {
10206 + struct spi_bitbang bitbang;
10207 + struct platform_device *pdev;
10208 +};
10209 +
10210 +/*----------------------------------------------------------------------*/
10211 +
10212 +static inline void setsck(struct spi_device *spi, int is_on)
10213 +{
10214 + at91_set_gpio_value(spi_sck_bit, is_on);
10215 +}
10216 +
10217 +static inline void setmosi(struct spi_device *spi, int is_on)
10218 +{
10219 + at91_set_gpio_value(spi_mosi_bit, is_on);
10220 +}
10221 +
10222 +static inline int getmiso(struct spi_device *spi)
10223 +{
10224 + return at91_get_gpio_value(spi_miso_bit);
10225 +}
10226 +
10227 +static void at91_spi_chipselect(struct spi_device *spi, int is_active)
10228 +{
10229 + unsigned long cs = (unsigned long) spi->controller_data;
10230 +
10231 + /* set default clock polarity */
10232 + if (is_active)
10233 + setsck(spi, spi->mode & SPI_CPOL);
10234 +
10235 + /* only support active-low (default) */
10236 + at91_set_gpio_value(cs, !is_active);
10237 +}
10238 +
10239 +/*
10240 + * NOTE: this is "as fast as we can"; it should be a function of
10241 + * the device clock ...
10242 + */
10243 +#define spidelay(X) do{} while(0)
10244 +
10245 +#define EXPAND_BITBANG_TXRX
10246 +#include <linux/spi/spi_bitbang.h>
10247 +
10248 +static u32 at91_spi_txrx_word_mode0(struct spi_device *spi,
10249 + unsigned nsecs, u32 word, u8 bits)
10250 +{
10251 + return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, 8);
10252 +}
10253 +
10254 +static u32 at91_spi_txrx_word_mode1(struct spi_device *spi,
10255 + unsigned nsecs, u32 word, u8 bits)
10256 +{
10257 + return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, 8);
10258 +}
10259 +
10260 +static u32 at91_spi_txrx_word_mode2(struct spi_device *spi,
10261 + unsigned nsecs, u32 word, u8 bits)
10262 +{
10263 + return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, 8);
10264 +}
10265 +
10266 +static u32 at91_spi_txrx_word_mode3(struct spi_device *spi,
10267 + unsigned nsecs, u32 word, u8 bits)
10268 +{
10269 + return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, 8);
10270 +}
10271 +
10272 +/*----------------------------------------------------------------------*/
10273 +
10274 +static int __init at91_spi_probe(struct platform_device *pdev)
10275 +{
10276 + int status;
10277 + struct spi_master *master;
10278 + struct at91_spi *at91_spi;
10279 +
10280 + if (pdev->id != 0) /* SPI0 bus */
10281 + return -EINVAL;
10282 +
10283 + master = spi_alloc_master(&pdev->dev, sizeof *at91_spi);
10284 + if (!master)
10285 + return -ENOMEM;
10286 +
10287 + at91_spi = spi_master_get_devdata(master);
10288 + at91_spi->pdev = pdev;
10289 + platform_set_drvdata(pdev, at91_spi);
10290 +
10291 + /* SPI and bitbang hookup */
10292 + master->bus_num = 0;
10293 + master->num_chipselect = 4;
10294 +
10295 + at91_spi->bitbang.master = spi_master_get(master);
10296 + at91_spi->bitbang.chipselect = at91_spi_chipselect;
10297 + at91_spi->bitbang.txrx_word[SPI_MODE_0] = at91_spi_txrx_word_mode0;
10298 + at91_spi->bitbang.txrx_word[SPI_MODE_1] = at91_spi_txrx_word_mode1;
10299 + at91_spi->bitbang.txrx_word[SPI_MODE_2] = at91_spi_txrx_word_mode2;
10300 + at91_spi->bitbang.txrx_word[SPI_MODE_3] = at91_spi_txrx_word_mode3;
10301 +
10302 + status = spi_bitbang_start(&at91_spi->bitbang);
10303 + if (status < 0)
10304 + (void) spi_master_put(at91_spi->bitbang.master);
10305 +
10306 + return status;
10307 +}
10308 +
10309 +static int __exit at91_spi_remove(struct platform_device *pdev)
10310 +{
10311 + struct at91_spi *at91_spi = platform_get_drvdata(pdev);
10312 + int status;
10313 +
10314 + /* stop() unregisters child devices too */
10315 + status = spi_bitbang_stop(&at91_spi->bitbang);
10316 + (void) spi_master_put(at91_spi->bitbang.master);
10317 +
10318 + platform_set_drvdata(pdev, NULL);
10319 + return status;
10320 +}
10321 +
10322 +static struct platform_driver at91_spi_driver = {
10323 + .probe = at91_spi_probe,
10324 + .remove = __exit_p(at91_spi_remove),
10325 + .driver = {
10326 + .name = "at91_spi",
10327 + .owner = THIS_MODULE,
10328 + },
10329 +};
10330 +
10331 +static int __init at91_spi_init(void)
10332 +{
10333 + at91_set_gpio_output(spi_sck_bit, 0);
10334 + at91_set_gpio_output(spi_mosi_bit, 0);
10335 + at91_set_gpio_input(spi_miso_bit, 1 /* pullup */);
10336 +
10337 + /* register driver */
10338 + return platform_driver_register(&at91_spi_driver);
10339 +}
10340 +
10341 +static void __exit at91_spi_exit(void)
10342 +{
10343 + platform_driver_unregister(&at91_spi_driver);
10344 +}
10345 +
10346 +device_initcall(at91_spi_init);
10347 +module_exit(at91_spi_exit);
10348 +
10349 +MODULE_ALIAS("at91_spi.0");
10350 +
10351 +MODULE_DESCRIPTION("AT91 SPI support (BOOTSTRAP/BITBANG VERSION)");
10352 +MODULE_AUTHOR("David Brownell");
10353 +MODULE_LICENSE("GPL");
10354 +MODULE_ALIAS("platform:at91_spi");
10355 diff -urN -x CVS linux-2.6.25/drivers/usb/gadget/Kconfig linux-2.6/drivers/usb/gadget/Kconfig
10356 --- linux-2.6.25/drivers/usb/gadget/Kconfig 2008-05-03 00:15:50.000000000 +0200
10357 +++ linux-2.6/drivers/usb/gadget/Kconfig 2008-04-18 19:23:34.000000000 +0200
10358 @@ -118,10 +118,10 @@
10359 config USB_GADGET_ATMEL_USBA
10360 boolean "Atmel USBA"
10361 select USB_GADGET_DUALSPEED
10362 - depends on AVR32
10363 + depends on AVR32 || ARCH_AT91CAP9 || ARCH_AT91SAM9RL
10364 help
10365 USBA is the integrated high-speed USB Device controller on
10366 - the AT32AP700x processors from Atmel.
10367 + the AT32AP700x, some AT91SAM9 and AT91CAP9 processors from Atmel.
10368
10369 config USB_ATMEL_USBA
10370 tristate
10371 diff -urN -x CVS linux-2.6.25/drivers/usb/gadget/at91_udc.c linux-2.6/drivers/usb/gadget/at91_udc.c
10372 --- linux-2.6.25/drivers/usb/gadget/at91_udc.c 2008-05-03 00:15:50.000000000 +0200
10373 +++ linux-2.6/drivers/usb/gadget/at91_udc.c 2008-04-15 21:48:12.000000000 +0200
10374 @@ -1827,7 +1827,7 @@
10375 */
10376 if ((!udc->suspended && udc->addr)
10377 || !wake
10378 - || at91_suspend_entering_slow_clock()) {
10379 + || clk_must_disable(udc->fclk)) {
10380 pullup(udc, 0);
10381 wake = 0;
10382 } else
10383 diff -urN -x CVS linux-2.6.25/drivers/usb/gadget/atmel_usba_udc.c linux-2.6/drivers/usb/gadget/atmel_usba_udc.c
10384 --- linux-2.6.25/drivers/usb/gadget/atmel_usba_udc.c 2008-05-03 00:15:50.000000000 +0200
10385 +++ linux-2.6/drivers/usb/gadget/atmel_usba_udc.c 2008-05-03 01:07:46.000000000 +0200
10386 @@ -18,6 +18,7 @@
10387 #include <linux/platform_device.h>
10388 #include <linux/usb/ch9.h>
10389 #include <linux/usb/gadget.h>
10390 +#include <linux/usb/atmel_usba_udc.h>
10391 #include <linux/delay.h>
10392
10393 #include <asm/gpio.h>
10394 @@ -27,6 +28,7 @@
10395
10396
10397 static struct usba_udc the_udc;
10398 +static struct usba_ep *usba_ep;
10399
10400 #ifdef CONFIG_USB_GADGET_DEBUG_FS
10401 #include <linux/debugfs.h>
10402 @@ -324,53 +326,6 @@
10403 return 1;
10404 }
10405
10406 -static void copy_to_fifo(void __iomem *fifo, const void *buf, int len)
10407 -{
10408 - unsigned long tmp;
10409 -
10410 - DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len);
10411 - for (; len > 0; len -= 4, buf += 4, fifo += 4) {
10412 - tmp = *(unsigned long *)buf;
10413 - if (len >= 4) {
10414 - DBG(DBG_FIFO, " -> %08lx\n", tmp);
10415 - __raw_writel(tmp, fifo);
10416 - } else {
10417 - do {
10418 - DBG(DBG_FIFO, " -> %02lx\n", tmp >> 24);
10419 - __raw_writeb(tmp >> 24, fifo);
10420 - fifo++;
10421 - tmp <<= 8;
10422 - } while (--len);
10423 - break;
10424 - }
10425 - }
10426 -}
10427 -
10428 -static void copy_from_fifo(void *buf, void __iomem *fifo, int len)
10429 -{
10430 - union {
10431 - unsigned long *w;
10432 - unsigned char *b;
10433 - } p;
10434 - unsigned long tmp;
10435 -
10436 - DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len);
10437 - for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) {
10438 - if (len >= 4) {
10439 - tmp = __raw_readl(fifo);
10440 - *p.w = tmp;
10441 - DBG(DBG_FIFO, " -> %08lx\n", tmp);
10442 - } else {
10443 - do {
10444 - tmp = __raw_readb(fifo);
10445 - *p.b = tmp;
10446 - DBG(DBG_FIFO, " -> %02lx\n", tmp);
10447 - fifo++, p.b++;
10448 - } while (--len);
10449 - }
10450 - }
10451 -}
10452 -
10453 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
10454 {
10455 unsigned int transaction_len;
10456 @@ -387,7 +342,7 @@
10457 ep->ep.name, req, transaction_len,
10458 req->last_transaction ? ", done" : "");
10459
10460 - copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len);
10461 + memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
10462 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
10463 req->req.actual += transaction_len;
10464 }
10465 @@ -476,7 +431,7 @@
10466 bytecount = req->req.length - req->req.actual;
10467 }
10468
10469 - copy_from_fifo(req->req.buf + req->req.actual,
10470 + memcpy_fromio(req->req.buf + req->req.actual,
10471 ep->fifo, bytecount);
10472 req->req.actual += bytecount;
10473
10474 @@ -1029,33 +984,6 @@
10475 .set_selfpowered = usba_udc_set_selfpowered,
10476 };
10477
10478 -#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \
10479 -{ \
10480 - .ep = { \
10481 - .ops = &usba_ep_ops, \
10482 - .name = nam, \
10483 - .maxpacket = maxpkt, \
10484 - }, \
10485 - .udc = &the_udc, \
10486 - .queue = LIST_HEAD_INIT(usba_ep[idx].queue), \
10487 - .fifo_size = maxpkt, \
10488 - .nr_banks = maxbk, \
10489 - .index = idx, \
10490 - .can_dma = dma, \
10491 - .can_isoc = isoc, \
10492 -}
10493 -
10494 -static struct usba_ep usba_ep[] = {
10495 - EP("ep0", 0, 64, 1, 0, 0),
10496 - EP("ep1in-bulk", 1, 512, 2, 1, 1),
10497 - EP("ep2out-bulk", 2, 512, 2, 1, 1),
10498 - EP("ep3in-int", 3, 64, 3, 1, 0),
10499 - EP("ep4out-int", 4, 64, 3, 1, 0),
10500 - EP("ep5in-iso", 5, 1024, 3, 1, 1),
10501 - EP("ep6out-iso", 6, 1024, 3, 1, 1),
10502 -};
10503 -#undef EP
10504 -
10505 static struct usb_endpoint_descriptor usba_ep0_desc = {
10506 .bLength = USB_DT_ENDPOINT_SIZE,
10507 .bDescriptorType = USB_DT_ENDPOINT,
10508 @@ -1074,7 +1002,6 @@
10509 static struct usba_udc the_udc = {
10510 .gadget = {
10511 .ops = &usba_udc_ops,
10512 - .ep0 = &usba_ep[0].ep,
10513 .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list),
10514 .is_dualspeed = 1,
10515 .name = "atmel_usba_udc",
10516 @@ -1231,7 +1158,7 @@
10517 } else {
10518 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
10519 usba_writel(udc, TST, USBA_TST_PKT_MODE);
10520 - copy_to_fifo(ep->fifo, test_packet_buffer,
10521 + memcpy_toio(ep->fifo, test_packet_buffer,
10522 sizeof(test_packet_buffer));
10523 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
10524 dev_info(dev, "Entering Test_Packet mode...\n");
10525 @@ -1530,13 +1457,13 @@
10526 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
10527 if (pkt_len != sizeof(crq)) {
10528 pr_warning("udc: Invalid packet length %u "
10529 - "(expected %lu)\n", pkt_len, sizeof(crq));
10530 + "(expected %zu)\n", pkt_len, sizeof(crq));
10531 set_protocol_stall(udc, ep);
10532 return;
10533 }
10534
10535 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
10536 - copy_from_fifo(crq.data, ep->fifo, sizeof(crq));
10537 + memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
10538
10539 /* Free up one bank in the FIFO so that we can
10540 * generate or receive a reply right away. */
10541 @@ -1908,7 +1835,7 @@
10542
10543 regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
10544 fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
10545 - if (!regs || !fifo)
10546 + if (!regs || !fifo || !pdata)
10547 return -ENXIO;
10548
10549 irq = platform_get_irq(pdev, 0);
10550 @@ -1956,16 +1883,44 @@
10551 usba_writel(udc, CTRL, 0);
10552 clk_disable(pclk);
10553
10554 + usba_ep = kmalloc(sizeof(struct usba_ep) * pdata->num_ep,
10555 + GFP_KERNEL);
10556 + if (!usba_ep)
10557 + goto err_alloc_ep;
10558 +
10559 + the_udc.gadget.ep0 = &usba_ep[0].ep;
10560 +
10561 INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
10562 usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
10563 usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
10564 usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
10565 - for (i = 1; i < ARRAY_SIZE(usba_ep); i++) {
10566 + usba_ep[0].ep.ops = &usba_ep_ops;
10567 + usba_ep[0].ep.name = pdata->ep[0].name;
10568 + usba_ep[0].ep.maxpacket = pdata->ep[0].fifo_size;
10569 + usba_ep[0].udc = &the_udc;
10570 + INIT_LIST_HEAD(&usba_ep[0].queue);
10571 + usba_ep[0].fifo_size = pdata->ep[0].fifo_size;
10572 + usba_ep[0].nr_banks = pdata->ep[0].nr_banks;
10573 + usba_ep[0].index = pdata->ep[0].index;
10574 + usba_ep[0].can_dma = pdata->ep[0].can_dma;
10575 + usba_ep[0].can_isoc = pdata->ep[0].can_isoc;
10576 +
10577 + for (i = 1; i < pdata->num_ep; i++) {
10578 struct usba_ep *ep = &usba_ep[i];
10579
10580 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
10581 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
10582 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
10583 + ep->ep.ops = &usba_ep_ops;
10584 + ep->ep.name = pdata->ep[i].name;
10585 + ep->ep.maxpacket = pdata->ep[i].fifo_size;
10586 + ep->udc = &the_udc;
10587 + INIT_LIST_HEAD(&ep->queue);
10588 + ep->fifo_size = pdata->ep[i].fifo_size;
10589 + ep->nr_banks = pdata->ep[i].nr_banks;
10590 + ep->index = pdata->ep[i].index;
10591 + ep->can_dma = pdata->ep[i].can_dma;
10592 + ep->can_isoc = pdata->ep[i].can_isoc;
10593
10594 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
10595 }
10596 @@ -1984,7 +1939,7 @@
10597 goto err_device_add;
10598 }
10599
10600 - if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) {
10601 + if (pdata->vbus_pin >= 0) {
10602 if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
10603 udc->vbus_pin = pdata->vbus_pin;
10604
10605 @@ -2004,7 +1959,7 @@
10606 }
10607
10608 usba_init_debugfs(udc);
10609 - for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
10610 + for (i = 1; i < pdata->num_ep; i++)
10611 usba_ep_init_debugfs(udc, &usba_ep[i]);
10612
10613 return 0;
10614 @@ -2012,6 +1967,8 @@
10615 err_device_add:
10616 free_irq(irq, udc);
10617 err_request_irq:
10618 + kfree(usba_ep);
10619 +err_alloc_ep:
10620 iounmap(udc->fifo);
10621 err_map_fifo:
10622 iounmap(udc->regs);
10623 @@ -2029,10 +1986,11 @@
10624 {
10625 struct usba_udc *udc;
10626 int i;
10627 + struct usba_platform_data *pdata = pdev->dev.platform_data;
10628
10629 udc = platform_get_drvdata(pdev);
10630
10631 - for (i = 1; i < ARRAY_SIZE(usba_ep); i++)
10632 + for (i = 1; i < pdata->num_ep; i++)
10633 usba_ep_cleanup_debugfs(&usba_ep[i]);
10634 usba_cleanup_debugfs(udc);
10635
10636 diff -urN -x CVS linux-2.6.25/drivers/usb/host/ohci-at91.c linux-2.6/drivers/usb/host/ohci-at91.c
10637 --- linux-2.6.25/drivers/usb/host/ohci-at91.c 2008-05-03 00:15:50.000000000 +0200
10638 +++ linux-2.6/drivers/usb/host/ohci-at91.c 2008-04-15 21:48:12.000000000 +0200
10639 @@ -330,7 +330,7 @@
10640 *
10641 * REVISIT: some boards will be able to turn VBUS off...
10642 */
10643 - if (at91_suspend_entering_slow_clock()) {
10644 + if (clk_must_disable(fclk)) {
10645 ohci_usb_reset (ohci);
10646 at91_stop_clock();
10647 }
10648 diff -urN -x CVS linux-2.6.25/drivers/video/Kconfig linux-2.6/drivers/video/Kconfig
10649 --- linux-2.6.25/drivers/video/Kconfig 2008-05-03 00:15:50.000000000 +0200
10650 +++ linux-2.6/drivers/video/Kconfig 2008-04-02 22:11:30.000000000 +0200
10651 @@ -889,6 +889,17 @@
10652 framebuffer. Product specs at
10653 <http://www.erd.epson.com/vdc/html/products.htm>.
10654
10655 +config FB_S1D15605
10656 + tristate "Epson S1D15605 framebuffer support"
10657 + depends on FB
10658 + default m if MACH_KB9200
10659 + select FB_CFB_FILLRECT
10660 + select FB_CFB_COPYAREA
10661 + select FB_CFB_IMAGEBLIT
10662 + help
10663 + Build in support for the S1D15605 Epson Research 128x64
10664 + LCD controller as a framebuffer.
10665 +
10666 config FB_S1D13XXX
10667 tristate "Epson S1D13XXX framebuffer support"
10668 depends on FB
10669 diff -urN -x CVS linux-2.6.25/drivers/video/Makefile linux-2.6/drivers/video/Makefile
10670 --- linux-2.6.25/drivers/video/Makefile 2008-05-03 00:15:50.000000000 +0200
10671 +++ linux-2.6/drivers/video/Makefile 2008-04-02 22:11:30.000000000 +0200
10672 @@ -87,7 +87,8 @@
10673 obj-$(CONFIG_FB_SA1100) += sa1100fb.o
10674 obj-$(CONFIG_FB_HIT) += hitfb.o
10675 obj-$(CONFIG_FB_EPSON1355) += epson1355fb.o
10676 -obj-$(CONFIG_FB_ATMEL) += atmel_lcdfb.o
10677 +obj-$(CONFIG_FB_S1D15605) += s1d15605fb.o
10678 +obj-$(CONFIG_FB_ATMEL) += atmel_lcdfb.o
10679 obj-$(CONFIG_FB_PVR2) += pvr2fb.o
10680 obj-$(CONFIG_FB_VOODOO1) += sstfb.o
10681 obj-$(CONFIG_FB_ARMCLCD) += amba-clcd.o
10682 diff -urN -x CVS linux-2.6.25/drivers/video/atmel_lcdfb.c linux-2.6/drivers/video/atmel_lcdfb.c
10683 --- linux-2.6.25/drivers/video/atmel_lcdfb.c 2008-05-03 00:15:50.000000000 +0200
10684 +++ linux-2.6/drivers/video/atmel_lcdfb.c 2008-04-03 00:27:47.000000000 +0200
10685 @@ -31,7 +31,7 @@
10686 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
10687 #define ATMEL_LCDC_DMA_BURST_LEN 8
10688
10689 -#if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9)
10690 +#if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9) || defined(CONFIG_ARCH_AT91SAM9RL)
10691 #define ATMEL_LCDC_FIFO_SIZE 2048
10692 #else
10693 #define ATMEL_LCDC_FIFO_SIZE 512
10694 @@ -903,11 +903,45 @@
10695 return 0;
10696 }
10697
10698 -static struct platform_driver atmel_lcdfb_driver = {
10699 - .remove = __exit_p(atmel_lcdfb_remove),
10700 +#ifdef CONFIG_PM
10701 +
10702 +static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
10703 +{
10704 + struct fb_info *info = platform_get_drvdata(pdev);
10705 + struct atmel_lcdfb_info *sinfo = info->par;
10706 +
10707 + sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
10708 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
10709 + if (sinfo->atmel_lcdfb_power_control)
10710 + sinfo->atmel_lcdfb_power_control(0);
10711 + atmel_lcdfb_stop_clock(sinfo);
10712
10713 -// FIXME need suspend, resume
10714 + return 0;
10715 +}
10716 +
10717 +static int atmel_lcdfb_resume(struct platform_device *pdev)
10718 +{
10719 + struct fb_info *info = platform_get_drvdata(pdev);
10720 + struct atmel_lcdfb_info *sinfo = info->par;
10721
10722 + atmel_lcdfb_start_clock(sinfo);
10723 + if (sinfo->atmel_lcdfb_power_control)
10724 + sinfo->atmel_lcdfb_power_control(1);
10725 + lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
10726 +
10727 + return 0;
10728 +}
10729 +
10730 +#else
10731 +#define atmel_lcdfb_suspend NULL
10732 +#define atmel_lcdfb_resume NULL
10733 +#endif
10734 +
10735 +
10736 +static struct platform_driver atmel_lcdfb_driver = {
10737 + .remove = __exit_p(atmel_lcdfb_remove),
10738 + .suspend = atmel_lcdfb_suspend,
10739 + .resume = atmel_lcdfb_resume,
10740 .driver = {
10741 .name = "atmel_lcdfb",
10742 .owner = THIS_MODULE,
10743 diff -urN -x CVS linux-2.6.25/drivers/video/backlight/Kconfig linux-2.6/drivers/video/backlight/Kconfig
10744 --- linux-2.6.25/drivers/video/backlight/Kconfig 2008-05-03 00:15:50.000000000 +0200
10745 +++ linux-2.6/drivers/video/backlight/Kconfig 2008-03-09 18:51:50.000000000 +0200
10746 @@ -112,3 +112,11 @@
10747 help
10748 If you have a Intel LE80578 (Carillo Ranch) say Y to enable the
10749 backlight driver.
10750 +
10751 +config BACKLIGHT_KB920x
10752 + tristate "KwikByte KB9202 Backlight Driver"
10753 + depends on BACKLIGHT_CLASS_DEVICE && MACH_KB9200
10754 + default y
10755 + help
10756 + If you have a KwikByte KB9202 board, say Y to enable the
10757 + backlight driver.
10758 diff -urN -x CVS linux-2.6.25/drivers/video/backlight/Makefile linux-2.6/drivers/video/backlight/Makefile
10759 --- linux-2.6.25/drivers/video/backlight/Makefile 2008-05-03 00:15:50.000000000 +0200
10760 +++ linux-2.6/drivers/video/backlight/Makefile 2008-03-09 15:14:55.000000000 +0200
10761 @@ -10,3 +10,4 @@
10762 obj-$(CONFIG_BACKLIGHT_OMAP1) += omap1_bl.o
10763 obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o
10764 obj-$(CONFIG_BACKLIGHT_CARILLO_RANCH) += cr_bllcd.o
10765 +obj-$(CONFIG_BACKLIGHT_KB920x) += kb920x_bl.o
10766 diff -urN -x CVS linux-2.6.25/drivers/video/backlight/kb920x_bl.c linux-2.6/drivers/video/backlight/kb920x_bl.c
10767 --- linux-2.6.25/drivers/video/backlight/kb920x_bl.c 1970-01-01 02:00:00.000000000 +0200
10768 +++ linux-2.6/drivers/video/backlight/kb920x_bl.c 2008-03-09 21:41:20.000000000 +0200
10769 @@ -0,0 +1,164 @@
10770 +/*
10771 + * Backlight Driver for KB9202
10772 + *
10773 + * Copyright (c) 2006 KwikByte
10774 + *
10775 + * Based on Sharp's Corgi Backlight Driver
10776 + *
10777 + * This file is subject to the terms and conditions of the GNU General Public
10778 + * License. See the file "COPYING" in the main directory of this archive
10779 + * for more details.
10780 + */
10781 +
10782 +#include <linux/module.h>
10783 +#include <linux/kernel.h>
10784 +#include <linux/init.h>
10785 +#include <linux/platform_device.h>
10786 +#include <linux/spinlock.h>
10787 +#include <linux/fb.h>
10788 +#include <linux/backlight.h>
10789 +
10790 +#include <asm/arch/gpio.h>
10791 +
10792 +/* The backlight is on(1)/off(0) */
10793 +#define KB9202_DEFAULT_INTENSITY 1
10794 +#define KB9202_MAX_INTENSITY 1
10795 +
10796 +static int kb9202bl_suspended;
10797 +static int current_intensity = 0;
10798 +static DEFINE_SPINLOCK(bl_lock);
10799 +
10800 +static int kb9202bl_set_intensity(struct backlight_device *bd)
10801 +{
10802 + unsigned long flags;
10803 + int intensity = bd->props.brightness;
10804 +
10805 + if (bd->props.power != FB_BLANK_UNBLANK)
10806 + intensity = 0;
10807 + if (bd->props.fb_blank != FB_BLANK_UNBLANK)
10808 + intensity = 0;
10809 + if (kb9202bl_suspended)
10810 + intensity = 0;
10811 +
10812 + if ((!current_intensity) && (bd->props.power == FB_BLANK_UNBLANK))
10813 + intensity = 1;
10814 +
10815 + spin_lock_irqsave(&bl_lock, flags);
10816 + if (intensity)
10817 + gpio_set_value(AT91_PIN_PC23, 1);
10818 + else
10819 + gpio_set_value(AT91_PIN_PC23, 0);
10820 + spin_unlock_irqrestore(&bl_lock, flags);
10821 +
10822 + current_intensity = intensity;
10823 +
10824 + return 0;
10825 +}
10826 +
10827 +static int kb9202bl_get_intensity(struct backlight_device *bd)
10828 +{
10829 + return current_intensity;
10830 +}
10831 +
10832 +static struct backlight_ops kb9202bl_ops = {
10833 + .get_brightness = kb9202bl_get_intensity,
10834 + .update_status = kb9202bl_set_intensity,
10835 +};
10836 +
10837 +static int __init kb9202bl_probe(struct platform_device *pdev)
10838 +{
10839 + struct backlight_device *bd;
10840 +
10841 + bd = backlight_device_register ("kb9202-bl", &pdev->dev, NULL, &kb9202bl_ops);
10842 + if (IS_ERR(bd))
10843 + return PTR_ERR(bd);
10844 +
10845 + platform_set_drvdata(pdev, bd);
10846 +
10847 + bd->props.max_brightness = KB9202_MAX_INTENSITY;
10848 + bd->props.brightness = KB9202_DEFAULT_INTENSITY;
10849 + (void) kb9202bl_set_intensity(bd);
10850 +
10851 + return 0;
10852 +}
10853 +
10854 +static int kb9202bl_remove(struct platform_device *pdev)
10855 +{
10856 + struct backlight_device *bd = platform_get_drvdata(pdev);
10857 +
10858 + bd->props.brightness = 0;
10859 + bd->props.power = 0;
10860 + (void) kb9202bl_set_intensity(bd);
10861 +
10862 + backlight_device_unregister(bd);
10863 +
10864 + return 0;
10865 +}
10866 +
10867 +#ifdef CONFIG_PM
10868 +static int kb9202bl_suspend(struct platform_device *pdev, pm_message_t state)
10869 +{
10870 + struct backlight_device *bd = platform_get_drvdata(pdev);
10871 +
10872 + kb9202bl_suspended = 1;
10873 + (void) kb9202bl_set_intensity(bd);
10874 + return 0;
10875 +}
10876 +
10877 +static int kb9202bl_resume(struct platform_device *pdev)
10878 +{
10879 + struct backlight_device *bd = platform_get_drvdata(pdev);
10880 +
10881 + kb9202bl_suspended = 0;
10882 + (void) kb9202bl_set_intensity(bd);
10883 + return 0;
10884 +}
10885 +#else
10886 +#define kb9202bl_suspend NULL
10887 +#define kb9202bl_resume NULL
10888 +#endif
10889 +
10890 +static struct platform_driver kb9202bl_driver = {
10891 + .probe = kb9202bl_probe,
10892 + .remove = kb9202bl_remove,
10893 + .suspend = kb9202bl_suspend,
10894 + .resume = kb9202bl_resume,
10895 + .driver = {
10896 + .name = "kb9202-bl",
10897 + .owner = THIS_MODULE,
10898 + },
10899 +};
10900 +
10901 +static struct platform_device *kb9202bl_device;
10902 +
10903 +static int __init kb9202bl_init(void)
10904 +{
10905 + int ret;
10906 +
10907 + ret = platform_driver_register(&kb9202bl_driver);
10908 + if (!ret) {
10909 + kb9202bl_device = platform_device_alloc("kb9202-bl", -1);
10910 + if (!kb9202bl_device)
10911 + return -ENOMEM;
10912 +
10913 + ret = platform_device_add(kb9202bl_device);
10914 + if (ret) {
10915 + platform_device_put(kb9202bl_device);
10916 + platform_driver_unregister(&kb9202bl_driver);
10917 + }
10918 + }
10919 + return ret;
10920 +}
10921 +
10922 +static void __exit kb9202bl_exit(void)
10923 +{
10924 + platform_device_unregister(kb9202bl_device);
10925 + platform_driver_unregister(&kb9202bl_driver);
10926 +}
10927 +
10928 +module_init(kb9202bl_init);
10929 +module_exit(kb9202bl_exit);
10930 +
10931 +MODULE_AUTHOR("KwikByte <kb9200_dev@kwikbyte.com>");
10932 +MODULE_DESCRIPTION("KB9202 Backlight Driver");
10933 +MODULE_LICENSE("GPL");
10934 diff -urN -x CVS linux-2.6.25/drivers/video/s1d15605fb.c linux-2.6/drivers/video/s1d15605fb.c
10935 --- linux-2.6.25/drivers/video/s1d15605fb.c 1970-01-01 02:00:00.000000000 +0200
10936 +++ linux-2.6/drivers/video/s1d15605fb.c 2008-05-03 00:36:04.000000000 +0200
10937 @@ -0,0 +1,655 @@
10938 +/*
10939 + * drivers/video/s1d15605.c
10940 + *
10941 + * Adapted from several sources including:
10942 + * 1) Driver for AT91 LCD Controller
10943 + * Copyright (C) 2006 Atmel
10944 + *
10945 + * 2) Copyright (C) 2005 S. Kevin Hester
10946 + *
10947 + * This file is subject to the terms and conditions of the GNU General Public
10948 + * License. See the file COPYING in the main directory of this archive for
10949 + * more details.
10950 + *
10951 + * This is a basic framebuffer driver for the Optrex F-51320 128x64 mono LCD
10952 + * display. This display uses a clone of the common Epson SED 1531 display
10953 + * controller.
10954 + *
10955 + * I've heavily borrowed code from the vfb.c driver.
10956 + *
10957 + * This program is free software; you can redistribute it and/or modify
10958 + * it under the terms of the GNU General Public License as published by
10959 + * the Free Software Foundation; either version 2 of the License, or
10960 + * (at your option) any later version.
10961 + *
10962 + * This program is distributed in the hope that it will be useful,
10963 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
10964 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10965 + * GNU General Public License for more details.
10966 + *
10967 + * You should have received a copy of the GNU General Public License
10968 + * along with this program; if not, write to the Free Software
10969 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
10970 + */
10971 +
10972 +#ifdef DEBUG
10973 +#define MSG(string, args...) printk("s1d15605fb:" string, ##args)
10974 +#else
10975 +#define MSG(string, args...)
10976 +#endif
10977 +
10978 +#include <linux/kernel.h>
10979 +#include <linux/platform_device.h>
10980 +#include <linux/dma-mapping.h>
10981 +#include <linux/interrupt.h>
10982 +#include <linux/clk.h>
10983 +#include <linux/fb.h>
10984 +#include <linux/init.h>
10985 +#include <linux/delay.h>
10986 +
10987 +#include <asm/uaccess.h>
10988 +
10989 +#include <asm/arch/board.h>
10990 +#include <asm/arch/gpio.h>
10991 +
10992 +#ifdef CONFIG_PMAC_BACKLIGHT
10993 +#include <asm/backlight.h>
10994 +#endif
10995 +
10996 +#define VIDEOWIDTH 128
10997 +#define VIDEOHEIGHT 64
10998 +#define VIDEODEPTH 1 /* bits/pixel */
10999 +#define VIDEOWIDTH_BYTES ((VIDEOWIDTH * VIDEODEPTH) / 8)
11000 +
11001 +/* The number of bytes that actually go to the device */
11002 +#define ACTUALVIDEOMEMSIZE (VIDEOWIDTH_BYTES * VIDEOHEIGHT)
11003 +#define VIDEOMEMSIZE PAGE_SIZE
11004 +
11005 +static struct fb_var_screeninfo s1d15605_default __initdata = {
11006 + .xres = VIDEOWIDTH,
11007 + .yres = VIDEOHEIGHT,
11008 + .xres_virtual = VIDEOWIDTH,
11009 + .yres_virtual = VIDEOHEIGHT,
11010 + .bits_per_pixel = VIDEODEPTH,
11011 + .red = { 0, 1, 0 },
11012 + .green = { 0, 1, 0 },
11013 + .blue = { 0, 1, 0 },
11014 + .activate = FB_ACTIVATE_NOW,
11015 + .pixclock = 20000,
11016 + .vmode = FB_VMODE_NONINTERLACED,
11017 +};
11018 +
11019 +static struct fb_fix_screeninfo s1d15605_fix __initdata = {
11020 + .id = "s1d15605",
11021 + .type = FB_TYPE_PACKED_PIXELS,
11022 + .visual = FB_VISUAL_MONO10,
11023 + .xpanstep = 0,
11024 + .ypanstep = 0,
11025 + .ywrapstep = 0,
11026 + .accel = FB_ACCEL_NONE,
11027 +};
11028 +
11029 +struct s1d15605fb_info {
11030 + struct fb_info *info;
11031 + char *mmio;
11032 + unsigned long reset_pin;
11033 + struct platform_device *pdev;
11034 +};
11035 +
11036 +/*
11037 + * LCD device interface
11038 + */
11039 +#define RESET_DISPLAY 0xE2
11040 +#define LCD_BIAS_1_9 0xA2
11041 +#define ADC_SELECT_REVERSE 0xA1
11042 +#define COMMON_OUTPUT_NORMAL 0xC0
11043 +#define V5_RESISTOR_RATIO 0x26
11044 +#define ELECTRONIC_VOLUME_SET 0x81
11045 +#define ELECTRONIC_VOLUME_INIT 0x20
11046 +#define POWER_CONTROL_SET 0x28
11047 +#define VOLTAGE_REGULATOR 0x02
11048 +#define VOLTAGE_FOLLOWER 0x01
11049 +#define BOOSTER_CIRCUIT 0x04
11050 +#define DISPLAY_ON 0xAF
11051 +#define START_LINE_SET 0x40
11052 +#define PAGE_ADDRESS_SET 0xB0
11053 +#define COLUMN_ADDRESS_HIGH 0x10
11054 +#define COLUMN_ADDRESS_LOW 0x00
11055 +#define RESISTOR_RATIO_START 0x20
11056 +
11057 +#define NUM_OF_PAGES 8
11058 +#define NUM_OF_COLUMNS 128
11059 +
11060 +#define WRITE_COMMAND(x) __raw_writeb((x), (sinfo)->mmio)
11061 +#define READ_COMMAND __raw_readb((sinfo)->mmio)
11062 +#define WRITE_DATA(x) __raw_writeb((x), (sinfo)->mmio + (0x10000))
11063 +#define READ_DATA __raw_readb((sinfo)->mmio + (0x10000))
11064 +
11065 +
11066 +/*
11067 + * s1d15605fb_resize_framebuffer
11068 + *
11069 + * Free allocated space if different. Allocate on new of changed.
11070 + * Returns -ENOMEM if the new framebuffer can not be allocated,
11071 + * zero on success.
11072 + */
11073 +static int s1d15605fb_resize_framebuffer(struct s1d15605fb_info *sinfo)
11074 +{
11075 + struct fb_info *info = sinfo->info;
11076 + struct fb_fix_screeninfo *fix = &info->fix;
11077 + struct fb_var_screeninfo *var = &info->var;
11078 + unsigned int new_size;
11079 + void *new_vaddr;
11080 +
11081 + new_size = ((var->xres_virtual * var->yres_virtual * var->bits_per_pixel) / 8);
11082 +
11083 + MSG("%s: x (%d) y (%d) bpp (%d): new size 0x%08x\n", __FUNCTION__,
11084 + var->xres_virtual, var->yres_virtual, var->bits_per_pixel, new_size);
11085 +
11086 + if (new_size == fix->smem_len)
11087 + return 0;
11088 +
11089 + if (fix->smem_len) {
11090 + kfree(info->screen_base);
11091 + }
11092 +
11093 + new_vaddr = kmalloc(new_size, GFP_KERNEL);
11094 +
11095 + if (!new_vaddr) {
11096 + fix->smem_len = 0;
11097 + return -ENOMEM;
11098 + }
11099 +
11100 + info->screen_base = new_vaddr;
11101 + fix->smem_start = (unsigned)new_vaddr;
11102 + fix->smem_len = new_size;
11103 + fix->line_length = (var->xres_virtual * var->bits_per_pixel) / 8;
11104 +
11105 + dev_info(info->device,
11106 + "%luKiB frame buffer at %08lx (mapped at %p)\n",
11107 + (unsigned long)info->fix.smem_len / 1024,
11108 + (unsigned long)info->fix.smem_start,
11109 + info->screen_base);
11110 +
11111 + return 0;
11112 +}
11113 +
11114 +
11115 +/*
11116 + * The s1d15605 seems to be divided into eight 128 pixel wide pages (from top to
11117 + * bottom) each page seems to be eight pixels high, where these eight pixels are
11118 + * one byte
11119 + */
11120 +static void s1d15605_update(struct fb_info *info)
11121 +{
11122 + struct s1d15605fb_info *sinfo = info->par;
11123 + int page, i, row, colmask;
11124 + u8 retVal, *rowPtr;
11125 +
11126 + WRITE_COMMAND(START_LINE_SET);
11127 + for (page = 0; page < NUM_OF_PAGES; ++page) {
11128 + WRITE_COMMAND(PAGE_ADDRESS_SET + page);
11129 + WRITE_COMMAND(COLUMN_ADDRESS_HIGH);
11130 + WRITE_COMMAND(COLUMN_ADDRESS_LOW);
11131 +
11132 + for (i = 0; i < NUM_OF_COLUMNS; ++i)
11133 + {
11134 + /* point of opportunity: optimization */
11135 + colmask = (1 << (i & 0x7));
11136 + rowPtr = (u8*)(info->screen_base);
11137 + rowPtr += (VIDEOWIDTH_BYTES * 8 * page);
11138 + rowPtr += (i >> 3);
11139 + retVal = 0;
11140 + for (row = 0; row < 8; ++row)
11141 + {
11142 + retVal = (retVal >> 1) | (((*rowPtr) & colmask) ? 0x80 : 0);
11143 + rowPtr += VIDEOWIDTH_BYTES;
11144 + }
11145 + WRITE_DATA(retVal);
11146 + }
11147 + }
11148 +
11149 + WRITE_COMMAND(DISPLAY_ON);
11150 +}
11151 +
11152 +
11153 +/*
11154 + * Setting the video mode has been split into two parts.
11155 + * First part, xxxfb_check_var, must not write anything
11156 + * to hardware, it should only verify and adjust var.
11157 + * This means it doesn't alter par but it does use hardware
11158 + * data from it to check this var.
11159 + */
11160 +static int s1d15605_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
11161 +{
11162 + /*
11163 + * Some very basic checks
11164 + */
11165 + if (!var->xres)
11166 + var->xres = 1;
11167 + if (!var->yres)
11168 + var->yres = 1;
11169 + if (var->xres > var->xres_virtual)
11170 + var->xres_virtual = var->xres;
11171 + if (var->yres > var->yres_virtual)
11172 + var->yres_virtual = var->yres;
11173 +
11174 + if(var->bits_per_pixel > VIDEODEPTH)
11175 + return -EINVAL;
11176 +
11177 + /*
11178 + * Memory limit
11179 + */
11180 + if (((var->yres_virtual * var->bits_per_pixel * var->yres_virtual) >> 3) >
11181 + ACTUALVIDEOMEMSIZE)
11182 + return -ENOMEM;
11183 +
11184 + /*
11185 + * Now that we checked it we alter var. The reason being is that the video
11186 + * mode passed in might not work but slight changes to it might make it
11187 + * work. This way we let the user know what is acceptable.
11188 + */
11189 + switch (var->bits_per_pixel) {
11190 + case 1:
11191 + var->red.offset = var->green.offset = var->blue.offset = 0;
11192 + var->red.length = var->green.length = var->blue.length
11193 + = var->bits_per_pixel;
11194 + break;
11195 + default:
11196 + return -EINVAL;
11197 + }
11198 +
11199 + var->xoffset = var->yoffset = 0;
11200 + var->red.msb_right = var->green.msb_right = var->blue.msb_right =
11201 + var->transp.msb_right = 0;
11202 +
11203 + return 0;
11204 +}
11205 +
11206 +
11207 +/*
11208 + * This routine actually sets the video mode. It's in here where we
11209 + * the hardware state info->par and fix which can be affected by the
11210 + * change in par. For this driver it doesn't do much.
11211 + */
11212 +static int s1d15605_set_par(struct fb_info *info)
11213 +{
11214 + int ret;
11215 +
11216 + MSG("%s:\n", __func__);
11217 + MSG(" * resolution: %ux%u (%ux%u virtual)\n",
11218 + info->var.xres, info->var.yres,
11219 + info->var.xres_virtual, info->var.yres_virtual);
11220 +
11221 + ret = s1d15605fb_resize_framebuffer(info->par);
11222 +
11223 + info->fix.visual = FB_VISUAL_MONO10;
11224 + return ret;
11225 +}
11226 +
11227 +
11228 +/*
11229 + * Set a single color register. The values supplied are already
11230 + * rounded down to the hardware's capabilities (according to the
11231 + * entries in the var structure). Return != 0 for invalid regno.
11232 + */
11233 +static int s1d15605_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
11234 + u_int transp, struct fb_info *info)
11235 +{
11236 + if (regno > 1) /* no. of hw registers - we only do mono now */
11237 + return 1;
11238 +
11239 + return 0;
11240 +}
11241 +
11242 +
11243 +/*
11244 + * Currently, the routine will simply shut-off the backlight and prevent
11245 + * updates/refreshes. Modify according to application.
11246 + *
11247 + * 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off
11248 + */
11249 +static int s1d15605_blank(int blank, struct fb_info *info)
11250 +{
11251 +#ifdef CONFIG_PMAC_BACKLIGHT
11252 + if (blank)
11253 + pmac_backlight->props.power = FB_BLANK_POWERDOWN;
11254 + else
11255 + pmac_backlight->props.power = FB_BLANK_UNBLANK;
11256 + backlight_update_status(pmac_backlight);
11257 +#endif
11258 + return 1;
11259 +}
11260 +
11261 +
11262 +/*
11263 + * Pan or Wrap the Display
11264 + *
11265 + * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag
11266 + */
11267 +/*
11268 +static int s1d15605_pan_display(struct fb_var_screeninfo *var,
11269 + struct fb_info *info)
11270 +{
11271 + if (var->vmode & FB_VMODE_YWRAP) {
11272 + if (var->yoffset < 0
11273 + || var->yoffset >= info->var.yres_virtual
11274 + || var->xoffset)
11275 + return -EINVAL;
11276 + } else {
11277 + if (var->xoffset + var->xres > info->var.xres_virtual ||
11278 + var->yoffset + var->yres > info->var.yres_virtual)
11279 + return -EINVAL;
11280 + }
11281 + info->var.xoffset = var->xoffset;
11282 + info->var.yoffset = var->yoffset;
11283 + if (var->vmode & FB_VMODE_YWRAP)
11284 + info->var.vmode |= FB_VMODE_YWRAP;
11285 + else
11286 + info->var.vmode &= ~FB_VMODE_YWRAP;
11287 + return 0;
11288 +}
11289 +*/
11290 +
11291 +
11292 +static void s1d15605_copyarea(struct fb_info *info, const struct fb_copyarea *region)
11293 +{
11294 + cfb_copyarea(info, region);
11295 + s1d15605_update(info);
11296 +}
11297 +
11298 +
11299 +static void s1d15605_fillrect (struct fb_info *info, const struct fb_fillrect *rect)
11300 +{
11301 + cfb_fillrect(info, rect);
11302 + s1d15605_update(info);
11303 +}
11304 +
11305 +
11306 +static void s1d15605_imageblit(struct fb_info *p, const struct fb_image *image)
11307 +{
11308 + cfb_imageblit(p, image);
11309 + s1d15605_update(p);
11310 +}
11311 +
11312 +
11313 +/*
11314 + * Write the users data to our framebuffer, and then trigger a psuedo DMA
11315 + */
11316 +static ssize_t s1d15605_write(struct fb_info *info, const char *buf,
11317 + size_t count, loff_t *ppos)
11318 +{
11319 + unsigned long p = *ppos;
11320 + int err;
11321 +
11322 + if (p > info->fix.smem_len)
11323 + return -ENOSPC;
11324 + if (count >= info->fix.smem_len)
11325 + count = info->fix.smem_len;
11326 + err = 0;
11327 + if (count + p > info->fix.smem_len) {
11328 + count = info->fix.smem_len - p;
11329 + err = -ENOSPC;
11330 + }
11331 + if (count) {
11332 + char *base_addr;
11333 +
11334 + base_addr = info->screen_base;
11335 + count -= copy_from_user(base_addr+p, buf, count);
11336 + *ppos += count;
11337 + err = -EFAULT;
11338 + }
11339 +
11340 + s1d15605_update(info);
11341 +
11342 + if (count)
11343 + return count;
11344 +
11345 + return err;
11346 +}
11347 +
11348 +#ifdef USE_PRIVATE_VMA_FXS
11349 +static void s1d15605_vma_open(struct vm_area_struct *vma)
11350 +{
11351 + // FIXME - store stats in the device data via vm_private_data
11352 +}
11353 +
11354 +
11355 +static void s1d15605_vma_close(struct vm_area_struct *vma)
11356 +{
11357 + // FIXME - store stats in the device data via vm_private_data
11358 +}
11359 +
11360 +
11361 +static struct page *s1d15605_vma_nopage(struct vm_area_struct *vma,
11362 + unsigned long address, int *type)
11363 +{
11364 + struct page *page;
11365 + struct fb_info *info = vma->vm_private_data;
11366 +
11367 + page = virt_to_page(info->screen_base);
11368 + get_page(page);
11369 +
11370 + // FIXME - now someone has a link to our page, start periodically blitting
11371 + // latest updates to the actual device.
11372 +
11373 + return page;
11374 +}
11375 +
11376 +
11377 +static struct vm_operations_struct s1d15605_vm_ops = {
11378 + .open = s1d15605_vma_open,
11379 + .close = s1d15605_vma_close,
11380 + .nopage = s1d15605_vma_nopage
11381 +};
11382 +
11383 +
11384 +/* We don't do much here - because we have special vm_ops */
11385 +static int s1d15605_mmap(struct fb_info *info, struct vm_area_struct *vma)
11386 +{
11387 + vma->vm_ops = &s1d15605_vm_ops;
11388 + vma->vm_flags |= VM_RESERVED;
11389 + vma->vm_private_data = info;
11390 + s1d15605_vma_open(vma);
11391 +
11392 + return 0;
11393 +}
11394 +#endif /* USE_PRIVATE_VMA_FXS */
11395 +
11396 +
11397 +static struct fb_ops s1d15605fb_ops = {
11398 + .owner = THIS_MODULE,
11399 + .fb_check_var = s1d15605_check_var,
11400 + .fb_set_par = s1d15605_set_par,
11401 + .fb_setcolreg = s1d15605_setcolreg,
11402 + .fb_blank = s1d15605_blank,
11403 +// .fb_pan_display = s1d15605_pan_display,
11404 + .fb_fillrect = s1d15605_fillrect,
11405 + .fb_copyarea = s1d15605_copyarea,
11406 + .fb_imageblit = s1d15605_imageblit,
11407 + .fb_write = s1d15605_write,
11408 +#ifdef USE_PRIVATE_VMA_FXS
11409 + .fb_mmap = s1d15605_mmap,
11410 +#endif
11411 +};
11412 +
11413 +
11414 +static void s1d15605_device_init(struct s1d15605fb_info *sinfo) {
11415 +
11416 + char value;
11417 +
11418 + /* release the reset line by reading the device - proto hardware */
11419 + value = READ_COMMAND;
11420 + value = READ_COMMAND;
11421 +
11422 +#ifdef CONFIG_MACH_KB9200
11423 + /* new boards have dedicated reset line */
11424 + gpio_set_value(sinfo->reset_pin, 1);
11425 +#endif
11426 +
11427 + /* initialize the device within 5ms */
11428 + WRITE_COMMAND(RESET_DISPLAY);
11429 + WRITE_COMMAND(LCD_BIAS_1_9);
11430 + WRITE_COMMAND(ADC_SELECT_REVERSE);
11431 + WRITE_COMMAND(COMMON_OUTPUT_NORMAL);
11432 + WRITE_COMMAND(V5_RESISTOR_RATIO);
11433 + WRITE_COMMAND(ELECTRONIC_VOLUME_SET);
11434 + WRITE_COMMAND(ELECTRONIC_VOLUME_INIT);
11435 + WRITE_COMMAND(POWER_CONTROL_SET | VOLTAGE_REGULATOR | VOLTAGE_FOLLOWER | BOOSTER_CIRCUIT);
11436 + WRITE_COMMAND(DISPLAY_ON);
11437 +
11438 + WRITE_COMMAND(RESISTOR_RATIO_START + 4);
11439 + WRITE_COMMAND(ELECTRONIC_VOLUME_SET);
11440 + WRITE_COMMAND(0x33);
11441 +}
11442 +
11443 +
11444 +static int __init s1d15605fb_probe(struct platform_device *pdev)
11445 +{
11446 + struct device *dev = &pdev->dev;
11447 + struct fb_info *info;
11448 + struct s1d15605fb_info *sinfo;
11449 + int ret;
11450 +
11451 + MSG("%s\n", __func__);
11452 +
11453 + if (!(info = framebuffer_alloc(sizeof(struct s1d15605fb_info), dev))) {
11454 + dev_err(dev, "Cannot allocate framebuffer struct\n");
11455 + return -ENOMEM;
11456 + }
11457 +
11458 + sinfo = info->par;
11459 + sinfo->info = info;
11460 + sinfo->pdev = pdev;
11461 +
11462 + if (pdev->num_resources < 2) {
11463 + dev_err(dev, "Resources unusable\n");
11464 + ret = -ENODEV;
11465 + goto free_info;
11466 + }
11467 +
11468 + info->fbops = &s1d15605fb_ops;
11469 + strcpy(info->fix.id, pdev->name);
11470 +
11471 + info->fix.mmio_start = pdev->resource[0].start;
11472 + info->fix.mmio_len = pdev->resource[0].end - pdev->resource[0].start + 1;
11473 + sinfo->reset_pin = pdev->resource[1].start;
11474 +
11475 + ret = s1d15605fb_resize_framebuffer(sinfo);
11476 + if (ret < 0) {
11477 + dev_err(dev, "Cannot resize framebuffer: %d\n", ret);
11478 + goto free_fb;
11479 + }
11480 +
11481 + if (!request_mem_region(info->fix.mmio_start,
11482 + info->fix.mmio_len, pdev->name)) {
11483 + ret = -EBUSY;
11484 + goto free_fb;
11485 + }
11486 +
11487 + sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
11488 + if (!sinfo->mmio) {
11489 + dev_err(dev, "Cannot map LCD memory region\n");
11490 + goto release_mem;
11491 + }
11492 +
11493 + s1d15605_device_init(sinfo);
11494 +
11495 + ret = fb_find_mode(&info->var, info, NULL, NULL, 0, NULL, 1);
11496 +
11497 + if (!ret || (ret == 4))
11498 + info->var = s1d15605_default;
11499 +
11500 + info->fix = s1d15605_fix;
11501 + info->flags = FBINFO_FLAG_DEFAULT |
11502 +/* FBINFO_HWACCEL_YPAN | */
11503 + FBINFO_HWACCEL_FILLRECT | FBINFO_HWACCEL_COPYAREA;
11504 +
11505 + ret = register_framebuffer(info);
11506 + if (ret < 0) {
11507 + dev_err(dev, "Failed to register framebuffer device: %d\n", ret);
11508 + goto unmap_mmio;
11509 + }
11510 +
11511 + dev_set_drvdata(dev, info);
11512 +
11513 + memset(info->screen_base, 0, info->fix.smem_len);
11514 + info->var.activate |= FB_ACTIVATE_NOW;
11515 + ret = fb_set_var(info, &info->var);
11516 + if (ret) {
11517 + dev_warn(dev, "Unable to set display parameters\n");
11518 + }
11519 +
11520 + info->var.activate &= ~(FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW);
11521 +
11522 + dev_dbg(dev, "%s SUCCESS\n", __func__);
11523 +
11524 + dev_info(dev, "Driver $Revision: 1.1 $\n");
11525 +
11526 + return 0;
11527 +
11528 +unmap_mmio:
11529 + iounmap(sinfo->mmio);
11530 +release_mem:
11531 + release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
11532 +free_fb:
11533 + kfree(info->screen_base);
11534 +
11535 +free_info:
11536 + framebuffer_release(info);
11537 +
11538 + dev_dbg(dev, "%s FAILED\n", __func__);
11539 + return ret;
11540 +}
11541 +
11542 +
11543 +static int __exit s1d15605fb_remove(struct platform_device *pdev)
11544 +{
11545 + struct device *dev = &pdev->dev;
11546 + struct fb_info *info = dev_get_drvdata(dev);
11547 + struct s1d15605fb_info *sinfo = info->par;
11548 +
11549 + if (!sinfo)
11550 + return 0;
11551 +
11552 + unregister_framebuffer(info);
11553 +
11554 + iounmap(sinfo->mmio);
11555 + release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
11556 +
11557 + kfree(info->screen_base);
11558 +
11559 + dev_set_drvdata(dev, NULL);
11560 + framebuffer_release(info);
11561 + return 0;
11562 +}
11563 +
11564 +
11565 +static struct platform_driver s1d15605fb_driver = {
11566 + .remove = __exit_p(s1d15605fb_remove),
11567 + .driver = {
11568 + .name = "s1d15605fb",
11569 + .owner = THIS_MODULE,
11570 + },
11571 +};
11572 +
11573 +
11574 +static int __init s1d15605fb_init(void)
11575 +{
11576 + return platform_driver_probe(&s1d15605fb_driver, s1d15605fb_probe);
11577 +}
11578 +
11579 +
11580 +static void __exit s1d15605fb_exit(void)
11581 +{
11582 + platform_driver_unregister(&s1d15605fb_driver);
11583 +}
11584 +
11585 +
11586 +module_init(s1d15605fb_init);
11587 +module_exit(s1d15605fb_exit);
11588 +
11589 +
11590 +MODULE_AUTHOR("KwikByte");
11591 +MODULE_DESCRIPTION("Epson S1D15605 LCD Controller framebuffer driver");
11592 +MODULE_LICENSE("GPL");
11593 diff -urN -x CVS linux-2.6.25/drivers/watchdog/Kconfig linux-2.6/drivers/watchdog/Kconfig
11594 --- linux-2.6.25/drivers/watchdog/Kconfig 2008-05-03 00:15:50.000000000 +0200
11595 +++ linux-2.6/drivers/watchdog/Kconfig 2008-03-09 15:14:55.000000000 +0200
11596 @@ -66,6 +66,14 @@
11597 Watchdog timer embedded into AT91RM9200 chips. This will reboot your
11598 system when the timeout is reached.
11599
11600 +config AT91SAM9_WATCHDOG
11601 + tristate "AT91SAM9 watchdog"
11602 + depends on ARCH_AT91 && !ARCH_AT91RM9200
11603 + select WATCHDOG_NOWAYOUT
11604 + help
11605 + Watchdog timer embedded into AT91SAM9 chips. This will reboot your
11606 + system when the timeout is reached.
11607 +
11608 config 21285_WATCHDOG
11609 tristate "DC21285 watchdog"
11610 depends on FOOTBRIDGE
11611 diff -urN -x CVS linux-2.6.25/drivers/watchdog/Makefile linux-2.6/drivers/watchdog/Makefile
11612 --- linux-2.6.25/drivers/watchdog/Makefile 2008-05-03 00:15:50.000000000 +0200
11613 +++ linux-2.6/drivers/watchdog/Makefile 2008-03-09 15:14:55.000000000 +0200
11614 @@ -26,6 +26,7 @@
11615
11616 # ARM Architecture
11617 obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o
11618 +obj-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o
11619 obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
11620 obj-$(CONFIG_21285_WATCHDOG) += wdt285.o
11621 obj-$(CONFIG_977_WATCHDOG) += wdt977.o
11622 diff -urN -x CVS linux-2.6.25/drivers/watchdog/at91sam9_wdt.c linux-2.6/drivers/watchdog/at91sam9_wdt.c
11623 --- linux-2.6.25/drivers/watchdog/at91sam9_wdt.c 1970-01-01 02:00:00.000000000 +0200
11624 +++ linux-2.6/drivers/watchdog/at91sam9_wdt.c 2008-04-15 21:53:41.000000000 +0200
11625 @@ -0,0 +1,259 @@
11626 +/*
11627 + * Watchdog driver for Atmel AT91SAM9x processors.
11628 + *
11629 + * Copyright (C) 2007 Renaud CERRATO r.cerrato@til-technologies.fr
11630 + *
11631 + * This program is free software; you can redistribute it and/or
11632 + * modify it under the terms of the GNU General Public License
11633 + * as published by the Free Software Foundation; either version
11634 + * 2 of the License, or (at your option) any later version.
11635 + */
11636 +
11637 +/*
11638 + * The Watchdog Timer Mode Register can be only written to once. If the
11639 + * timeout need to be set from Linux, be sure that the bootstrap or the
11640 + * bootloader doesn't write to this register.
11641 + */
11642 +
11643 +#include <linux/errno.h>
11644 +#include <linux/fs.h>
11645 +#include <linux/init.h>
11646 +#include <linux/kernel.h>
11647 +#include <linux/miscdevice.h>
11648 +#include <linux/module.h>
11649 +#include <linux/moduleparam.h>
11650 +#include <linux/platform_device.h>
11651 +#include <linux/types.h>
11652 +#include <linux/watchdog.h>
11653 +#include <linux/bitops.h>
11654 +#include <linux/uaccess.h>
11655 +
11656 +#include <asm/arch/at91_wdt.h>
11657 +
11658 +
11659 +#define WDT_MAX_TIME 16 /* seconds */
11660 +
11661 +static int wdt_timeout = -1; /* invalid */
11662 +
11663 +module_param(wdt_timeout, int, 0);
11664 +MODULE_PARM_DESC(wdt_timeout, "Watchdog time in seconds. (default = disabled)");
11665 +
11666 +
11667 +static unsigned long at91wdt_busy;
11668 +
11669 +/* ......................................................................... */
11670 +
11671 +/*
11672 + * Reload the watchdog timer. (ie, pat the watchdog)
11673 + */
11674 +static void inline at91_wdt_reload(void)
11675 +{
11676 + at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
11677 +}
11678 +
11679 +/* ......................................................................... */
11680 +
11681 +/*
11682 + * Watchdog device is opened, and watchdog starts running.
11683 + */
11684 +static int at91_wdt_open(struct inode *inode, struct file *file)
11685 +{
11686 + if (test_and_set_bit(0, &at91wdt_busy))
11687 + return -EBUSY;
11688 +
11689 + return nonseekable_open(inode, file);
11690 +}
11691 +
11692 +/*
11693 + * Close the watchdog device.
11694 + */
11695 +static int at91_wdt_close(struct inode *inode, struct file *file)
11696 +{
11697 + clear_bit(0, &at91wdt_busy);
11698 + return 0;
11699 +}
11700 +
11701 +/*
11702 + * Change the watchdog time interval.
11703 + */
11704 +static int at91_wdt_settimeout(int new_time)
11705 +{
11706 + unsigned int reg, mr;
11707 + /*
11708 + * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
11709 + *
11710 + * Since WDV is a 12-bit counter, the maximum period is
11711 + * 4096 / 256 = 16 seconds.
11712 + */
11713 + if ((new_time <= 0) || (new_time > WDT_MAX_TIME))
11714 + return -EINVAL;
11715 +
11716 + wdt_timeout = new_time;
11717 +
11718 + /* Program the Watchdog */
11719 + reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
11720 + | AT91_WDT_WDRPROC /* causes processor reset */
11721 + | AT91_WDT_WDDBGHLT /* disabled in debug mode */
11722 + | AT91_WDT_WDD /* restart at any time */
11723 + | (((wdt_timeout * 256) - 1) & AT91_WDT_WDV); /* timer value */
11724 + at91_sys_write(AT91_WDT_MR, reg);
11725 +
11726 + /* Check if watchdog could be programmed */
11727 + mr = at91_sys_read(AT91_WDT_MR);
11728 + if (mr != reg) {
11729 + printk(KERN_ERR "at91sam9_wdt: Watchdog register already programmed.\n");
11730 + return -EIO;
11731 + }
11732 +
11733 + at91_wdt_reload();
11734 +
11735 + printk(KERN_INFO "AT91SAM9 Watchdog enabled (%d seconds, nowayout)\n", wdt_timeout);
11736 + return 0;
11737 +}
11738 +
11739 +static struct watchdog_info at91_wdt_info = {
11740 + .identity = "at91sam9 watchdog",
11741 + .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
11742 +};
11743 +
11744 +/*
11745 + * Handle commands from user-space.
11746 + */
11747 +static int at91_wdt_ioctl(struct inode *inode, struct file *file,
11748 + unsigned int cmd, unsigned long arg)
11749 +{
11750 + void __user *argp = (void __user *)arg;
11751 + int __user *p = argp;
11752 + int new_value, err;
11753 +
11754 + switch (cmd) {
11755 + case WDIOC_KEEPALIVE:
11756 + at91_wdt_reload(); /* pat the watchdog */
11757 + return 0;
11758 +
11759 + case WDIOC_GETSUPPORT:
11760 + return copy_to_user(argp, &at91_wdt_info, sizeof(at91_wdt_info)) ? -EFAULT : 0;
11761 +
11762 + case WDIOC_SETTIMEOUT:
11763 + if (get_user(new_value, p))
11764 + return -EFAULT;
11765 +
11766 + err = at91_wdt_settimeout(new_value);
11767 + if (err)
11768 + return err;
11769 +
11770 + return put_user(wdt_timeout, p); /* return current value */
11771 +
11772 + case WDIOC_GETTIMEOUT:
11773 + return put_user(wdt_timeout, p);
11774 +
11775 + case WDIOC_GETSTATUS:
11776 + case WDIOC_GETBOOTSTATUS:
11777 + return put_user(0, p);
11778 + }
11779 + return -ENOTTY;
11780 +}
11781 +
11782 +/*
11783 + * Pat the watchdog whenever device is written to.
11784 + */
11785 +static ssize_t at91_wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos)
11786 +{
11787 + at91_wdt_reload(); /* pat the watchdog */
11788 + return len;
11789 +}
11790 +
11791 +/* ......................................................................... */
11792 +
11793 +static const struct file_operations at91wdt_fops = {
11794 + .owner = THIS_MODULE,
11795 + .llseek = no_llseek,
11796 + .ioctl = at91_wdt_ioctl,
11797 + .open = at91_wdt_open,
11798 + .release = at91_wdt_close,
11799 + .write = at91_wdt_write,
11800 +};
11801 +
11802 +static struct miscdevice at91wdt_miscdev = {
11803 + .minor = WATCHDOG_MINOR,
11804 + .name = "watchdog",
11805 + .fops = &at91wdt_fops,
11806 +};
11807 +
11808 +static int __init at91wdt_probe(struct platform_device *pdev)
11809 +{
11810 + int res;
11811 +
11812 + if (at91wdt_miscdev.parent)
11813 + return -EBUSY;
11814 + at91wdt_miscdev.parent = &pdev->dev;
11815 +
11816 + res = misc_register(&at91wdt_miscdev);
11817 + if (res)
11818 + return res;
11819 +
11820 + /* Set watchdog */
11821 + if (at91_wdt_settimeout(wdt_timeout) == -EINVAL) {
11822 + pr_info("at91sam9_wdt: invalid timeout (must be between 1 and %d)\n", WDT_MAX_TIME);
11823 + return 0;
11824 + }
11825 +
11826 + return 0;
11827 +}
11828 +
11829 +static int __exit at91wdt_remove(struct platform_device *pdev)
11830 +{
11831 + int res;
11832 +
11833 + res = misc_deregister(&at91wdt_miscdev);
11834 + if (!res)
11835 + at91wdt_miscdev.parent = NULL;
11836 +
11837 + return res;
11838 +}
11839 +
11840 +#ifdef CONFIG_PM
11841 +
11842 +static int at91wdt_suspend(struct platform_device *pdev, pm_message_t message)
11843 +{
11844 + return 0;
11845 +}
11846 +
11847 +static int at91wdt_resume(struct platform_device *pdev)
11848 +{
11849 + return 0;
11850 +}
11851 +
11852 +#else
11853 +#define at91wdt_suspend NULL
11854 +#define at91wdt_resume NULL
11855 +#endif
11856 +
11857 +static struct platform_driver at91wdt_driver = {
11858 + .remove = __exit_p(at91wdt_remove),
11859 + .suspend = at91wdt_suspend,
11860 + .resume = at91wdt_resume,
11861 + .driver = {
11862 + .name = "at91_wdt",
11863 + .owner = THIS_MODULE,
11864 + },
11865 +};
11866 +
11867 +static int __init at91sam_wdt_init(void)
11868 +{
11869 + return platform_driver_probe(&at91wdt_driver, at91wdt_probe);
11870 +}
11871 +
11872 +static void __exit at91sam_wdt_exit(void)
11873 +{
11874 + platform_driver_unregister(&at91wdt_driver);
11875 +}
11876 +
11877 +module_init(at91sam_wdt_init);
11878 +module_exit(at91sam_wdt_exit);
11879 +
11880 +MODULE_AUTHOR("Renaud CERRATO");
11881 +MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
11882 +MODULE_LICENSE("GPL");
11883 +MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
11884 +MODULE_ALIAS("platform:at91_wdt");
11885 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91_ecc.h linux-2.6/include/asm-arm/arch-at91/at91_ecc.h
11886 --- linux-2.6.25/include/asm-arm/arch-at91/at91_ecc.h 2007-10-09 22:31:38.000000000 +0200
11887 +++ linux-2.6/include/asm-arm/arch-at91/at91_ecc.h 2008-05-07 23:49:32.000000000 +0200
11888 @@ -1,6 +1,9 @@
11889 /*
11890 * include/asm-arm/arch-at91/at91_ecc.h
11891 *
11892 + * Copyright (C) 2007 Andrew Victor
11893 + * Copyright (C) 2007 Atmel Corporation.
11894 + *
11895 * Error Corrected Code Controller (ECC) - System peripherals regsters.
11896 * Based on AT91SAM9260 datasheet revision B.
11897 *
11898 @@ -13,26 +16,26 @@
11899 #ifndef AT91_ECC_H
11900 #define AT91_ECC_H
11901
11902 -#define AT91_ECC_CR (AT91_ECC + 0x00) /* Control register */
11903 +#define AT91_ECC_CR 0x00 /* Control register */
11904 #define AT91_ECC_RST (1 << 0) /* Reset parity */
11905
11906 -#define AT91_ECC_MR (AT91_ECC + 0x04) /* Mode register */
11907 +#define AT91_ECC_MR 0x04 /* Mode register */
11908 #define AT91_ECC_PAGESIZE (3 << 0) /* Page Size */
11909 #define AT91_ECC_PAGESIZE_528 (0)
11910 #define AT91_ECC_PAGESIZE_1056 (1)
11911 #define AT91_ECC_PAGESIZE_2112 (2)
11912 #define AT91_ECC_PAGESIZE_4224 (3)
11913
11914 -#define AT91_ECC_SR (AT91_ECC + 0x08) /* Status register */
11915 +#define AT91_ECC_SR 0x08 /* Status register */
11916 #define AT91_ECC_RECERR (1 << 0) /* Recoverable Error */
11917 #define AT91_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */
11918 #define AT91_ECC_MULERR (1 << 2) /* Multiple Errors */
11919
11920 -#define AT91_ECC_PR (AT91_ECC + 0x0c) /* Parity register */
11921 +#define AT91_ECC_PR 0x0c /* Parity register */
11922 #define AT91_ECC_BITADDR (0xf << 0) /* Bit Error Address */
11923 #define AT91_ECC_WORDADDR (0xfff << 4) /* Word Error Address */
11924
11925 -#define AT91_ECC_NPR (AT91_ECC + 0x10) /* NParity register */
11926 +#define AT91_ECC_NPR 0x10 /* NParity register */
11927 #define AT91_ECC_NPARITY (0xffff << 0) /* NParity */
11928
11929 #endif
11930 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91_pit.h linux-2.6/include/asm-arm/arch-at91/at91_pit.h
11931 --- linux-2.6.25/include/asm-arm/arch-at91/at91_pit.h 2007-10-09 22:31:38.000000000 +0200
11932 +++ linux-2.6/include/asm-arm/arch-at91/at91_pit.h 2008-05-07 23:49:57.000000000 +0200
11933 @@ -1,6 +1,9 @@
11934 /*
11935 * include/asm-arm/arch-at91/at91_pit.h
11936 *
11937 + * Copyright (C) 2007 Andrew Victor
11938 + * Copyright (C) 2007 Atmel Corporation.
11939 + *
11940 * Periodic Interval Timer (PIT) - System peripherals regsters.
11941 * Based on AT91SAM9261 datasheet revision D.
11942 *
11943 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91_pmc.h linux-2.6/include/asm-arm/arch-at91/at91_pmc.h
11944 --- linux-2.6.25/include/asm-arm/arch-at91/at91_pmc.h 2008-05-03 00:15:51.000000000 +0200
11945 +++ linux-2.6/include/asm-arm/arch-at91/at91_pmc.h 2008-05-05 22:01:39.000000000 +0200
11946 @@ -23,6 +23,7 @@
11947 #define AT91_PMC_PCK (1 << 0) /* Processor Clock */
11948 #define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */
11949 #define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */
11950 +#define AT91CAP9_PMC_DDR (1 << 2) /* DDR Clock [AT91CAP9 revC only] */
11951 #define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */
11952 #define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */
11953 #define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */
11954 @@ -39,10 +40,14 @@
11955 #define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */
11956
11957 #define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [SAM9RL, CAP9] */
11958 +#define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */
11959 +#define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */
11960 +#define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */
11961 +#define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI PLL Start-up Time */
11962
11963 #define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */
11964 #define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */
11965 -#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */
11966 +#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [SAM9x, CAP9] */
11967 #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */
11968
11969 #define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */
11970 @@ -56,6 +61,7 @@
11971 #define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */
11972 #define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */
11973 #define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */
11974 +#define AT91CAP9_PMC_USBDIV (0xf << 28) /* USB Divisor (PLLB only) [AT91CAP9 revC only] */
11975 #define AT91_PMC_USBDIV_1 (0 << 28)
11976 #define AT91_PMC_USBDIV_2 (1 << 28)
11977 #define AT91_PMC_USBDIV_4 (2 << 28)
11978 @@ -76,10 +82,13 @@
11979 #define AT91_PMC_PRES_32 (5 << 2)
11980 #define AT91_PMC_PRES_64 (6 << 2)
11981 #define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */
11982 -#define AT91_PMC_MDIV_1 (0 << 8)
11983 -#define AT91_PMC_MDIV_2 (1 << 8)
11984 -#define AT91_PMC_MDIV_3 (2 << 8)
11985 -#define AT91_PMC_MDIV_4 (3 << 8)
11986 +#define AT91RM9200_PMC_MDIV_1 (0 << 8) /* [AT91RM9200 only] */
11987 +#define AT91RM9200_PMC_MDIV_2 (1 << 8)
11988 +#define AT91RM9200_PMC_MDIV_3 (2 << 8)
11989 +#define AT91RM9200_PMC_MDIV_4 (3 << 8)
11990 +#define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9,CAP9 only] */
11991 +#define AT91SAM9_PMC_MDIV_2 (1 << 8)
11992 +#define AT91SAM9_PMC_MDIV_4 (2 << 8)
11993
11994 #define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */
11995
11996 @@ -90,10 +99,17 @@
11997 #define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */
11998 #define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */
11999 #define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */
12000 +#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [AT91CAP9 only] */
12001 +#define AT91_PMC_OSCSEL (1 << 7) /* Slow Clock Oscillator [AT91CAP9 revC only] */
12002 #define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */
12003 #define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */
12004 #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */
12005 #define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */
12006 #define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */
12007
12008 +#define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */
12009 +#define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */
12010 +
12011 +#define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */
12012 +
12013 #endif
12014 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91_rstc.h linux-2.6/include/asm-arm/arch-at91/at91_rstc.h
12015 --- linux-2.6.25/include/asm-arm/arch-at91/at91_rstc.h 2007-10-09 22:31:38.000000000 +0200
12016 +++ linux-2.6/include/asm-arm/arch-at91/at91_rstc.h 2008-05-07 23:50:10.000000000 +0200
12017 @@ -1,6 +1,9 @@
12018 /*
12019 * include/asm-arm/arch-at91/at91_rstc.h
12020 *
12021 + * Copyright (C) 2007 Andrew Victor
12022 + * Copyright (C) 2007 Atmel Corporation.
12023 + *
12024 * Reset Controller (RSTC) - System peripherals regsters.
12025 * Based on AT91SAM9261 datasheet revision D.
12026 *
12027 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91_rtt.h linux-2.6/include/asm-arm/arch-at91/at91_rtt.h
12028 --- linux-2.6.25/include/asm-arm/arch-at91/at91_rtt.h 2008-05-03 00:15:51.000000000 +0200
12029 +++ linux-2.6/include/asm-arm/arch-at91/at91_rtt.h 2008-05-07 23:51:11.000000000 +0200
12030 @@ -1,6 +1,9 @@
12031 /*
12032 * include/asm-arm/arch-at91/at91_rtt.h
12033 *
12034 + * Copyright (C) 2007 Andrew Victor
12035 + * Copyright (C) 2007 Atmel Corporation.
12036 + *
12037 * Real-time Timer (RTT) - System peripherals regsters.
12038 * Based on AT91SAM9261 datasheet revision D.
12039 *
12040 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91_shdwc.h linux-2.6/include/asm-arm/arch-at91/at91_shdwc.h
12041 --- linux-2.6.25/include/asm-arm/arch-at91/at91_shdwc.h 2007-10-09 22:31:38.000000000 +0200
12042 +++ linux-2.6/include/asm-arm/arch-at91/at91_shdwc.h 2008-05-07 23:50:23.000000000 +0200
12043 @@ -1,6 +1,9 @@
12044 /*
12045 * include/asm-arm/arch-at91/at91_shdwc.h
12046 *
12047 + * Copyright (C) 2007 Andrew Victor
12048 + * Copyright (C) 2007 Atmel Corporation.
12049 + *
12050 * Shutdown Controller (SHDWC) - System peripherals regsters.
12051 * Based on AT91SAM9261 datasheet revision D.
12052 *
12053 @@ -24,10 +27,12 @@
12054 #define AT91_SHDW_WKMODE0_LOW 2
12055 #define AT91_SHDW_WKMODE0_ANYLEVEL 3
12056 #define AT91_SHDW_CPTWK0 (0xf << 4) /* Counter On Wake Up 0 */
12057 +#define AT91_SHDW_CPTWK0_(x) ((x) << 4)
12058 #define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */
12059
12060 #define AT91_SHDW_SR (AT91_SHDWC + 0x08) /* Shut Down Status Register */
12061 #define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */
12062 #define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */
12063 +#define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */
12064
12065 #endif
12066 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91_tsc.h linux-2.6/include/asm-arm/arch-at91/at91_tsc.h
12067 --- linux-2.6.25/include/asm-arm/arch-at91/at91_tsc.h 1970-01-01 02:00:00.000000000 +0200
12068 +++ linux-2.6/include/asm-arm/arch-at91/at91_tsc.h 2008-05-07 23:51:32.000000000 +0200
12069 @@ -0,0 +1,76 @@
12070 +/*
12071 + * include/asm-arm/arch-at91/at91_tsc.h
12072 + *
12073 + * Copyright (C) 2008 Andrew Victor
12074 + *
12075 + * Touch Screen ADC Controller (TSC)
12076 + * Based on AT91SAM9RL64 preliminary draft datasheet.
12077 + *
12078 + * This program is free software; you can redistribute it and/or modify it
12079 + * under the terms of the GNU General Public License as published by the
12080 + * Free Software Foundation; either version 2 of the License, or (at your
12081 + * option) any later version.
12082 + */
12083 +
12084 +#ifndef AT91_TSC_H
12085 +#define AT91_TSC_H
12086 +
12087 +#define AT91_TSADCC_CR 0x00 /* Control register */
12088 +#define AT91_TSADCC_SWRST (1 << 0) /* Software Reset*/
12089 +#define AT91_TSADCC_START (1 << 1) /* Start conversion */
12090 +
12091 +#define AT91_TSADCC_MR 0x04 /* Mode register */
12092 +#define AT91_TSADCC_TSAMOD (3 << 0) /* ADC mode */
12093 +#define AT91_TSADCC_LOWRES (1 << 4) /* Resolution selection */
12094 +#define AT91_TSADCC_SLEEP (1 << 5) /* Sleep mode */
12095 +#define AT91_TSADCC_PENDET (1 << 6) /* Pen Detect selection */
12096 +#define AT91_TSADCC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */
12097 +#define AT91_TSADCC_STARTUP (0x7f << 16) /* Start Up time */
12098 +#define AT91_TSADCC_SHTIM (0xf << 24) /* Sample & Hold time */
12099 +#define AT91_TSADCC_PENDBC (0xf << 28) /* Pen Detect debouncing time */
12100 +
12101 +#define AT91_TSADCC_TRGR 0x08 /* Trigger register */
12102 +#define AT91_TSADCC_TRGMOD (7 << 0) /* Trigger mode */
12103 +#define AT91_TSADCC_TRGMOD_NONE (0 << 0)
12104 +#define AT91_TSADCC_TRGMOD_EXT_RISING (1 << 0)
12105 +#define AT91_TSADCC_TRGMOD_EXT_FALLING (2 << 0)
12106 +#define AT91_TSADCC_TRGMOD_EXT_ANY (3 << 0)
12107 +#define AT91_TSADCC_TRGMOD_PENDET (4 << 0)
12108 +#define AT91_TSADCC_TRGMOD_PERIOD (5 << 0)
12109 +#define AT91_TSADCC_TRGMOD_CONTINUOUS (6 << 0)
12110 +#define AT91_TSADCC_TRGPER (0xffff << 16) /* Trigger period */
12111 +
12112 +#define AT91_TSADCC_TSR 0x0C /* Touch Screen register */
12113 +#define AT91_TSADCC_TSFREQ (0xf << 0) /* TS Frequency in Interleaved mode */
12114 +#define AT91_TSADCC_TSSHTIM (0xf << 24) /* Sample & Hold time */
12115 +
12116 +#define AT91_TSADCC_CHER 0x10 /* Channel Enable register */
12117 +#define AT91_TSADCC_CHDR 0x14 /* Channel Disable register */
12118 +#define AT91_TSADCC_CHSR 0x18 /* Channel Status register */
12119 +#define AT91_TSADCC_CH(n) (1 << (n)) /* Channel number */
12120 +
12121 +#define AT91_TSADCC_SR 0x1C /* Status register */
12122 +#define AT91_TSADCC_EOC(n) (1 << ((n)+0)) /* End of conversion for channel N */
12123 +#define AT91_TSADCC_OVRE(n) (1 << ((n)+8)) /* Overrun error for channel N */
12124 +#define AT91_TSADCC_DRDY (1 << 16) /* Data Ready */
12125 +#define AT91_TSADCC_GOVRE (1 << 17) /* General Overrun Error */
12126 +#define AT91_TSADCC_ENDRX (1 << 18) /* End of RX Buffer */
12127 +#define AT91_TSADCC_RXBUFF (1 << 19) /* TX Buffer full */
12128 +#define AT91_TSADCC_PENCNT (1 << 20) /* Pen contact */
12129 +#define AT91_TSADCC_NOCNT (1 << 21) /* No contact */
12130 +
12131 +#define AT91_TSADCC_LCDR 0x20 /* Last Converted Data register */
12132 +#define AT91_TSADCC_DATA (0x3ff << 0) /* Channel data */
12133 +
12134 +#define AT91_TSADCC_IER 0x24 /* Interrupt Enable register */
12135 +#define AT91_TSADCC_IDR 0x28 /* Interrupt Disable register */
12136 +#define AT91_TSADCC_IMR 0x2C /* Interrupt Mask register */
12137 +#define AT91_TSADCC_CDR0 0x30 /* Channel Data 0 */
12138 +#define AT91_TSADCC_CDR1 0x34 /* Channel Data 1 */
12139 +#define AT91_TSADCC_CDR2 0x38 /* Channel Data 2 */
12140 +#define AT91_TSADCC_CDR3 0x3C /* Channel Data 3 */
12141 +#define AT91_TSADCC_CDR4 0x40 /* Channel Data 4 */
12142 +#define AT91_TSADCC_CDR5 0x44 /* Channel Data 5 */
12143 +
12144 +#endif
12145 +
12146 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91_wdt.h linux-2.6/include/asm-arm/arch-at91/at91_wdt.h
12147 --- linux-2.6.25/include/asm-arm/arch-at91/at91_wdt.h 2007-10-09 22:31:38.000000000 +0200
12148 +++ linux-2.6/include/asm-arm/arch-at91/at91_wdt.h 2008-05-07 23:51:43.000000000 +0200
12149 @@ -1,6 +1,9 @@
12150 /*
12151 * include/asm-arm/arch-at91/at91_wdt.h
12152 *
12153 + * Copyright (C) 2007 Andrew Victor
12154 + * Copyright (C) 2007 Atmel Corporation.
12155 + *
12156 * Watchdog Timer (WDT) - System peripherals regsters.
12157 * Based on AT91SAM9261 datasheet revision D.
12158 *
12159 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91cap9.h linux-2.6/include/asm-arm/arch-at91/at91cap9.h
12160 --- linux-2.6.25/include/asm-arm/arch-at91/at91cap9.h 2008-05-03 00:15:51.000000000 +0200
12161 +++ linux-2.6/include/asm-arm/arch-at91/at91cap9.h 2008-05-05 22:01:39.000000000 +0200
12162 @@ -101,7 +101,10 @@
12163 #define AT91_RTT (0xfffffd20 - AT91_BASE_SYS)
12164 #define AT91_PIT (0xfffffd30 - AT91_BASE_SYS)
12165 #define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
12166 -#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
12167 +#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS)
12168 +#define AT91_GPBR (cpu_is_at91cap9_revB() ? \
12169 + (0xfffffd50 - AT91_BASE_SYS) : \
12170 + (0xfffffd60 - AT91_BASE_SYS))
12171
12172 #define AT91_USART0 AT91CAP9_BASE_US0
12173 #define AT91_USART1 AT91CAP9_BASE_US1
12174 @@ -118,7 +121,7 @@
12175 #define AT91CAP9_ROM_SIZE (32 * SZ_1K) /* Internal ROM size (32Kb) */
12176
12177 #define AT91CAP9_LCDC_BASE 0x00500000 /* LCD Controller */
12178 -#define AT91CAP9_UDPHS_BASE 0x00600000 /* USB High Speed Device Port */
12179 +#define AT91CAP9_UDPHS_FIFO 0x00600000 /* USB High Speed Device Port */
12180 #define AT91CAP9_UHP_BASE 0x00700000 /* USB Host controller */
12181
12182 #define CONFIG_DRAM_BASE AT91_CHIPSELECT_6
12183 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91cap9_ddrsdr.h linux-2.6/include/asm-arm/arch-at91/at91cap9_ddrsdr.h
12184 --- linux-2.6.25/include/asm-arm/arch-at91/at91cap9_ddrsdr.h 1970-01-01 02:00:00.000000000 +0200
12185 +++ linux-2.6/include/asm-arm/arch-at91/at91cap9_ddrsdr.h 2008-05-07 21:33:47.000000000 +0200
12186 @@ -0,0 +1,102 @@
12187 +/*
12188 + * include/asm-arm/arch-at91/at91cap9_ddrsdr.h
12189 + *
12190 + * (C) 2008 Andrew Victor
12191 + *
12192 + * DDR/SDR Controller (DDRSDRC) - System peripherals registers.
12193 + * Based on AT91CAP9 datasheet revision B.
12194 + *
12195 + * This program is free software; you can redistribute it and/or modify
12196 + * it under the terms of the GNU General Public License as published by
12197 + * the Free Software Foundation; either version 2 of the License, or
12198 + * (at your option) any later version.
12199 + */
12200 +
12201 +#ifndef AT91CAP9_DDRSDR_H
12202 +#define AT91CAP9_DDRSDR_H
12203 +
12204 +#define AT91_DDRSDRC_MR (AT91_DDRSDRC + 0x00) /* Mode Register */
12205 +#define AT91_DDRSDRC_MODE (0xf << 0) /* Command Mode */
12206 +#define AT91_DDRSDRC_MODE_NORMAL 0
12207 +#define AT91_DDRSDRC_MODE_NOP 1
12208 +#define AT91_DDRSDRC_MODE_PRECHARGE 2
12209 +#define AT91_DDRSDRC_MODE_LMR 3
12210 +#define AT91_DDRSDRC_MODE_REFRESH 4
12211 +#define AT91_DDRSDRC_MODE_EXT_LMR 5
12212 +#define AT91_DDRSDRC_MODE_DEEP 6
12213 +
12214 +#define AT91_DDRSDRC_RTR (AT91_DDRSDRC + 0x04) /* Refresh Timer Register */
12215 +#define AT91_DDRSDRC_COUNT (0xfff << 0) /* Refresh Timer Counter */
12216 +
12217 +#define AT91_DDRSDRC_CR (AT91_DDRSDRC + 0x08) /* Configuration Register */
12218 +#define AT91_DDRSDRC_NC (3 << 0) /* Number of Column Bits */
12219 +#define AT91_DDRSDRC_NC_SDR8 (0 << 0)
12220 +#define AT91_DDRSDRC_NC_SDR9 (1 << 0)
12221 +#define AT91_DDRSDRC_NC_SDR10 (2 << 0)
12222 +#define AT91_DDRSDRC_NC_SDR11 (3 << 0)
12223 +#define AT91_DDRSDRC_NC_DDR9 (0 << 0)
12224 +#define AT91_DDRSDRC_NC_DDR10 (1 << 0)
12225 +#define AT91_DDRSDRC_NC_DDR11 (2 << 0)
12226 +#define AT91_DDRSDRC_NC_DDR12 (3 << 0)
12227 +#define AT91_DDRSDRC_NR (3 << 2) /* Number of Row Bits */
12228 +#define AT91_DDRSDRC_NR_11 (0 << 2)
12229 +#define AT91_DDRSDRC_NR_12 (1 << 2)
12230 +#define AT91_DDRSDRC_NR_13 (2 << 2)
12231 +#define AT91_DDRSDRC_CAS (7 << 4) /* CAS Latency */
12232 +#define AT91_DDRSDRC_CAS_2 (2 << 4)
12233 +#define AT91_DDRSDRC_CAS_3 (3 << 4)
12234 +#define AT91_DDRSDRC_CAS_25 (6 << 4)
12235 +#define AT91_DDRSDRC_DLL (1 << 7) /* Reset DLL */
12236 +#define AT91_DDRSDRC_DICDS (1 << 8) /* Output impedance control */
12237 +
12238 +#define AT91_DDRSDRC_T0PR (AT91_DDRSDRC + 0x0C) /* Timing 0 Register */
12239 +#define AT91_DDRSDRC_TRAS (0xf << 0) /* Active to Precharge delay */
12240 +#define AT91_DDRSDRC_TRCD (0xf << 4) /* Row to Column delay */
12241 +#define AT91_DDRSDRC_TWR (0xf << 8) /* Write recovery delay */
12242 +#define AT91_DDRSDRC_TRC (0xf << 12) /* Row cycle delay */
12243 +#define AT91_DDRSDRC_TRP (0xf << 16) /* Row precharge delay */
12244 +#define AT91_DDRSDRC_TRRD (0xf << 20) /* Active BankA to BankB */
12245 +#define AT91_DDRSDRC_TWTR (1 << 24) /* Internal Write to Read delay */
12246 +#define AT91_DDRSDRC_TMRD (0xf << 28) /* Load mode to active/refresh delay */
12247 +
12248 +#define AT91_DDRSDRC_T1PR (AT91_DDRSDRC + 0x10) /* Timing 1 Register */
12249 +#define AT91_DDRSDRC_TRFC (0x1f << 0) /* Row Cycle Delay */
12250 +#define AT91_DDRSDRC_TXSNR (0xff << 8) /* Exit self-refresh to non-read */
12251 +#define AT91_DDRSDRC_TXSRD (0xff << 16) /* Exit self-refresh to read */
12252 +#define AT91_DDRSDRC_TXP (0xf << 24) /* Exit power-down delay */
12253 +
12254 +#define AT91_DDRSDRC_LPR (AT91_DDRSDRC + 0x18) /* Low Power Register */
12255 +#define AT91_DDRSDRC_LPCB (3 << 0) /* Low-power Configurations */
12256 +#define AT91_DDRSDRC_LPCB_DISABLE 0
12257 +#define AT91_DDRSDRC_LPCB_SELF_REFRESH 1
12258 +#define AT91_DDRSDRC_LPCB_POWER_DOWN 2
12259 +#define AT91_DDRSDRC_LPCB_DEEP_POWER_DOWN 3
12260 +#define AT91_DDRSDRC_CLKFR (1 << 2) /* Clock Frozen */
12261 +#define AT91_DDRSDRC_PASR (7 << 4) /* Partial Array Self Refresh */
12262 +#define AT91_DDRSDRC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */
12263 +#define AT91_DDRSDRC_DS (3 << 10) /* Drive Strength */
12264 +#define AT91_DDRSDRC_TIMEOUT (3 << 12) /* Time to define when Low Power Mode is enabled */
12265 +#define AT91_DDRSDRC_TIMEOUT_0_CLK_CYCLES (0 << 12)
12266 +#define AT91_DDRSDRC_TIMEOUT_64_CLK_CYCLES (1 << 12)
12267 +#define AT91_DDRSDRC_TIMEOUT_128_CLK_CYCLES (2 << 12)
12268 +
12269 +#define AT91_DDRSDRC_MDR (AT91_DDRSDRC + 0x1C) /* Memory Device Register */
12270 +#define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */
12271 +#define AT91_DDRSDRC_MD_SDR 0
12272 +#define AT91_DDRSDRC_MD_LOW_POWER_SDR 1
12273 +#define AT91_DDRSDRC_MD_DDR 2
12274 +#define AT91_DDRSDRC_MD_LOW_POWER_DDR 3
12275 +
12276 +#define AT91_DDRSDRC_DLLR (AT91_DDRSDRC + 0x20) /* DLL Information Register */
12277 +#define AT91_DDRSDRC_MDINC (1 << 0) /* Master Delay increment */
12278 +#define AT91_DDRSDRC_MDDEC (1 << 1) /* Master Delay decrement */
12279 +#define AT91_DDRSDRC_MDOVF (1 << 2) /* Master Delay Overflow */
12280 +#define AT91_DDRSDRC_SDCOVF (1 << 3) /* Slave Delay Correction Overflow */
12281 +#define AT91_DDRSDRC_SDCUDF (1 << 4) /* Slave Delay Correction Underflow */
12282 +#define AT91_DDRSDRC_SDERF (1 << 5) /* Slave Delay Correction error */
12283 +#define AT91_DDRSDRC_MDVAL (0xff << 8) /* Master Delay value */
12284 +#define AT91_DDRSDRC_SDVAL (0xff << 16) /* Slave Delay value */
12285 +#define AT91_DDRSDRC_SDCVAL (0xff << 24) /* Slave Delay Correction value */
12286 +
12287 +
12288 +#endif
12289 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91cap9_matrix.h linux-2.6/include/asm-arm/arch-at91/at91cap9_matrix.h
12290 --- linux-2.6.25/include/asm-arm/arch-at91/at91cap9_matrix.h 2008-05-03 00:15:51.000000000 +0200
12291 +++ linux-2.6/include/asm-arm/arch-at91/at91cap9_matrix.h 2008-04-18 19:20:34.000000000 +0200
12292 @@ -106,6 +106,11 @@
12293 #define AT91_MPBS0_SFR (AT91_MATRIX + 0x114) /* MPBlock Slave 0 Special Function Register */
12294 #define AT91_MPBS1_SFR (AT91_MATRIX + 0x11C) /* MPBlock Slave 1 Special Function Register */
12295
12296 +#define AT91_MATRIX_UDPHS (AT91_MATRIX + 0x118) /* USBHS Special Function Register [AT91CAP9 only] */
12297 +#define AT91_MATRIX_SELECT_UDPHS (0 << 31) /* select High Speed UDP */
12298 +#define AT91_MATRIX_SELECT_UDP (1 << 31) /* select standard UDP */
12299 +#define AT91_MATRIX_UDPHS_BYPASS_LOCK (1 << 30) /* bypass lock bit */
12300 +
12301 #define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */
12302 #define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */
12303 #define AT91_MATRIX_EBI_CS1A_SMC (0 << 1)
12304 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91sam9260_matrix.h linux-2.6/include/asm-arm/arch-at91/at91sam9260_matrix.h
12305 --- linux-2.6.25/include/asm-arm/arch-at91/at91sam9260_matrix.h 2008-05-03 00:15:51.000000000 +0200
12306 +++ linux-2.6/include/asm-arm/arch-at91/at91sam9260_matrix.h 2008-05-07 12:07:13.000000000 +0200
12307 @@ -1,6 +1,8 @@
12308 /*
12309 * include/asm-arm/arch-at91/at91sam9260_matrix.h
12310 *
12311 + * Copyright (C) 2007 Atmel Corporation.
12312 + *
12313 * Memory Controllers (MATRIX, EBI) - System peripherals registers.
12314 * Based on AT91SAM9260 datasheet revision B.
12315 *
12316 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91sam9261_matrix.h linux-2.6/include/asm-arm/arch-at91/at91sam9261_matrix.h
12317 --- linux-2.6.25/include/asm-arm/arch-at91/at91sam9261_matrix.h 2007-10-09 22:31:38.000000000 +0200
12318 +++ linux-2.6/include/asm-arm/arch-at91/at91sam9261_matrix.h 2008-05-07 12:07:24.000000000 +0200
12319 @@ -1,6 +1,8 @@
12320 /*
12321 * include/asm-arm/arch-at91/at91sam9261_matrix.h
12322 *
12323 + * Copyright (C) 2007 Atmel Corporation.
12324 + *
12325 * Memory Controllers (MATRIX, EBI) - System peripherals registers.
12326 * Based on AT91SAM9261 datasheet revision D.
12327 *
12328 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91sam926x_mc.h linux-2.6/include/asm-arm/arch-at91/at91sam926x_mc.h
12329 --- linux-2.6.25/include/asm-arm/arch-at91/at91sam926x_mc.h 2007-10-09 22:31:38.000000000 +0200
12330 +++ linux-2.6/include/asm-arm/arch-at91/at91sam926x_mc.h 1970-01-01 02:00:00.000000000 +0200
12331 @@ -1,141 +0,0 @@
12332 -/*
12333 - * include/asm-arm/arch-at91/at91sam926x_mc.h
12334 - *
12335 - * Memory Controllers (SMC, SDRAMC) - System peripherals registers.
12336 - * Based on AT91SAM9261 datasheet revision D.
12337 - *
12338 - * This program is free software; you can redistribute it and/or modify
12339 - * it under the terms of the GNU General Public License as published by
12340 - * the Free Software Foundation; either version 2 of the License, or
12341 - * (at your option) any later version.
12342 - */
12343 -
12344 -#ifndef AT91SAM926x_MC_H
12345 -#define AT91SAM926x_MC_H
12346 -
12347 -/* SDRAM Controller (SDRAMC) registers */
12348 -#define AT91_SDRAMC_MR (AT91_SDRAMC + 0x00) /* SDRAM Controller Mode Register */
12349 -#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */
12350 -#define AT91_SDRAMC_MODE_NORMAL 0
12351 -#define AT91_SDRAMC_MODE_NOP 1
12352 -#define AT91_SDRAMC_MODE_PRECHARGE 2
12353 -#define AT91_SDRAMC_MODE_LMR 3
12354 -#define AT91_SDRAMC_MODE_REFRESH 4
12355 -#define AT91_SDRAMC_MODE_EXT_LMR 5
12356 -#define AT91_SDRAMC_MODE_DEEP 6
12357 -
12358 -#define AT91_SDRAMC_TR (AT91_SDRAMC + 0x04) /* SDRAM Controller Refresh Timer Register */
12359 -#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Counter */
12360 -
12361 -#define AT91_SDRAMC_CR (AT91_SDRAMC + 0x08) /* SDRAM Controller Configuration Register */
12362 -#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */
12363 -#define AT91_SDRAMC_NC_8 (0 << 0)
12364 -#define AT91_SDRAMC_NC_9 (1 << 0)
12365 -#define AT91_SDRAMC_NC_10 (2 << 0)
12366 -#define AT91_SDRAMC_NC_11 (3 << 0)
12367 -#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */
12368 -#define AT91_SDRAMC_NR_11 (0 << 2)
12369 -#define AT91_SDRAMC_NR_12 (1 << 2)
12370 -#define AT91_SDRAMC_NR_13 (2 << 2)
12371 -#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */
12372 -#define AT91_SDRAMC_NB_2 (0 << 4)
12373 -#define AT91_SDRAMC_NB_4 (1 << 4)
12374 -#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */
12375 -#define AT91_SDRAMC_CAS_1 (1 << 5)
12376 -#define AT91_SDRAMC_CAS_2 (2 << 5)
12377 -#define AT91_SDRAMC_CAS_3 (3 << 5)
12378 -#define AT91_SDRAMC_DBW (1 << 7) /* Data Bus Width */
12379 -#define AT91_SDRAMC_DBW_32 (0 << 7)
12380 -#define AT91_SDRAMC_DBW_16 (1 << 7)
12381 -#define AT91_SDRAMC_TWR (0xf << 8) /* Write Recovery Delay */
12382 -#define AT91_SDRAMC_TRC (0xf << 12) /* Row Cycle Delay */
12383 -#define AT91_SDRAMC_TRP (0xf << 16) /* Row Precharge Delay */
12384 -#define AT91_SDRAMC_TRCD (0xf << 20) /* Row to Column Delay */
12385 -#define AT91_SDRAMC_TRAS (0xf << 24) /* Active to Precharge Delay */
12386 -#define AT91_SDRAMC_TXSR (0xf << 28) /* Exit Self Refresh to Active Delay */
12387 -
12388 -#define AT91_SDRAMC_LPR (AT91_SDRAMC + 0x10) /* SDRAM Controller Low Power Register */
12389 -#define AT91_SDRAMC_LPCB (3 << 0) /* Low-power Configurations */
12390 -#define AT91_SDRAMC_LPCB_DISABLE 0
12391 -#define AT91_SDRAMC_LPCB_SELF_REFRESH 1
12392 -#define AT91_SDRAMC_LPCB_POWER_DOWN 2
12393 -#define AT91_SDRAMC_LPCB_DEEP_POWER_DOWN 3
12394 -#define AT91_SDRAMC_PASR (7 << 4) /* Partial Array Self Refresh */
12395 -#define AT91_SDRAMC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */
12396 -#define AT91_SDRAMC_DS (3 << 10) /* Drive Strenght */
12397 -#define AT91_SDRAMC_TIMEOUT (3 << 12) /* Time to define when Low Power Mode is enabled */
12398 -#define AT91_SDRAMC_TIMEOUT_0_CLK_CYCLES (0 << 12)
12399 -#define AT91_SDRAMC_TIMEOUT_64_CLK_CYCLES (1 << 12)
12400 -#define AT91_SDRAMC_TIMEOUT_128_CLK_CYCLES (2 << 12)
12401 -
12402 -#define AT91_SDRAMC_IER (AT91_SDRAMC + 0x14) /* SDRAM Controller Interrupt Enable Register */
12403 -#define AT91_SDRAMC_IDR (AT91_SDRAMC + 0x18) /* SDRAM Controller Interrupt Disable Register */
12404 -#define AT91_SDRAMC_IMR (AT91_SDRAMC + 0x1C) /* SDRAM Controller Interrupt Mask Register */
12405 -#define AT91_SDRAMC_ISR (AT91_SDRAMC + 0x20) /* SDRAM Controller Interrupt Status Register */
12406 -#define AT91_SDRAMC_RES (1 << 0) /* Refresh Error Status */
12407 -
12408 -#define AT91_SDRAMC_MDR (AT91_SDRAMC + 0x24) /* SDRAM Memory Device Register */
12409 -#define AT91_SDRAMC_MD (3 << 0) /* Memory Device Type */
12410 -#define AT91_SDRAMC_MD_SDRAM 0
12411 -#define AT91_SDRAMC_MD_LOW_POWER_SDRAM 1
12412 -
12413 -
12414 -/* Static Memory Controller (SMC) registers */
12415 -#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */
12416 -#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */
12417 -#define AT91_SMC_NWESETUP_(x) ((x) << 0)
12418 -#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */
12419 -#define AT91_SMC_NCS_WRSETUP_(x) ((x) << 8)
12420 -#define AT91_SMC_NRDSETUP (0x3f << 16) /* NRD Setup Length */
12421 -#define AT91_SMC_NRDSETUP_(x) ((x) << 16)
12422 -#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */
12423 -#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24)
12424 -
12425 -#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */
12426 -#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */
12427 -#define AT91_SMC_NWEPULSE_(x) ((x) << 0)
12428 -#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */
12429 -#define AT91_SMC_NCS_WRPULSE_(x)((x) << 8)
12430 -#define AT91_SMC_NRDPULSE (0x7f << 16) /* NRD Pulse Length */
12431 -#define AT91_SMC_NRDPULSE_(x) ((x) << 16)
12432 -#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */
12433 -#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24)
12434 -
12435 -#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */
12436 -#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */
12437 -#define AT91_SMC_NWECYCLE_(x) ((x) << 0)
12438 -#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */
12439 -#define AT91_SMC_NRDCYCLE_(x) ((x) << 16)
12440 -
12441 -#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */
12442 -#define AT91_SMC_READMODE (1 << 0) /* Read Mode */
12443 -#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */
12444 -#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */
12445 -#define AT91_SMC_EXNWMODE_DISABLE (0 << 4)
12446 -#define AT91_SMC_EXNWMODE_FROZEN (2 << 4)
12447 -#define AT91_SMC_EXNWMODE_READY (3 << 4)
12448 -#define AT91_SMC_BAT (1 << 8) /* Byte Access Type */
12449 -#define AT91_SMC_BAT_SELECT (0 << 8)
12450 -#define AT91_SMC_BAT_WRITE (1 << 8)
12451 -#define AT91_SMC_DBW (3 << 12) /* Data Bus Width */
12452 -#define AT91_SMC_DBW_8 (0 << 12)
12453 -#define AT91_SMC_DBW_16 (1 << 12)
12454 -#define AT91_SMC_DBW_32 (2 << 12)
12455 -#define AT91_SMC_TDF (0xf << 16) /* Data Float Time. */
12456 -#define AT91_SMC_TDF_(x) ((x) << 16)
12457 -#define AT91_SMC_TDFMODE (1 << 20) /* TDF Optimization - Enabled */
12458 -#define AT91_SMC_PMEN (1 << 24) /* Page Mode Enabled */
12459 -#define AT91_SMC_PS (3 << 28) /* Page Size */
12460 -#define AT91_SMC_PS_4 (0 << 28)
12461 -#define AT91_SMC_PS_8 (1 << 28)
12462 -#define AT91_SMC_PS_16 (2 << 28)
12463 -#define AT91_SMC_PS_32 (3 << 28)
12464 -
12465 -#if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */
12466 -#define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */
12467 -#define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */
12468 -#define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */
12469 -#define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */
12470 -#endif
12471 -
12472 -#endif
12473 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91sam9_sdramc.h linux-2.6/include/asm-arm/arch-at91/at91sam9_sdramc.h
12474 --- linux-2.6.25/include/asm-arm/arch-at91/at91sam9_sdramc.h 1970-01-01 02:00:00.000000000 +0200
12475 +++ linux-2.6/include/asm-arm/arch-at91/at91sam9_sdramc.h 2008-05-07 23:51:59.000000000 +0200
12476 @@ -0,0 +1,86 @@
12477 +/*
12478 + * include/asm-arm/arch-at91/at91sam9_sdramc.h
12479 + *
12480 + * Copyright (C) 2007 Andrew Victor
12481 + * Copyright (C) 2007 Atmel Corporation.
12482 + *
12483 + * SDRAM Controllers (SDRAMC) - System peripherals registers.
12484 + * Based on AT91SAM9261 datasheet revision D.
12485 + *
12486 + * This program is free software; you can redistribute it and/or modify
12487 + * it under the terms of the GNU General Public License as published by
12488 + * the Free Software Foundation; either version 2 of the License, or
12489 + * (at your option) any later version.
12490 + */
12491 +
12492 +#ifndef AT91SAM9_SDRAMC_H
12493 +#define AT91SAM9_SDRAMC_H
12494 +
12495 +/* SDRAM Controller (SDRAMC) registers */
12496 +#define AT91_SDRAMC_MR (AT91_SDRAMC + 0x00) /* SDRAM Controller Mode Register */
12497 +#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */
12498 +#define AT91_SDRAMC_MODE_NORMAL 0
12499 +#define AT91_SDRAMC_MODE_NOP 1
12500 +#define AT91_SDRAMC_MODE_PRECHARGE 2
12501 +#define AT91_SDRAMC_MODE_LMR 3
12502 +#define AT91_SDRAMC_MODE_REFRESH 4
12503 +#define AT91_SDRAMC_MODE_EXT_LMR 5
12504 +#define AT91_SDRAMC_MODE_DEEP 6
12505 +
12506 +#define AT91_SDRAMC_TR (AT91_SDRAMC + 0x04) /* SDRAM Controller Refresh Timer Register */
12507 +#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Counter */
12508 +
12509 +#define AT91_SDRAMC_CR (AT91_SDRAMC + 0x08) /* SDRAM Controller Configuration Register */
12510 +#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */
12511 +#define AT91_SDRAMC_NC_8 (0 << 0)
12512 +#define AT91_SDRAMC_NC_9 (1 << 0)
12513 +#define AT91_SDRAMC_NC_10 (2 << 0)
12514 +#define AT91_SDRAMC_NC_11 (3 << 0)
12515 +#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */
12516 +#define AT91_SDRAMC_NR_11 (0 << 2)
12517 +#define AT91_SDRAMC_NR_12 (1 << 2)
12518 +#define AT91_SDRAMC_NR_13 (2 << 2)
12519 +#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */
12520 +#define AT91_SDRAMC_NB_2 (0 << 4)
12521 +#define AT91_SDRAMC_NB_4 (1 << 4)
12522 +#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */
12523 +#define AT91_SDRAMC_CAS_1 (1 << 5)
12524 +#define AT91_SDRAMC_CAS_2 (2 << 5)
12525 +#define AT91_SDRAMC_CAS_3 (3 << 5)
12526 +#define AT91_SDRAMC_DBW (1 << 7) /* Data Bus Width */
12527 +#define AT91_SDRAMC_DBW_32 (0 << 7)
12528 +#define AT91_SDRAMC_DBW_16 (1 << 7)
12529 +#define AT91_SDRAMC_TWR (0xf << 8) /* Write Recovery Delay */
12530 +#define AT91_SDRAMC_TRC (0xf << 12) /* Row Cycle Delay */
12531 +#define AT91_SDRAMC_TRP (0xf << 16) /* Row Precharge Delay */
12532 +#define AT91_SDRAMC_TRCD (0xf << 20) /* Row to Column Delay */
12533 +#define AT91_SDRAMC_TRAS (0xf << 24) /* Active to Precharge Delay */
12534 +#define AT91_SDRAMC_TXSR (0xf << 28) /* Exit Self Refresh to Active Delay */
12535 +
12536 +#define AT91_SDRAMC_LPR (AT91_SDRAMC + 0x10) /* SDRAM Controller Low Power Register */
12537 +#define AT91_SDRAMC_LPCB (3 << 0) /* Low-power Configurations */
12538 +#define AT91_SDRAMC_LPCB_DISABLE 0
12539 +#define AT91_SDRAMC_LPCB_SELF_REFRESH 1
12540 +#define AT91_SDRAMC_LPCB_POWER_DOWN 2
12541 +#define AT91_SDRAMC_LPCB_DEEP_POWER_DOWN 3
12542 +#define AT91_SDRAMC_PASR (7 << 4) /* Partial Array Self Refresh */
12543 +#define AT91_SDRAMC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */
12544 +#define AT91_SDRAMC_DS (3 << 10) /* Drive Strength */
12545 +#define AT91_SDRAMC_TIMEOUT (3 << 12) /* Time to define when Low Power Mode is enabled */
12546 +#define AT91_SDRAMC_TIMEOUT_0_CLK_CYCLES (0 << 12)
12547 +#define AT91_SDRAMC_TIMEOUT_64_CLK_CYCLES (1 << 12)
12548 +#define AT91_SDRAMC_TIMEOUT_128_CLK_CYCLES (2 << 12)
12549 +
12550 +#define AT91_SDRAMC_IER (AT91_SDRAMC + 0x14) /* SDRAM Controller Interrupt Enable Register */
12551 +#define AT91_SDRAMC_IDR (AT91_SDRAMC + 0x18) /* SDRAM Controller Interrupt Disable Register */
12552 +#define AT91_SDRAMC_IMR (AT91_SDRAMC + 0x1C) /* SDRAM Controller Interrupt Mask Register */
12553 +#define AT91_SDRAMC_ISR (AT91_SDRAMC + 0x20) /* SDRAM Controller Interrupt Status Register */
12554 +#define AT91_SDRAMC_RES (1 << 0) /* Refresh Error Status */
12555 +
12556 +#define AT91_SDRAMC_MDR (AT91_SDRAMC + 0x24) /* SDRAM Memory Device Register */
12557 +#define AT91_SDRAMC_MD (3 << 0) /* Memory Device Type */
12558 +#define AT91_SDRAMC_MD_SDRAM 0
12559 +#define AT91_SDRAMC_MD_LOW_POWER_SDRAM 1
12560 +
12561 +
12562 +#endif
12563 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91sam9_smc.h linux-2.6/include/asm-arm/arch-at91/at91sam9_smc.h
12564 --- linux-2.6.25/include/asm-arm/arch-at91/at91sam9_smc.h 1970-01-01 02:00:00.000000000 +0200
12565 +++ linux-2.6/include/asm-arm/arch-at91/at91sam9_smc.h 2008-05-07 23:52:15.000000000 +0200
12566 @@ -0,0 +1,76 @@
12567 +/*
12568 + * include/asm-arm/arch-at91/at91sam9_smc.h
12569 + *
12570 + * Copyright (C) 2007 Andrew Victor
12571 + * Copyright (C) 2007 Atmel Corporation.
12572 + *
12573 + * Static Memory Controllers (SMC) - System peripherals registers.
12574 + * Based on AT91SAM9261 datasheet revision D.
12575 + *
12576 + * This program is free software; you can redistribute it and/or modify
12577 + * it under the terms of the GNU General Public License as published by
12578 + * the Free Software Foundation; either version 2 of the License, or
12579 + * (at your option) any later version.
12580 + */
12581 +
12582 +#ifndef AT91SAM9_SMC_H
12583 +#define AT91SAM9_SMC_H
12584 +
12585 +#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */
12586 +#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */
12587 +#define AT91_SMC_NWESETUP_(x) ((x) << 0)
12588 +#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */
12589 +#define AT91_SMC_NCS_WRSETUP_(x) ((x) << 8)
12590 +#define AT91_SMC_NRDSETUP (0x3f << 16) /* NRD Setup Length */
12591 +#define AT91_SMC_NRDSETUP_(x) ((x) << 16)
12592 +#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */
12593 +#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24)
12594 +
12595 +#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */
12596 +#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */
12597 +#define AT91_SMC_NWEPULSE_(x) ((x) << 0)
12598 +#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */
12599 +#define AT91_SMC_NCS_WRPULSE_(x)((x) << 8)
12600 +#define AT91_SMC_NRDPULSE (0x7f << 16) /* NRD Pulse Length */
12601 +#define AT91_SMC_NRDPULSE_(x) ((x) << 16)
12602 +#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */
12603 +#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24)
12604 +
12605 +#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */
12606 +#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */
12607 +#define AT91_SMC_NWECYCLE_(x) ((x) << 0)
12608 +#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */
12609 +#define AT91_SMC_NRDCYCLE_(x) ((x) << 16)
12610 +
12611 +#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */
12612 +#define AT91_SMC_READMODE (1 << 0) /* Read Mode */
12613 +#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */
12614 +#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */
12615 +#define AT91_SMC_EXNWMODE_DISABLE (0 << 4)
12616 +#define AT91_SMC_EXNWMODE_FROZEN (2 << 4)
12617 +#define AT91_SMC_EXNWMODE_READY (3 << 4)
12618 +#define AT91_SMC_BAT (1 << 8) /* Byte Access Type */
12619 +#define AT91_SMC_BAT_SELECT (0 << 8)
12620 +#define AT91_SMC_BAT_WRITE (1 << 8)
12621 +#define AT91_SMC_DBW (3 << 12) /* Data Bus Width */
12622 +#define AT91_SMC_DBW_8 (0 << 12)
12623 +#define AT91_SMC_DBW_16 (1 << 12)
12624 +#define AT91_SMC_DBW_32 (2 << 12)
12625 +#define AT91_SMC_TDF (0xf << 16) /* Data Float Time. */
12626 +#define AT91_SMC_TDF_(x) ((x) << 16)
12627 +#define AT91_SMC_TDFMODE (1 << 20) /* TDF Optimization - Enabled */
12628 +#define AT91_SMC_PMEN (1 << 24) /* Page Mode Enabled */
12629 +#define AT91_SMC_PS (3 << 28) /* Page Size */
12630 +#define AT91_SMC_PS_4 (0 << 28)
12631 +#define AT91_SMC_PS_8 (1 << 28)
12632 +#define AT91_SMC_PS_16 (2 << 28)
12633 +#define AT91_SMC_PS_32 (3 << 28)
12634 +
12635 +#if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */
12636 +#define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */
12637 +#define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */
12638 +#define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */
12639 +#define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */
12640 +#endif
12641 +
12642 +#endif
12643 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/at91sam9rl.h linux-2.6/include/asm-arm/arch-at91/at91sam9rl.h
12644 --- linux-2.6.25/include/asm-arm/arch-at91/at91sam9rl.h 2008-05-03 00:15:51.000000000 +0200
12645 +++ linux-2.6/include/asm-arm/arch-at91/at91sam9rl.h 2008-04-18 19:22:02.000000000 +0200
12646 @@ -110,6 +110,6 @@
12647 #define AT91SAM9RL_ROM_SIZE (2 * SZ_16K) /* Internal ROM size (32Kb) */
12648
12649 #define AT91SAM9RL_LCDC_BASE 0x00500000 /* LCD Controller */
12650 -#define AT91SAM9RL_UDPHS_BASE 0x00600000 /* USB Device HS controller */
12651 +#define AT91SAM9RL_UDPHS_FIFO 0x00600000 /* USB Device HS controller */
12652
12653 #endif
12654 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/board.h linux-2.6/include/asm-arm/arch-at91/board.h
12655 --- linux-2.6.25/include/asm-arm/arch-at91/board.h 2008-05-03 00:15:51.000000000 +0200
12656 +++ linux-2.6/include/asm-arm/arch-at91/board.h 2008-05-02 00:40:32.000000000 +0200
12657 @@ -36,6 +36,7 @@
12658 #include <linux/i2c.h>
12659 #include <linux/leds.h>
12660 #include <linux/spi/spi.h>
12661 +#include <linux/usb/atmel_usba_udc.h>
12662
12663 /* USB Device */
12664 struct at91_udc_data {
12665 @@ -45,6 +46,9 @@
12666 };
12667 extern void __init at91_add_device_udc(struct at91_udc_data *data);
12668
12669 + /* USB High Speed Device */
12670 +extern void __init at91_add_device_usba(struct usba_platform_data *data);
12671 +
12672 /* Compact Flash */
12673 struct at91_cf_data {
12674 u8 irq_pin; /* I/O IRQ */
12675 @@ -158,6 +162,9 @@
12676 /* ISI */
12677 extern void __init at91_add_device_isi(void);
12678
12679 + /* Touchscreen Controller */
12680 +extern void __init at91_add_device_tsadcc(void);
12681 +
12682 /* LEDs */
12683 extern void __init at91_init_leds(u8 cpu_led, u8 timer_led);
12684 extern void __init at91_gpio_leds(struct gpio_led *leds, int nr);
12685 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/cpu.h linux-2.6/include/asm-arm/arch-at91/cpu.h
12686 --- linux-2.6.25/include/asm-arm/arch-at91/cpu.h 2008-05-03 00:15:51.000000000 +0200
12687 +++ linux-2.6/include/asm-arm/arch-at91/cpu.h 2008-05-05 22:10:58.000000000 +0200
12688 @@ -48,6 +48,17 @@
12689 return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
12690 }
12691
12692 +#ifdef CONFIG_ARCH_AT91CAP9
12693 +#include <asm/arch/at91_pmc.h>
12694 +
12695 +#define ARCH_REVISION_CAP9_B 0x399
12696 +#define ARCH_REVISION_CAP9_C 0x601
12697 +
12698 +static inline unsigned long at91cap9_rev_identify(void)
12699 +{
12700 + return (at91_sys_read(AT91_PMC_VER));
12701 +}
12702 +#endif
12703
12704 #ifdef CONFIG_ARCH_AT91RM9200
12705 #define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200)
12706 @@ -83,8 +94,12 @@
12707
12708 #ifdef CONFIG_ARCH_AT91CAP9
12709 #define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9)
12710 +#define cpu_is_at91cap9_revB() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
12711 +#define cpu_is_at91cap9_revC() (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
12712 #else
12713 #define cpu_is_at91cap9() (0)
12714 +#define cpu_is_at91cap9_revB() (0)
12715 +#define cpu_is_at91cap9_revC() (0)
12716 #endif
12717
12718 /*
12719 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/ics1523.h linux-2.6/include/asm-arm/arch-at91/ics1523.h
12720 --- linux-2.6.25/include/asm-arm/arch-at91/ics1523.h 1970-01-01 02:00:00.000000000 +0200
12721 +++ linux-2.6/include/asm-arm/arch-at91/ics1523.h 2008-01-16 21:24:29.000000000 +0200
12722 @@ -0,0 +1,154 @@
12723 +//*----------------------------------------------------------------------------
12724 +//* ATMEL Microcontroller Software Support - ROUSSET -
12725 +//*----------------------------------------------------------------------------
12726 +//* The software is delivered "AS IS" without warranty or condition of any
12727 +//* kind, either express, implied or statutory. This includes without
12728 +//* limitation any warranty or condition with respect to merchantability or
12729 +//* fitness for any particular purpose, or against the infringements of
12730 +//* intellectual property rights of others.
12731 +//*----------------------------------------------------------------------------
12732 +//* File Name : ics1523.h
12733 +//* Object : Clock Generator Prototyping File.
12734 +//*
12735 +//* 1.0 08/28/02 ED : Creation
12736 +//* 1.2 13/01/03 FB : Update on lib V3
12737 +//*----------------------------------------------------------------------------
12738 +
12739 +#ifndef ics1523_h
12740 +#define ics1523_h
12741 +
12742 +/*-------------------------------------------*/
12743 +/* ICS1523 TWI Serial Clock Definition */
12744 +/*-------------------------------------------*/
12745 +
12746 +#define ICS_MIN_CLOCK 100 /* Min Frequency Access Clock KHz */
12747 +#define ICS_MAX_CLOCK 400 /* Max Frequency Access Clock KHz */
12748 +#define ICS_TRANSFER_RATE ICS_MAX_CLOCK /* Transfer speed to apply */
12749 +
12750 +#define ICS_WRITE_CLK_PNB 30 /* TWCK Clock Periods required to write */
12751 +#define ICS_READ_CLK_PNB 40 /* TWCK Clock Periods required to read */
12752 +
12753 +/*-------------------------------------------*/
12754 +/* ICS1523 Write Operation Definition */
12755 +/*-------------------------------------------*/
12756 +
12757 +#define ICS1523_ACCESS_OK 0 /* OK */
12758 +#define ICS1523_ACCESS_ERROR -1 /* NOK */
12759 +
12760 +/*-------------------------------------------*/
12761 +/* ICS1523 Device Addresses Definition */
12762 +/*-------------------------------------------*/
12763 +
12764 +#define ICS_ADDR 0x26 /* Device Address */
12765 +
12766 +/*--------------------------------------------------*/
12767 +/* ICS1523 Registers Internal Addresses Definition */
12768 +/*--------------------------------------------------*/
12769 +
12770 +#define ICS_ICR 0x0 /* Input Control Register */
12771 +#define ICS_LCR 0x1 /* Loop Control Register */
12772 +#define ICS_FD0 0x2 /* PLL FeedBack Divider LSBs */
12773 +#define ICS_FD1 0x3 /* PLL FeedBack Divider MSBs */
12774 +#define ICS_DPAO 0x4 /* Dynamic Phase Aligner Offset */
12775 +#define ICS_DPAC 0x5 /* Dynamic Phase Aligner Resolution */
12776 +#define ICS_OE 0x6 /* Output Enables Register */
12777 +#define ICS_OD 0x7 /* Osc Divider Register */
12778 +#define ICS_SWRST 0x8 /* DPA & PLL Reset Register */
12779 +#define ICS_VID 0x10 /* Chip Version Register */
12780 +#define ICS_RID 0x11 /* Chip Revision Register */
12781 +#define ICS_SR 0x12 /* Status Register */
12782 +
12783 +/*------------------------------------------------------*/
12784 +/* ICS1523 Input Control Register Bits Definition */
12785 +/*------------------------------------------------------*/
12786 +
12787 +#define ICS_PDEN 0x1 /* Phase Detector Enable */
12788 +#define ICS_PDPOL 0x2 /* Phase Detector Enable Polarity */
12789 +#define ICS_REFPOL 0x4 /* External Reference Polarity */
12790 +#define ICS_FBKPOL 0x8 /* External Feedback Polarity */
12791 +#define ICS_FBKSEL 0x10 /* External Feedback Select */
12792 +#define ICS_FUNCSEL 0x20 /* Function Out Select */
12793 +#define ICS_ENPLS 0x40 /* Enable PLL Lock/Ref Status Output */
12794 +#define ICS_ENDLS 0x80 /* Enable DPA Lock/Ref Status Output */
12795 +
12796 +/*-----------------------------------------------------*/
12797 +/* ICS1523 Loop Control Register Bits Definition */
12798 +/*-----------------------------------------------------*/
12799 +
12800 +#define ICS_PFD 0x7 /* Phase Detector Gain */
12801 +#define ICS_PSD 0x30 /* Post-Scaler Divider */
12802 +
12803 +/*----------------------------------------------------*/
12804 +/* ICS1523 PLL FeedBack Divider LSBs Definition */
12805 +/*----------------------------------------------------*/
12806 +
12807 +#define ICS_FBDL 0xFF /* PLL FeedBack Divider LSBs */
12808 +
12809 +/*----------------------------------------------------*/
12810 +/* ICS1523 PLL FeedBack Divider MSBs Definition */
12811 +/*----------------------------------------------------*/
12812 +
12813 +#define ICS_FBDM 0xF /* PLL FeedBack Divider MSBs */
12814 +
12815 +/*------------------------------------------------------------*/
12816 +/* ICS1523 Dynamic Phase Aligner Offset Bits Definition */
12817 +/*------------------------------------------------------------*/
12818 +
12819 +#define ICS_DPAOS 0x2F /* Dynamic Phase Aligner Offset */
12820 +#define ICS_FILSEL 0x80 /* Loop Filter Select */
12821 +
12822 +/*----------------------------------------------------------------*/
12823 +/* ICS1523 Dynamic Phase Aligner Resolution Bits Definition */
12824 +/*----------------------------------------------------------------*/
12825 +
12826 +#define ICS_DPARES 0x3 /* Dynamic Phase Aligner Resolution */
12827 +#define ICS_MMREV 0xFC /* Metal Mask Revision Number */
12828 +
12829 +/*-------------------------------------------------------*/
12830 +/* ICS1523 Output Enables Register Bits Definition */
12831 +/*-------------------------------------------------------*/
12832 +
12833 +#define ICS_OEPCK 0x1 /* Output Enable for PECL PCLK Outputs */
12834 +#define ICS_OETCK 0x2 /* Output Enable for STTL CLK Output */
12835 +#define ICS_OEP2 0x4 /* Output Enable for PECL CLK/2 Outputs */
12836 +#define ICS_OET2 0x8 /* Output Enable for STTL CLK/2 Output */
12837 +#define ICS_OEF 0x10 /* Output Enable for STTL FUNC Output */
12838 +#define ICS_CLK2INV 0x20 /* CLK/2 Invert */
12839 +#define ICS_OSCL 0xC0 /* SSTL Clock Scaler */
12840 +
12841 +/*----------------------------------------------------*/
12842 +/* ICS1523 Osc Divider Register Bits Definition */
12843 +/*----------------------------------------------------*/
12844 +
12845 +#define ICS_OSCDIV 0x7F /* Oscillator Divider Modulus */
12846 +#define ICS_INSEL 0x80 /* Input Select */
12847 +
12848 +/*---------------------------------------------------*/
12849 +/* ICS1523 DPA & PLL Reset Register Definition */
12850 +/*---------------------------------------------------*/
12851 +
12852 +#define ICS_DPAR 0x0A /* DPA Reset Command */
12853 +#define ICS_PLLR 0x50 /* PLL Reset Command */
12854 +
12855 +/*------------------------------------------------*/
12856 +/* ICS1523 Chip Version Register Definition */
12857 +/*------------------------------------------------*/
12858 +
12859 +#define ICS_CHIPV 0xFF /* Chip Version */
12860 +
12861 +/*-------------------------------------------------*/
12862 +/* ICS1523 Chip Revision Register Definition */
12863 +/*-------------------------------------------------*/
12864 +
12865 +#define ICS_CHIPR 0xFF /* Chip Revision */
12866 +
12867 +/*------------------------------------------*/
12868 +/* ICS1523 Status Register Definition */
12869 +/*------------------------------------------*/
12870 +
12871 +#define ICS_DPALOCK 0x1 /* DPA Lock Status */
12872 +#define ICS_PLLLOCK 0x2 /* PLL Lock Status */
12873 +
12874 +int at91_ics1523_init(void);
12875 +
12876 +#endif /* ics1523_h */
12877 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/spi.h linux-2.6/include/asm-arm/arch-at91/spi.h
12878 --- linux-2.6.25/include/asm-arm/arch-at91/spi.h 1970-01-01 02:00:00.000000000 +0200
12879 +++ linux-2.6/include/asm-arm/arch-at91/spi.h 2008-01-16 21:24:29.000000000 +0200
12880 @@ -0,0 +1,54 @@
12881 +/*
12882 + * Serial Peripheral Interface (SPI) driver for the Atmel AT91RM9200
12883 + *
12884 + * (c) SAN People (Pty) Ltd
12885 + *
12886 + * This program is free software; you can redistribute it and/or
12887 + * modify it under the terms of the GNU General Public License
12888 + * as published by the Free Software Foundation; either version
12889 + * 2 of the License, or (at your option) any later version.
12890 + */
12891 +
12892 +#ifndef AT91_LEGACY_SPI_H
12893 +#define AT91_LEGACY_SPI_H
12894 +
12895 +#define SPI_MAJOR 153 /* registered device number */
12896 +
12897 +#define DEFAULT_SPI_CLK 6000000
12898 +
12899 +
12900 +/* Maximum number of buffers in a single SPI transfer.
12901 + * DataFlash uses maximum of 2
12902 + * spidev interface supports up to 8.
12903 + */
12904 +#define MAX_SPI_TRANSFERS 8
12905 +#define NR_SPI_DEVICES 4 /* number of devices on SPI bus */
12906 +
12907 +/*
12908 + * Describes the buffers for a SPI transfer.
12909 + * A transmit & receive buffer must be specified for each transfer
12910 + */
12911 +struct spi_transfer_list {
12912 + void* tx[MAX_SPI_TRANSFERS]; /* transmit */
12913 + int txlen[MAX_SPI_TRANSFERS];
12914 + void* rx[MAX_SPI_TRANSFERS]; /* receive */
12915 + int rxlen[MAX_SPI_TRANSFERS];
12916 + int nr_transfers; /* number of transfers */
12917 + int curr; /* current transfer */
12918 +};
12919 +
12920 +struct spi_local {
12921 + unsigned int pcs; /* Peripheral Chip Select value */
12922 +
12923 + struct spi_transfer_list *xfers; /* current transfer list */
12924 + dma_addr_t tx, rx; /* DMA address for current transfer */
12925 + dma_addr_t txnext, rxnext; /* DMA address for next transfer */
12926 +};
12927 +
12928 +
12929 +/* Exported functions */
12930 +extern void spi_access_bus(short device);
12931 +extern void spi_release_bus(short device);
12932 +extern int spi_transfer(struct spi_transfer_list* list);
12933 +
12934 +#endif
12935 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-at91/timex.h linux-2.6/include/asm-arm/arch-at91/timex.h
12936 --- linux-2.6.25/include/asm-arm/arch-at91/timex.h 2008-05-03 00:15:51.000000000 +0200
12937 +++ linux-2.6/include/asm-arm/arch-at91/timex.h 2008-04-18 18:30:40.000000000 +0200
12938 @@ -27,14 +27,29 @@
12939
12940 #define CLOCK_TICK_RATE (AT91_SLOW_CLOCK)
12941
12942 -#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9261)
12943 +#elif defined(CONFIG_ARCH_AT91SAM9260)
12944 +
12945 +#if defined(CONFIG_MACH_USB_A9260) || defined(CONFIG_MACH_QIL_A9260)
12946 +#define AT91SAM9_MASTER_CLOCK 90000000
12947 +#else
12948 +#define AT91SAM9_MASTER_CLOCK 99300000
12949 +#endif
12950 +
12951 +#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
12952 +
12953 +#elif defined(CONFIG_ARCH_AT91SAM9261)
12954
12955 #define AT91SAM9_MASTER_CLOCK 99300000
12956 #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
12957
12958 #elif defined(CONFIG_ARCH_AT91SAM9263)
12959
12960 +#if defined(CONFIG_MACH_USB_A9263)
12961 +#define AT91SAM9_MASTER_CLOCK 90000000
12962 +#else
12963 #define AT91SAM9_MASTER_CLOCK 99959500
12964 +#endif
12965 +
12966 #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
12967
12968 #elif defined(CONFIG_ARCH_AT91SAM9RL)
12969 diff -urN -x CVS linux-2.6.25/include/asm-arm/arch-ks8695/devices.h linux-2.6/include/asm-arm/arch-ks8695/devices.h
12970 --- linux-2.6.25/include/asm-arm/arch-ks8695/devices.h 2007-10-09 22:31:38.000000000 +0200
12971 +++ linux-2.6/include/asm-arm/arch-ks8695/devices.h 2007-12-31 10:44:34.000000000 +0200
12972 @@ -18,6 +18,11 @@
12973 extern void __init ks8695_add_device_lan(void);
12974 extern void __init ks8695_add_device_hpna(void);
12975
12976 + /* LEDs */
12977 +extern short ks8695_leds_cpu;
12978 +extern short ks8695_leds_timer;
12979 +extern void __init ks8695_init_leds(u8 cpu_led, u8 timer_led);
12980 +
12981 /* PCI */
12982 #define KS8695_MODE_PCI 0
12983 #define KS8695_MODE_MINIPCI 1
12984 diff -urN -x CVS linux-2.6.25/include/linux/clk.h linux-2.6/include/linux/clk.h
12985 --- linux-2.6.25/include/linux/clk.h 2007-10-09 22:31:38.000000000 +0200
12986 +++ linux-2.6/include/linux/clk.h 2007-12-31 10:44:34.000000000 +0200
12987 @@ -121,4 +121,24 @@
12988 */
12989 struct clk *clk_get_parent(struct clk *clk);
12990
12991 +/**
12992 + * clk_must_disable - report whether a clock's users must disable it
12993 + * @clk: one node in the clock tree
12994 + *
12995 + * This routine returns true only if the upcoming system state requires
12996 + * disabling the specified clock.
12997 + *
12998 + * It's common for platform power states to constrain certain clocks (and
12999 + * their descendants) to be unavailable, while other states allow that
13000 + * clock to be active. A platform's power states often include an "all on"
13001 + * mode; system wide sleep states like "standby" or "suspend-to-RAM"; and
13002 + * operating states which sacrifice functionality for lower power usage.
13003 + *
13004 + * The constraint value is commonly tested in device driver suspend(), to
13005 + * leave clocks active if they are needed for features like wakeup events.
13006 + * On platforms that support reduced functionality operating states, the
13007 + * constraint may also need to be tested during resume() and probe() calls.
13008 + */
13009 +int clk_must_disable(struct clk *clk);
13010 +
13011 #endif
13012 diff -urN -x CVS linux-2.6.25/include/linux/i2c-id.h linux-2.6/include/linux/i2c-id.h
13013 --- linux-2.6.25/include/linux/i2c-id.h 2008-05-03 00:15:52.000000000 +0200
13014 +++ linux-2.6/include/linux/i2c-id.h 2008-03-09 15:43:48.000000000 +0200
13015 @@ -131,6 +131,7 @@
13016
13017 /* --- PCA 9564 based algorithms */
13018 #define I2C_HW_A_ISA 0x1a0000 /* generic ISA Bus interface card */
13019 +#define I2C_HW_A_PLAT 0x1a0001 /* generic platform_bus interface */
13020
13021 /* --- PowerPC on-chip adapters */
13022 #define I2C_HW_OCP 0x120000 /* IBM on-chip I2C adapter */
13023 diff -urN -x CVS linux-2.6.25/include/linux/usb/atmel_usba_udc.h linux-2.6/include/linux/usb/atmel_usba_udc.h
13024 --- linux-2.6.25/include/linux/usb/atmel_usba_udc.h 1970-01-01 02:00:00.000000000 +0200
13025 +++ linux-2.6/include/linux/usb/atmel_usba_udc.h 2008-05-03 00:31:09.000000000 +0200
13026 @@ -0,0 +1,23 @@
13027 +/*
13028 +* Platform data definitions for Atmel USBA gadget driver.
13029 +*/
13030 +#ifndef __LINUX_USB_USBA_H
13031 +#define __LINUX_USB_USBA_H
13032 +
13033 +struct usba_ep_data {
13034 + char* name;
13035 + int index;
13036 + int fifo_size;
13037 + int nr_banks;
13038 + int can_dma;
13039 + int can_isoc;
13040 +};
13041 +
13042 +struct usba_platform_data {
13043 + int vbus_pin;
13044 + int num_ep;
13045 + struct usba_ep_data ep[0];
13046 +};
13047 +
13048 +#endif /* __LINUX_USB_USBA_H */
13049 +
13050 diff -urN -x CVS linux-2.6.25/include/video/atmel_lcdc.h linux-2.6/include/video/atmel_lcdc.h
13051 --- linux-2.6.25/include/video/atmel_lcdc.h 2008-05-03 00:15:53.000000000 +0200
13052 +++ linux-2.6/include/video/atmel_lcdc.h 2008-03-09 15:53:40.000000000 +0200
13053 @@ -39,6 +39,7 @@
13054 u8 bl_power;
13055 #endif
13056 bool lcdcon_is_backlight;
13057 + u8 saved_lcdcon;
13058
13059 u8 default_bpp;
13060 unsigned int default_lcdcon2;
13061 diff -urN -x CVS linux-2.6.25/sound/soc/at91/eti_b1_wm8731.c linux-2.6/sound/soc/at91/eti_b1_wm8731.c
13062 --- linux-2.6.25/sound/soc/at91/eti_b1_wm8731.c 2008-05-03 00:15:56.000000000 +0200
13063 +++ linux-2.6/sound/soc/at91/eti_b1_wm8731.c 2008-03-09 15:15:07.000000000 +0200
13064 @@ -33,8 +33,7 @@
13065 #include <sound/soc.h>
13066 #include <sound/soc-dapm.h>
13067
13068 -#include <asm/arch/hardware.h>
13069 -#include <asm/arch/at91_pio.h>
13070 +#include <asm/hardware.h>
13071 #include <asm/arch/gpio.h>
13072
13073 #include "../codecs/wm8731.h"
13074 @@ -47,13 +46,6 @@
13075 #define DBG(x...)
13076 #endif
13077
13078 -#define AT91_PIO_TF1 (1 << (AT91_PIN_PB6 - PIN_BASE) % 32)
13079 -#define AT91_PIO_TK1 (1 << (AT91_PIN_PB7 - PIN_BASE) % 32)
13080 -#define AT91_PIO_TD1 (1 << (AT91_PIN_PB8 - PIN_BASE) % 32)
13081 -#define AT91_PIO_RD1 (1 << (AT91_PIN_PB9 - PIN_BASE) % 32)
13082 -#define AT91_PIO_RK1 (1 << (AT91_PIN_PB10 - PIN_BASE) % 32)
13083 -#define AT91_PIO_RF1 (1 << (AT91_PIN_PB11 - PIN_BASE) % 32)
13084 -
13085 static struct clk *pck1_clk;
13086 static struct clk *pllb_clk;
13087
13088 @@ -276,7 +268,6 @@
13089 static int __init eti_b1_init(void)
13090 {
13091 int ret;
13092 - u32 ssc_pio_lines;
13093 struct at91_ssc_periph *ssc = eti_b1_dai.cpu_dai->private_data;
13094
13095 if (!request_mem_region(AT91RM9200_BASE_SSC1, SZ_16K, "soc-audio")) {
13096 @@ -310,19 +301,12 @@
13097 goto fail_io_unmap;
13098 }
13099
13100 - ssc_pio_lines = AT91_PIO_TF1 | AT91_PIO_TK1 | AT91_PIO_TD1
13101 - | AT91_PIO_RD1 /* | AT91_PIO_RK1 */ | AT91_PIO_RF1;
13102 -
13103 - /* Reset all PIO registers and assign lines to peripheral A */
13104 - at91_sys_write(AT91_PIOB + PIO_PDR, ssc_pio_lines);
13105 - at91_sys_write(AT91_PIOB + PIO_ODR, ssc_pio_lines);
13106 - at91_sys_write(AT91_PIOB + PIO_IFDR, ssc_pio_lines);
13107 - at91_sys_write(AT91_PIOB + PIO_CODR, ssc_pio_lines);
13108 - at91_sys_write(AT91_PIOB + PIO_IDR, ssc_pio_lines);
13109 - at91_sys_write(AT91_PIOB + PIO_MDDR, ssc_pio_lines);
13110 - at91_sys_write(AT91_PIOB + PIO_PUDR, ssc_pio_lines);
13111 - at91_sys_write(AT91_PIOB + PIO_ASR, ssc_pio_lines);
13112 - at91_sys_write(AT91_PIOB + PIO_OWDR, ssc_pio_lines);
13113 + at91_set_A_periph(AT91_PIN_PB6, 0); /* TF1 */
13114 + at91_set_A_periph(AT91_PIN_PB7, 0); /* TK1 */
13115 + at91_set_A_periph(AT91_PIN_PB8, 0); /* TD1 */
13116 + at91_set_A_periph(AT91_PIN_PB9, 0); /* RD1 */
13117 +/* at91_set_A_periph(AT91_PIN_PB10, 0);*/ /* RK1 */
13118 + at91_set_A_periph(AT91_PIN_PB11, 0); /* RF1 */
13119
13120 /*
13121 * Set PCK1 parent to PLLB and its rate to 12 Mhz.
13122 diff -urN -x CVS linux-2.6.25/sound/spi/at73c213.c linux-2.6/sound/spi/at73c213.c
13123 --- linux-2.6.25/sound/spi/at73c213.c 2008-05-03 00:15:56.000000000 +0200
13124 +++ linux-2.6/sound/spi/at73c213.c 2008-03-09 15:15:07.000000000 +0200
13125 @@ -114,7 +114,11 @@
13126 static struct snd_pcm_hardware snd_at73c213_playback_hw = {
13127 .info = SNDRV_PCM_INFO_INTERLEAVED |
13128 SNDRV_PCM_INFO_BLOCK_TRANSFER,
13129 +#ifdef __BIG_ENDIAN
13130 .formats = SNDRV_PCM_FMTBIT_S16_BE,
13131 +#else
13132 + .formats = SNDRV_PCM_FMTBIT_S16_LE,
13133 +#endif
13134 .rates = SNDRV_PCM_RATE_CONTINUOUS,
13135 .rate_min = 8000, /* Replaced by chip->bitrate later. */
13136 .rate_max = 50000, /* Replaced by chip->bitrate later. */
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