target/linux/at91/patches-5.10/107-clk-at91-sama7g5-remove-mck0-from-parent-list-of-oth.patch

   1 From 7cfe2dfe5ac7c72b904e4b59b240caa42721ee07 Mon Sep 17 00:00:00 2001
   2 From: Claudiu Beznea <claudiu.beznea@microchip.com>
   3 Date: Thu, 19 Nov 2020 17:43:13 +0200
   4 Subject: [PATCH 107/247] clk: at91: sama7g5: remove mck0 from parent list of
   5  other clocks
   6
   7 MCK0 is changed at runtime by DVFS. Due to this, since not all IPs
   8 are glitch free aware at MCK0 changes, remove MCK0 from parent list
   9 of other clocks (e.g. generic clock, programmable/system clock, MCKX).
  10
  11 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
  12 Link: https://lore.kernel.org/r/1605800597-16720-8-git-send-email-claudiu.beznea@microchip.com
  13 Signed-off-by: Stephen Boyd <sboyd@kernel.org>
  14 ---
  15  drivers/clk/at91/sama7g5.c | 55 ++++++++++++++++++--------------------
  16  1 file changed, 26 insertions(+), 29 deletions(-)
  17
  18 --- a/drivers/clk/at91/sama7g5.c
  19 +++ b/drivers/clk/at91/sama7g5.c
  20 @@ -280,7 +280,7 @@ static const struct {
  21           .ep = { "syspll_divpmcck", "ddrpll_divpmcck", "imgpll_divpmcck", },
  22           .ep_mux_table = { 5, 6, 7, },
  23           .ep_count = 3,
  24 -         .ep_chg_id = 6, },
  25 +         .ep_chg_id = 5, },
  26
  27         { .n = "mck4",
  28           .id = 4,
  29 @@ -313,7 +313,7 @@ static const struct {
  30  };
  31
  32  /* Mux table for programmable clocks. */
  33 -static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 3, 5, 6, 7, 8, 9, 10, };
  34 +static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 5, 6, 7, 8, 9, 10, };
  35
  36  /**
  37   * Peripheral clock description
  38 @@ -436,7 +436,7 @@ static const struct {
  39           .pp = { "audiopll_divpmcck", },
  40           .pp_mux_table = { 9, },
  41           .pp_count = 1,
  42 -         .pp_chg_id = 4, },
  43 +         .pp_chg_id = 3, },
  44
  45         { .n  = "csi_gclk",
  46           .id = 33,
  47 @@ -548,7 +548,7 @@ static const struct {
  48           .pp = { "ethpll_divpmcck", },
  49           .pp_mux_table = { 10, },
  50           .pp_count = 1,
  51 -         .pp_chg_id = 4, },
  52 +         .pp_chg_id = 3, },
  53
  54         { .n  = "gmac1_gclk",
  55           .id = 52,
  56 @@ -580,7 +580,7 @@ static const struct {
  57           .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
  58           .pp_mux_table = { 5, 9, },
  59           .pp_count = 2,
  60 -         .pp_chg_id = 5, },
  61 +         .pp_chg_id = 4, },
  62
  63         { .n  = "i2smcc1_gclk",
  64           .id = 58,
  65 @@ -588,7 +588,7 @@ static const struct {
  66           .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
  67           .pp_mux_table = { 5, 9, },
  68           .pp_count = 2,
  69 -         .pp_chg_id = 5, },
  70 +         .pp_chg_id = 4, },
  71
  72         { .n  = "mcan0_gclk",
  73           .id = 61,
  74 @@ -730,7 +730,7 @@ static const struct {
  75           .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
  76           .pp_mux_table = { 5, 8, },
  77           .pp_count = 2,
  78 -         .pp_chg_id = 5, },
  79 +         .pp_chg_id = 4, },
  80
  81         { .n  = "sdmmc1_gclk",
  82           .id = 81,
  83 @@ -738,7 +738,7 @@ static const struct {
  84           .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
  85           .pp_mux_table = { 5, 8, },
  86           .pp_count = 2,
  87 -         .pp_chg_id = 5, },
  88 +         .pp_chg_id = 4, },
  89
  90         { .n  = "sdmmc2_gclk",
  91           .id = 82,
  92 @@ -746,7 +746,7 @@ static const struct {
  93           .pp = { "syspll_divpmcck", "baudpll_divpmcck", },
  94           .pp_mux_table = { 5, 8, },
  95           .pp_count = 2,
  96 -         .pp_chg_id = 5, },
  97 +         .pp_chg_id = 4, },
  98
  99         { .n  = "spdifrx_gclk",
 100           .id = 84,
 101 @@ -754,7 +754,7 @@ static const struct {
 102           .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
 103           .pp_mux_table = { 5, 9, },
 104           .pp_count = 2,
 105 -         .pp_chg_id = 5, },
 106 +         .pp_chg_id = 4, },
 107
 108         { .n = "spdiftx_gclk",
 109           .id = 85,
 110 @@ -762,7 +762,7 @@ static const struct {
 111           .pp = { "syspll_divpmcck", "audiopll_divpmcck", },
 112           .pp_mux_table = { 5, 9, },
 113           .pp_count = 2,
 114 -         .pp_chg_id = 5, },
 115 +         .pp_chg_id = 4, },
 116
 117         { .n  = "tcb0_ch0_gclk",
 118           .id = 88,
 119 @@ -961,9 +961,8 @@ static void __init sama7g5_pmc_setup(str
 120         parent_names[0] = md_slck_name;
 121         parent_names[1] = td_slck_name;
 122         parent_names[2] = "mainck";
 123 -       parent_names[3] = "mck0";
 124         for (i = 0; i < ARRAY_SIZE(sama7g5_mckx); i++) {
 125 -               u8 num_parents = 4 + sama7g5_mckx[i].ep_count;
 126 +               u8 num_parents = 3 + sama7g5_mckx[i].ep_count;
 127                 u32 *mux_table;
 128
 129                 mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
 130 @@ -971,10 +970,10 @@ static void __init sama7g5_pmc_setup(str
 131                 if (!mux_table)
 132                         goto err_free;
 133
 134 -               SAMA7G5_INIT_TABLE(mux_table, 4);
 135 -               SAMA7G5_FILL_TABLE(&mux_table[4], sama7g5_mckx[i].ep_mux_table,
 136 +               SAMA7G5_INIT_TABLE(mux_table, 3);
 137 +               SAMA7G5_FILL_TABLE(&mux_table[3], sama7g5_mckx[i].ep_mux_table,
 138                                    sama7g5_mckx[i].ep_count);
 139 -               SAMA7G5_FILL_TABLE(&parent_names[4], sama7g5_mckx[i].ep,
 140 +               SAMA7G5_FILL_TABLE(&parent_names[3], sama7g5_mckx[i].ep,
 141                                    sama7g5_mckx[i].ep_count);
 142
 143                 hw = at91_clk_sama7g5_register_master(regmap, sama7g5_mckx[i].n,
 144 @@ -997,20 +996,19 @@ static void __init sama7g5_pmc_setup(str
 145         parent_names[0] = md_slck_name;
 146         parent_names[1] = td_slck_name;
 147         parent_names[2] = "mainck";
 148 -       parent_names[3] = "mck0";
 149 -       parent_names[4] = "syspll_divpmcck";
 150 -       parent_names[5] = "ddrpll_divpmcck";
 151 -       parent_names[6] = "imgpll_divpmcck";
 152 -       parent_names[7] = "baudpll_divpmcck";
 153 -       parent_names[8] = "audiopll_divpmcck";
 154 -       parent_names[9] = "ethpll_divpmcck";
 155 +       parent_names[3] = "syspll_divpmcck";
 156 +       parent_names[4] = "ddrpll_divpmcck";
 157 +       parent_names[5] = "imgpll_divpmcck";
 158 +       parent_names[6] = "baudpll_divpmcck";
 159 +       parent_names[7] = "audiopll_divpmcck";
 160 +       parent_names[8] = "ethpll_divpmcck";
 161         for (i = 0; i < 8; i++) {
 162                 char name[6];
 163
 164                 snprintf(name, sizeof(name), "prog%d", i);
 165
 166                 hw = at91_clk_register_programmable(regmap, name, parent_names,
 167 -                                                   10, i,
 168 +                                                   9, i,
 169                                                     &programmable_layout,
 170                                                     sama7g5_prog_mux_table);
 171                 if (IS_ERR(hw))
 172 @@ -1047,9 +1045,8 @@ static void __init sama7g5_pmc_setup(str
 173         parent_names[0] = md_slck_name;
 174         parent_names[1] = td_slck_name;
 175         parent_names[2] = "mainck";
 176 -       parent_names[3] = "mck0";
 177         for (i = 0; i < ARRAY_SIZE(sama7g5_gck); i++) {
 178 -               u8 num_parents = 4 + sama7g5_gck[i].pp_count;
 179 +               u8 num_parents = 3 + sama7g5_gck[i].pp_count;
 180                 u32 *mux_table;
 181
 182                 mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
 183 @@ -1057,10 +1054,10 @@ static void __init sama7g5_pmc_setup(str
 184                 if (!mux_table)
 185                         goto err_free;
 186
 187 -               SAMA7G5_INIT_TABLE(mux_table, 4);
 188 -               SAMA7G5_FILL_TABLE(&mux_table[4], sama7g5_gck[i].pp_mux_table,
 189 +               SAMA7G5_INIT_TABLE(mux_table, 3);
 190 +               SAMA7G5_FILL_TABLE(&mux_table[3], sama7g5_gck[i].pp_mux_table,
 191                                    sama7g5_gck[i].pp_count);
 192 -               SAMA7G5_FILL_TABLE(&parent_names[4], sama7g5_gck[i].pp,
 193 +               SAMA7G5_FILL_TABLE(&parent_names[3], sama7g5_gck[i].pp,
 194                                    sama7g5_gck[i].pp_count);
 195
 196                 hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,