target/linux/at91/patches-5.15/209-ARM-at91-pm-add-support-for-MCK1.4-save-restore-for-.patch

   1 From 9ee7fd7aa956671727752dac6bd131cf511c1137 Mon Sep 17 00:00:00 2001
   2 From: Claudiu Beznea <claudiu.beznea@microchip.com>
   3 Date: Thu, 15 Apr 2021 13:49:59 +0300
   4 Subject: [PATCH 209/247] ARM: at91: pm: add support for MCK1..4 save/restore
   5  for ulp modes
   6
   7 Add support for MCK1..4 save restore for ULP modes.
   8
   9 Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
  10 Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
  11 Link: https://lore.kernel.org/r/20210415105010.569620-14-claudiu.beznea@microchip.com
  12 ---
  13  arch/arm/mach-at91/pm_suspend.S | 126 ++++++++++++++++++++++++++++++++
  14  1 file changed, 126 insertions(+)
  15
  16 --- a/arch/arm/mach-at91/pm_suspend.S
  17 +++ b/arch/arm/mach-at91/pm_suspend.S
  18 @@ -765,7 +765,122 @@ sr_dis_exit:
  19  2:
  20  .endm
  21
  22 +/**
  23 + * at91_mckx_ps_enable:        save MCK1..4 settings and switch it to main clock
  24 + *
  25 + * Side effects: overwrites tmp1, tmp2
  26 + */
  27 +.macro at91_mckx_ps_enable
  28 +#ifdef CONFIG_SOC_SAMA7
  29 +       ldr     pmc, .pmc_base
  30 +
  31 +       /* There are 4 MCKs we need to handle: MCK1..4 */
  32 +       mov     tmp1, #1
  33 +e_loop:        cmp     tmp1, #5
  34 +       beq     e_done
  35 +
  36 +       /* Write MCK ID to retrieve the settings. */
  37 +       str     tmp1, [pmc, #AT91_PMC_MCR_V2]
  38 +       ldr     tmp2, [pmc, #AT91_PMC_MCR_V2]
  39 +
  40 +e_save_mck1:
  41 +       cmp     tmp1, #1
  42 +       bne     e_save_mck2
  43 +       str     tmp2, .saved_mck1
  44 +       b       e_ps
  45 +
  46 +e_save_mck2:
  47 +       cmp     tmp1, #2
  48 +       bne     e_save_mck3
  49 +       str     tmp2, .saved_mck2
  50 +       b       e_ps
  51 +
  52 +e_save_mck3:
  53 +       cmp     tmp1, #3
  54 +       bne     e_save_mck4
  55 +       str     tmp2, .saved_mck3
  56 +       b       e_ps
  57 +
  58 +e_save_mck4:
  59 +       str     tmp2, .saved_mck4
  60 +
  61 +e_ps:
  62 +       /* Use CSS=MAINCK and DIV=1. */
  63 +       bic     tmp2, tmp2, #AT91_PMC_MCR_V2_CSS
  64 +       bic     tmp2, tmp2, #AT91_PMC_MCR_V2_DIV
  65 +       orr     tmp2, tmp2, #AT91_PMC_MCR_V2_CSS_MAINCK
  66 +       orr     tmp2, tmp2, #AT91_PMC_MCR_V2_DIV1
  67 +       str     tmp2, [pmc, #AT91_PMC_MCR_V2]
  68 +
  69 +       wait_mckrdy tmp1
  70 +
  71 +       add     tmp1, tmp1, #1
  72 +       b       e_loop
  73 +
  74 +e_done:
  75 +#endif
  76 +.endm
  77 +
  78 +/**
  79 + * at91_mckx_ps_restore: restore MCK1..4 settings
  80 + *
  81 + * Side effects: overwrites tmp1, tmp2
  82 + */
  83 +.macro at91_mckx_ps_restore
  84 +#ifdef CONFIG_SOC_SAMA7
  85 +       ldr     pmc, .pmc_base
  86 +
  87 +       /* There are 4 MCKs we need to handle: MCK1..4 */
  88 +       mov     tmp1, #1
  89 +r_loop:        cmp     tmp1, #5
  90 +       beq     r_done
  91 +
  92 +r_save_mck1:
  93 +       cmp     tmp1, #1
  94 +       bne     r_save_mck2
  95 +       ldr     tmp2, .saved_mck1
  96 +       b       r_ps
  97 +
  98 +r_save_mck2:
  99 +       cmp     tmp1, #2
 100 +       bne     r_save_mck3
 101 +       ldr     tmp2, .saved_mck2
 102 +       b       r_ps
 103 +
 104 +r_save_mck3:
 105 +       cmp     tmp1, #3
 106 +       bne     r_save_mck4
 107 +       ldr     tmp2, .saved_mck3
 108 +       b       r_ps
 109 +
 110 +r_save_mck4:
 111 +       ldr     tmp2, .saved_mck4
 112 +
 113 +r_ps:
 114 +       /* Write MCK ID to retrieve the settings. */
 115 +       str     tmp1, [pmc, #AT91_PMC_MCR_V2]
 116 +       ldr     tmp3, [pmc, #AT91_PMC_MCR_V2]
 117 +
 118 +       /* We need to restore CSS and DIV. */
 119 +       bic     tmp3, tmp3, #AT91_PMC_MCR_V2_CSS
 120 +       bic     tmp3, tmp3, #AT91_PMC_MCR_V2_DIV
 121 +       orr     tmp3, tmp3, tmp2
 122 +       bic     tmp3, tmp3, #AT91_PMC_MCR_V2_ID_MSK
 123 +       orr     tmp3, tmp3, tmp1
 124 +       orr     tmp3, tmp3, #AT91_PMC_MCR_V2_CMD
 125 +       str     tmp2, [pmc, #AT91_PMC_MCR_V2]
 126 +
 127 +       wait_mckrdy tmp1
 128 +
 129 +       add     tmp1, tmp1, #1
 130 +       b       r_loop
 131 +r_done:
 132 +#endif
 133 +.endm
 134 +
 135  .macro at91_ulp_mode
 136 +       at91_mckx_ps_enable
 137 +
 138         ldr     pmc, .pmc_base
 139         ldr     tmp2, .mckr_offset
 140         ldr     tmp3, .pm_mode
 141 @@ -817,6 +932,7 @@ ulp_exit:
 142         mov     tmp3, #0
 143         wait_mckrdy tmp3
 144
 145 +       at91_mckx_ps_restore
 146  .endm
 147
 148  .macro at91_backup_mode
 149 @@ -946,6 +1062,16 @@ ENDPROC(at91_pm_suspend_in_sram)
 150         .word 0
 151  .saved_osc_status:
 152         .word 0
 153 +#ifdef CONFIG_SOC_SAMA7
 154 +.saved_mck1:
 155 +       .word 0
 156 +.saved_mck2:
 157 +       .word 0
 158 +.saved_mck3:
 159 +       .word 0
 160 +.saved_mck4:
 161 +       .word 0
 162 +#endif
 163
 164  ENTRY(at91_pm_suspend_in_sram_sz)
 165         .word .-at91_pm_suspend_in_sram