ath79: move dts-v1 statement to ath79.dtsi
[openwrt/staging/mkresin.git] / target / linux / ath79 / dts / ar7242_ubnt_sw.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar7242.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "qca,ar7242";
10 model = "Ubiquiti Networks SW board";
11
12 chosen {
13 bootargs = "console=ttyS0,115200n8";
14 };
15
16 aliases {
17 led-boot = &led_usr;
18 led-failsafe = &led_usr;
19 led-running = &led_usr;
20 led-upgrade = &led_usr;
21 };
22
23 leds {
24 compatible = "gpio-leds";
25
26 led_usr: usr {
27 label = "ubnt:yellow:usr";
28 gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
29 };
30 };
31
32 keys {
33 compatible = "gpio-keys";
34
35 reset {
36 linux,code = <KEY_RESTART>;
37 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
38 debounce-interval = <60>;
39 };
40 };
41
42 gpio_spi {
43 compatible = "spi-gpio";
44 #address-cells = <0x1>;
45 ranges;
46
47 sck-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
48 mosi-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
49 cs-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
50 num-chipselects = <1>;
51
52 gpio_hc595: gpio_spi@0 {
53 compatible = "fairchild,74hc595";
54 reg = <0>;
55 registers-number = <2>;
56 spi-max-frequency = <100000>;
57 enable-gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
58
59 gpio-controller;
60 #gpio-cells = <2>;
61
62 };
63 };
64 };
65
66 &spi {
67 status = "okay";
68
69 num-cs = <1>;
70
71 flash@0 {
72 compatible = "jedec,spi-nor";
73 reg = <0>;
74 spi-max-frequency = <25000000>;
75
76 partitions {
77 compatible = "fixed-partitions";
78 #address-cells = <1>;
79 #size-cells = <1>;
80
81 partition@0 {
82 reg = <0x000000 0x040000>;
83 label = "u-boot";
84 read-only;
85 };
86
87 partition@40000 {
88 reg = <0x040000 0x010000>;
89 label = "u-boot-env";
90 read-only;
91 };
92
93 partition@50000 {
94 compatible = "denx,uimage";
95 reg = <0x050000 0x760000>;
96 label = "firmware";
97 };
98
99 partition@7b0000 {
100 reg = <0x7b0000 0x040000>;
101 label = "cfg";
102 read-only;
103 };
104
105 art: partition@7f0000 {
106 reg = <0x7f0000 0x010000>;
107 label = "art";
108 read-only;
109 };
110 };
111 };
112 };
113
114 &usb_phy {
115 status = "okay";
116 };
117
118 &usb {
119 #address-cells = <1>;
120 #size-cells = <0>;
121 status = "okay";
122
123 hub_port: port@1 {
124 reg = <1>;
125 #trigger-source-cells = <0>;
126 };
127 };
128
129 &pcie {
130 status = "okay";
131 };
132
133 &uart {
134 status = "okay";
135 };
136
137 &eth1 {
138 status = "okay";
139
140 mtd-mac-address = <&art 0x6>;
141 };