3b0716e798c33595112a68d769edbc20067d28de
[openwrt/staging/mkresin.git] / target / linux / ath79 / dts / ar9344_pcs_cr5000.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "ar9344.dtsi"
8
9 / {
10 model = "PowerCloud Systems CR5000";
11 compatible = "pcs,cr5000", "qca,ar9344";
12
13 aliases {
14 serial0 = &uart;
15 led-boot = &led_power;
16 led-failsafe = &led_power;
17 led-running = &led_power;
18 led-upgrade = &led_power;
19 };
20
21 keys {
22 compatible = "gpio-keys";
23
24 pinctrl-names = "default";
25 pinctrl-0 = <&jtag_disable_pins>;
26
27 reset {
28 label = "Reset button";
29 linux,code = <KEY_RESTART>;
30 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
31 debounce-interval = <60>;
32 };
33
34 wps {
35 label = "WPS button";
36 linux,code = <KEY_WPS_BUTTON>;
37 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
38 debounce-interval = <60>;
39 };
40 };
41
42 leds {
43 compatible = "gpio-leds";
44
45 led_power: power {
46 label = "pcs:amber:power";
47 gpios = <&gpio 2 GPIO_ACTIVE_LOW>,
48 <&gpio 4 GPIO_ACTIVE_LOW>;
49 default-state = "on";
50 };
51
52 wlan2g {
53 label = "pcs:blue:wlan";
54 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
55 linux,default-trigger = "phy0tpt";
56 };
57
58 wps_white {
59 label = "pcs:white:wps";
60 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
61 };
62 };
63 };
64
65 &ref {
66 clock-frequency = <25000000>;
67 };
68
69 &uart {
70 status = "okay";
71 };
72
73 &spi {
74 status = "okay";
75
76 num-cs = <1>;
77
78 flash@0 {
79 compatible = "jedec,spi-nor";
80 reg = <0>;
81 spi-max-frequency = <25000000>;
82
83 partitions {
84 compatible = "fixed-partitions";
85 #address-cells = <1>;
86 #size-cells = <1>;
87
88 uboot: partition@0 {
89 label = "u-boot";
90 reg = <0x000000 0x040000>;
91 read-only;
92 };
93
94 partition@40000 {
95 label = "u-boot-env";
96 reg = <0x040000 0x010000>;
97 read-only;
98 };
99
100 partition@50000 {
101 compatible = "denx,uimage";
102 label = "firmware";
103 reg = <0x050000 0x07a0000>;
104 };
105
106 art: partition@7f0000 {
107 label = "art";
108 reg = <0x7f0000 0x010000>;
109 read-only;
110 };
111 };
112 };
113 };
114
115 &usb {
116 status = "okay";
117 #address-cells = <1>;
118 #size-cells = <0>;
119
120 hub_port1: port@1 {
121 reg = <1>;
122 #trigger-source-cells = <0>;
123 };
124 };
125
126 &usb_phy {
127 status = "okay";
128 };
129
130 &pcie {
131 status = "okay";
132
133 ath9k: wifi@0,0 {
134 compatible = "pci168c,0030";
135 reg = <0x0000 0 0 0 0>;
136 mtd-mac-address = <&art 0x5002>;
137 #gpio-cells = <2>;
138 gpio-controller;
139 };
140 };
141
142 &mdio0 {
143 status = "okay";
144
145 phy-mask = <0>;
146
147 phy0: ethernet-phy@0 {
148 reg = <0>;
149 phy-mode = "rgmii";
150 qca,ar8327-initvals = <
151 0x04 0x07600000 /* PORT0 PAD MODE CTRL */
152 0x10 0x81000080 /* POWER_ON_STRAP */
153 0x50 0xcc35cc35 /* LED_CTRL0 */
154 0x54 0xca35ca35 /* LED_CTRL1 */
155 0x58 0xc935c935 /* LED_CTRL2 */
156 0x5c 0x03ffff00 /* LED_CTRL3 */
157 0x7c 0x0000007e /* PORT0_STATUS */
158 >;
159 };
160 };
161
162 &eth0 {
163 #address-cells = <1>;
164 #size-cells = <0>;
165 status = "okay";
166
167 /* default for ar934x, except for 1000M */
168 pll-data = <0x06000000 0x00000101 0x00001616>;
169
170 mtd-mac-address = <&art 0x0>;
171
172 phy-mode = "rgmii";
173 phy-handle = <&phy0>;
174
175 aliases {
176 ag0 = &eth1;
177 };
178
179 port@0 {
180 compatible = "swconfig,port";
181 reg = <0>;
182 swconfig,segment = "lan";
183 swconfig,portmap = <1 1>;
184 };
185
186 port@1 {
187 compatible = "swconfig,port";
188 reg = <1>;
189 swconfig,segment = "lan";
190 swconfig,portmap = <2 2>;
191 };
192
193 port@2 {
194 compatible = "swconfig,port";
195 reg = <2>;
196 swconfig,segment = "lan";
197 swconfig,portmap = <3 3>;
198 };
199
200 port@3 {
201 compatible = "swconfig,port";
202 reg = <3>;
203 swconfig,segment = "lan";
204 swconfig,portmap = <4 4>;
205 };
206
207 port@4 {
208 compatible = "swconfig,port";
209 reg = <4>;
210 swconfig,segment = "wan";
211 swconfig,portmap = <5 5>;
212 };
213 };
214
215 &wmac {
216 status = "okay";
217
218 mtd-cal-data = <&art 0x1000>;
219 };