ath79: enable UART in SoC DTSI files
[openwrt/staging/mkresin.git] / target / linux / ath79 / dts / qca9563_rosinson_wr818.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca956x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 model = "ROSINSON WR818";
10 compatible = "rosinson,wr818", "qca,qca9563";
11
12 aliases {
13 led-boot = &led_system;
14 led-failsafe = &led_system;
15 led-running = &led_system;
16 led-upgrade = &led_system;
17 };
18
19 leds {
20 compatible = "gpio-leds";
21
22 led_system: system {
23 label = "red:system";
24 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
25 };
26
27 wifi_2g {
28 label = "red:wifi2g";
29 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
30 linux,default-trigger = "phy0tpt";
31 };
32 };
33
34 keys {
35 compatible = "gpio-keys";
36
37 reset {
38 label = "reset";
39 linux,code = <KEY_RESTART>;
40 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
41 debounce-interval = <60>;
42 };
43 };
44 };
45
46 &spi {
47 status = "okay";
48
49 flash@0 {
50 compatible = "jedec,spi-nor";
51 reg = <0>;
52 spi-max-frequency = <25000000>;
53
54 partitions {
55 compatible = "fixed-partitions";
56 #address-cells = <1>;
57 #size-cells = <1>;
58
59 partition@0 {
60 label = "u-boot";
61 reg = <0x000000 0x040000>;
62 read-only;
63 };
64
65 partition@40000 {
66 label = "u-boot-env";
67 reg = <0x040000 0x010000>;
68 read-only;
69 };
70
71 info: partition@50000 {
72 label = "factory";
73 reg = <0x050000 0x010000>;
74 read-only;
75 };
76
77 partition@60000 {
78 compatible = "denx,uimage";
79 label = "firmware";
80 reg = <0x060000 0xf80000>;
81 };
82
83 art: partition@ff0000 {
84 label = "art";
85 reg = <0xff0000 0x010000>;
86 read-only;
87 };
88 };
89 };
90 };
91
92 &mdio0 {
93 status = "okay";
94
95 phy-mask = <0>;
96 phy0: ethernet-phy@0 {
97 reg = <0>;
98 phy-mode = "sgmii";
99
100 qca,ar8327-initvals = <
101 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
102 0x7c 0x0000007e /* PORT0_STATUS */
103 >;
104 };
105 };
106
107 &eth0 {
108 status = "okay";
109
110 mtd-mac-address = <&info 0x0>;
111 phy-mode = "sgmii";
112 phy-handle = <&phy0>;
113 };
114
115 &wmac {
116 status = "okay";
117
118 mtd-cal-data = <&art 0x1000>;
119 };
120
121 &usb_phy0 {
122 status = "okay";
123 };
124
125 &usb0 {
126 #address-cells = <1>;
127 #size-cells = <0>;
128 status = "okay";
129
130 port@1 {
131 reg = <1>;
132 #trigger-source-cells = <0>;
133 };
134 };
135
136 &usb_phy1 {
137 status = "okay";
138 };
139
140 &usb1 {
141 #address-cells = <1>;
142 #size-cells = <0>;
143 status = "okay";
144
145 port@2 {
146 reg = <2>;
147 #trigger-source-cells = <0>;
148 };
149 };