f8dec2bc6b78055f027fd94062310e7f6cbe52c3
[openwrt/staging/dedeckeh.git] / target / linux / ath79 / dts / qca9563_yuncore_xd4200.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca956x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 aliases {
10 label-mac-device = &eth0;
11 };
12
13 keys {
14 compatible = "gpio-keys";
15
16 reset {
17 linux,code = <KEY_RESTART>;
18 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
19 debounce-interval = <60>;
20 };
21 };
22 };
23
24 &eth0 {
25 status = "okay";
26
27 pll-data = <0x03000101 0x00000101 0x00001919>;
28
29 nvmem-cells = <&macaddr_art_0>;
30 nvmem-cell-names = "mac-address";
31 phy-mode = "sgmii";
32 phy-handle = <&phy0>;
33 };
34
35 &mdio0 {
36 status = "okay";
37
38 phy-mask = <0>;
39
40 phy0: ethernet-phy@0 {
41 reg = <0>;
42 phy-mode = "sgmii";
43
44 qca,ar8327-initvals = <
45 0x04 0x00080080 /* PORT0 PAD MODE CTRL */
46 0x10 0x81000080 /* POWER_ON_STRAP */
47 0x50 0xcf37cf37 /* LED_CTRL0 */
48 0x54 0xcf37cf37 /* LED_CTRL1 */
49 0x58 0xcf37cf37 /* LED_CTRL2 */
50 0x5c 0x0000c300 /* LED_CTRL3 */
51 0x7c 0x0000007e /* PORT0_STATUS */
52 >;
53 };
54 };
55
56 &pcie {
57 status = "okay";
58
59 wifi@0,0 {
60 compatible = "pci168c,0056";
61 reg = <0x0000 0 0 0 0>;
62 };
63 };
64
65 &spi {
66 status = "okay";
67
68 flash@0 {
69 compatible = "jedec,spi-nor";
70 reg = <0>;
71 spi-max-frequency = <25000000>;
72
73 partitions {
74 compatible = "fixed-partitions";
75 #address-cells = <1>;
76 #size-cells = <1>;
77
78 partition@0 {
79 label = "u-boot";
80 reg = <0x000000 0x040000>;
81 read-only;
82 };
83
84 partition@40000 {
85 label = "u-boot-env";
86 reg = <0x040000 0x010000>;
87 };
88
89 partition@50000 {
90 compatible = "denx,uimage";
91 label = "firmware";
92 reg = <0x050000 0xfa0000>;
93 };
94
95 art: partition@ff0000 {
96 label = "art";
97 reg = <0xff0000 0x010000>;
98 read-only;
99 };
100 };
101 };
102 };
103
104 &wmac {
105 status = "okay";
106
107 mtd-cal-data = <&art 0x1000>;
108 };
109
110 &art {
111 compatible = "nvmem-cells";
112 #address-cells = <1>;
113 #size-cells = <1>;
114
115 macaddr_art_0: macaddr@0 {
116 reg = <0x0 0x6>;
117 };
118 };