target/linux/bcm27xx/patches-5.10/950-0434-overlays-give-Seeed-Studio-CAN-BUS-FD-HAT-a-v2-postf.patch

   1 From 69da0bd66630848403a1ccbb927d5325fc54381e Mon Sep 17 00:00:00 2001
   2 From: Marc Kleine-Budde <mkl@pengutronix.de>
   3 Date: Sat, 2 Jan 2021 21:08:59 +0100
   4 Subject: [PATCH] overlays: give Seeed Studio CAN BUS FD HAT a -v2
   5  postfix
   6
   7 There are several versions of the Seeed Studio CAN BUS FD HAT. This is the
   8 second version, based on the mcp2518fd, so give it a -v2 postfix.
   9
  10 Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
  11 ---
  12  arch/arm/boot/dts/overlays/Makefile                       | 2 +-
  13  arch/arm/boot/dts/overlays/README                         | 8 ++++----
  14  ...fd-hat-overlay.dts => seeed-can-fd-hat-v2-overlay.dts} | 0
  15  3 files changed, 5 insertions(+), 5 deletions(-)
  16  rename arch/arm/boot/dts/overlays/{seeed-can-fd-hat-overlay.dts => seeed-can-fd-hat-v2-overlay.dts} (100%)
  17
  18 --- a/arch/arm/boot/dts/overlays/Makefile
  19 +++ b/arch/arm/boot/dts/overlays/Makefile
  20 @@ -161,7 +161,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
  21         sc16is752-spi1.dtbo \
  22         sdhost.dtbo \
  23         sdio.dtbo \
  24 -       seeed-can-fd-hat.dtbo \
  25 +       seeed-can-fd-hat-v2.dtbo \
  26         sh1106-spi.dtbo \
  27         smi.dtbo \
  28         smi-dev.dtbo \
  29 --- a/arch/arm/boot/dts/overlays/README
  30 +++ b/arch/arm/boot/dts/overlays/README
  31 @@ -2504,11 +2504,11 @@ Info:   This overlay is now deprecated.
  32  Load:   <Deprecated>
  33
  34
  35 -Name:   seeed-can-fd-hat
  36 -Info:   Overlay for Seeed Studio CAN BUS FD HAT with two CAN FD channels and an
  37 -        RTC.
  38 +Name:   seeed-can-fd-hat-v2
  39 +Info:   Overlay for Seeed Studio CAN BUS FD HAT with two CAN FD channels
  40 +        (based on the mcp2518fd) and an RTC.
  41          https://www.seeedstudio.com/CAN-BUS-FD-HAT-for-Raspberry-Pi-p-4742.html
  42 -Load:   dtoverlay=seeed-can-fd-hat
  43 +Load:   dtoverlay=seeed-can-fd-hat-v2
  44  Params: <None>
  45
  46
  47 --- a/arch/arm/boot/dts/overlays/seeed-can-fd-hat-overlay.dts
  48 +++ /dev/null
  49 @@ -1,117 +0,0 @@
  50 -// redo: ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi0-1,interrupt=24 i2c-rtc-overlay.dts,pcf85063
  51 -
  52 -// Device tree overlay for https://www.seeedstudio.com/CAN-BUS-FD-HAT-for-Raspberry-Pi-p-4742.html
  53 -
  54 -/dts-v1/;
  55 -/plugin/;
  56 -
  57 -#include <dt-bindings/gpio/gpio.h>
  58 -#include <dt-bindings/interrupt-controller/irq.h>
  59 -#include <dt-bindings/pinctrl/bcm2835.h>
  60 -
  61 -/ {
  62 -       compatible = "brcm,bcm2835";
  63 -       fragment@0 {
  64 -               target = <&spidev0>;
  65 -               __overlay__ {
  66 -                       status = "disabled";
  67 -               };
  68 -       };
  69 -       fragment@1 {
  70 -               target = <&gpio>;
  71 -               __overlay__ {
  72 -                       mcp251xfd_pins: mcp251xfd_spi0_0_pins {
  73 -                               brcm,pins = <25>;
  74 -                               brcm,function = <BCM2835_FSEL_GPIO_IN>;
  75 -                       };
  76 -               };
  77 -       };
  78 -       fragment@2 {
  79 -               target-path = "/clocks";
  80 -               __overlay__ {
  81 -                       clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
  82 -                               #clock-cells = <0>;
  83 -                               compatible = "fixed-clock";
  84 -                               clock-frequency = <40000000>;
  85 -                       };
  86 -               };
  87 -       };
  88 -       fragment@3 {
  89 -               target = <&spi0>;
  90 -               __overlay__ {
  91 -                       status = "okay";
  92 -                       #address-cells = <1>;
  93 -                       #size-cells = <0>;
  94 -                       mcp251xfd@0 {
  95 -                               compatible = "microchip,mcp251xfd";
  96 -                               reg = <0>;
  97 -                               pinctrl-names = "default";
  98 -                               pinctrl-0 = <&mcp251xfd_pins>;
  99 -                               spi-max-frequency = <20000000>;
 100 -                               interrupt-parent = <&gpio>;
 101 -                               interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
 102 -                               clocks = <&clk_mcp251xfd_osc>;
 103 -                       };
 104 -               };
 105 -       };
 106 -       fragment@4 {
 107 -               target = <&spidev1>;
 108 -               __overlay__ {
 109 -                       status = "disabled";
 110 -               };
 111 -       };
 112 -       fragment@5 {
 113 -               target = <&gpio>;
 114 -               __overlay__ {
 115 -                       mcp251xfd_pins_1: mcp251xfd_spi0_1_pins {
 116 -                               brcm,pins = <24>;
 117 -                               brcm,function = <BCM2835_FSEL_GPIO_IN>;
 118 -                       };
 119 -               };
 120 -       };
 121 -       fragment@6 {
 122 -               target-path = "/clocks";
 123 -               __overlay__ {
 124 -                       clk_mcp251xfd_osc_1: mcp251xfd-spi0-1-osc {
 125 -                               #clock-cells = <0>;
 126 -                               compatible = "fixed-clock";
 127 -                               clock-frequency = <40000000>;
 128 -                       };
 129 -               };
 130 -       };
 131 -       fragment@7 {
 132 -               target = <&spi0>;
 133 -               __overlay__ {
 134 -                       status = "okay";
 135 -                       #address-cells = <1>;
 136 -                       #size-cells = <0>;
 137 -                       mcp251xfd@1 {
 138 -                               compatible = "microchip,mcp251xfd";
 139 -                               reg = <1>;
 140 -                               pinctrl-names = "default";
 141 -                               pinctrl-0 = <&mcp251xfd_pins_1>;
 142 -                               spi-max-frequency = <20000000>;
 143 -                               interrupt-parent = <&gpio>;
 144 -                               interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
 145 -                               clocks = <&clk_mcp251xfd_osc_1>;
 146 -                       };
 147 -               };
 148 -       };
 149 -       fragment@8 {
 150 -               target = <&i2cbus>;
 151 -               __overlay__ {
 152 -                       #address-cells = <1>;
 153 -                       #size-cells = <0>;
 154 -                       pcf85063@51 {
 155 -                               compatible = "nxp,pcf85063";
 156 -                               reg = <0x51>;
 157 -                       };
 158 -               };
 159 -       };
 160 -       fragment@9 {
 161 -               target = <&i2c_arm>;
 162 -               i2cbus: __overlay__ {
 163 -                       status = "okay";
 164 -               };
 165 -       };
 166 -};
 167 --- /dev/null
 168 +++ b/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v2-overlay.dts
 169 @@ -0,0 +1,117 @@
 170 +// redo: ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi0-1,interrupt=24 i2c-rtc-overlay.dts,pcf85063
 171 +
 172 +// Device tree overlay for https://www.seeedstudio.com/CAN-BUS-FD-HAT-for-Raspberry-Pi-p-4742.html
 173 +
 174 +/dts-v1/;
 175 +/plugin/;
 176 +
 177 +#include <dt-bindings/gpio/gpio.h>
 178 +#include <dt-bindings/interrupt-controller/irq.h>
 179 +#include <dt-bindings/pinctrl/bcm2835.h>
 180 +
 181 +/ {
 182 +       compatible = "brcm,bcm2835";
 183 +       fragment@0 {
 184 +               target = <&spidev0>;
 185 +               __overlay__ {
 186 +                       status = "disabled";
 187 +               };
 188 +       };
 189 +       fragment@1 {
 190 +               target = <&gpio>;
 191 +               __overlay__ {
 192 +                       mcp251xfd_pins: mcp251xfd_spi0_0_pins {
 193 +                               brcm,pins = <25>;
 194 +                               brcm,function = <BCM2835_FSEL_GPIO_IN>;
 195 +                       };
 196 +               };
 197 +       };
 198 +       fragment@2 {
 199 +               target-path = "/clocks";
 200 +               __overlay__ {
 201 +                       clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
 202 +                               #clock-cells = <0>;
 203 +                               compatible = "fixed-clock";
 204 +                               clock-frequency = <40000000>;
 205 +                       };
 206 +               };
 207 +       };
 208 +       fragment@3 {
 209 +               target = <&spi0>;
 210 +               __overlay__ {
 211 +                       status = "okay";
 212 +                       #address-cells = <1>;
 213 +                       #size-cells = <0>;
 214 +                       mcp251xfd@0 {
 215 +                               compatible = "microchip,mcp251xfd";
 216 +                               reg = <0>;
 217 +                               pinctrl-names = "default";
 218 +                               pinctrl-0 = <&mcp251xfd_pins>;
 219 +                               spi-max-frequency = <20000000>;
 220 +                               interrupt-parent = <&gpio>;
 221 +                               interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
 222 +                               clocks = <&clk_mcp251xfd_osc>;
 223 +                       };
 224 +               };
 225 +       };
 226 +       fragment@4 {
 227 +               target = <&spidev1>;
 228 +               __overlay__ {
 229 +                       status = "disabled";
 230 +               };
 231 +       };
 232 +       fragment@5 {
 233 +               target = <&gpio>;
 234 +               __overlay__ {
 235 +                       mcp251xfd_pins_1: mcp251xfd_spi0_1_pins {
 236 +                               brcm,pins = <24>;
 237 +                               brcm,function = <BCM2835_FSEL_GPIO_IN>;
 238 +                       };
 239 +               };
 240 +       };
 241 +       fragment@6 {
 242 +               target-path = "/clocks";
 243 +               __overlay__ {
 244 +                       clk_mcp251xfd_osc_1: mcp251xfd-spi0-1-osc {
 245 +                               #clock-cells = <0>;
 246 +                               compatible = "fixed-clock";
 247 +                               clock-frequency = <40000000>;
 248 +                       };
 249 +               };
 250 +       };
 251 +       fragment@7 {
 252 +               target = <&spi0>;
 253 +               __overlay__ {
 254 +                       status = "okay";
 255 +                       #address-cells = <1>;
 256 +                       #size-cells = <0>;
 257 +                       mcp251xfd@1 {
 258 +                               compatible = "microchip,mcp251xfd";
 259 +                               reg = <1>;
 260 +                               pinctrl-names = "default";
 261 +                               pinctrl-0 = <&mcp251xfd_pins_1>;
 262 +                               spi-max-frequency = <20000000>;
 263 +                               interrupt-parent = <&gpio>;
 264 +                               interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
 265 +                               clocks = <&clk_mcp251xfd_osc_1>;
 266 +                       };
 267 +               };
 268 +       };
 269 +       fragment@8 {
 270 +               target = <&i2cbus>;
 271 +               __overlay__ {
 272 +                       #address-cells = <1>;
 273 +                       #size-cells = <0>;
 274 +                       pcf85063@51 {
 275 +                               compatible = "nxp,pcf85063";
 276 +                               reg = <0x51>;
 277 +                       };
 278 +               };
 279 +       };
 280 +       fragment@9 {
 281 +               target = <&i2c_arm>;
 282 +               i2cbus: __overlay__ {
 283 +                       status = "okay";
 284 +               };
 285 +       };
 286 +};