target/linux/bcm27xx/patches-5.4/950-0915-drm-vc4-Add-DRM_MODE_FLAG_DBLCLK-support-to-vc4-fkms.patch

   1 From 16349a9b271d331a496a482f46f41a3e1db56891 Mon Sep 17 00:00:00 2001
   2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
   3 Date: Thu, 16 Jul 2020 12:02:47 +0100
   4 Subject: [PATCH] drm/vc4: Add DRM_MODE_FLAG_DBLCLK support to
   5  vc4-fkms
   6
   7 480i and several other modes use DRM_MODE_FLAG_DBLCLK and pixel
   8 replication.
   9
  10 Add in flags for that so that FKMS can select CEA modes 6 & 7.
  11
  12 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
  13 ---
  14  drivers/gpu/drm/vc4/vc4_firmware_kms.c | 11 ++++++++++-
  15  1 file changed, 10 insertions(+), 1 deletion(-)
  16
  17 --- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c
  18 +++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c
  19 @@ -158,6 +158,8 @@ struct set_timings {
  20  #define TIMINGS_FLAGS_RGB_LIMITED      BIT(8)
  21  /* DVI monitor, therefore disable infoframes. Not set corresponds to HDMI. */
  22  #define TIMINGS_FLAGS_DVI              BIT(9)
  23 +/* Double clock */
  24 +#define TIMINGS_FLAGS_DBL_CLK          BIT(10)
  25  };
  26
  27  struct mailbox_set_mode {
  28 @@ -946,6 +948,8 @@ static void vc4_crtc_mode_set_nofb(struc
  29
  30         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  31                 mb.timings.flags |= TIMINGS_FLAGS_INTERLACE;
  32 +       if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  33 +               mb.timings.flags |= TIMINGS_FLAGS_DBL_CLK;
  34
  35         mb.timings.video_id_code = frame.avi.video_code;
  36
  37 @@ -1104,11 +1108,16 @@ vc4_crtc_mode_valid(struct drm_crtc *crt
  38          */
  39         if (fkms->bcm2711 &&
  40             (vc4_crtc->display_number == 2 || vc4_crtc->display_number == 7) &&
  41 +           !(mode->flags & DRM_MODE_FLAG_DBLCLK) &&
  42             ((mode->hdisplay |                          /* active */
  43               (mode->hsync_start - mode->hdisplay) |    /* front porch */
  44               (mode->hsync_end - mode->hsync_start) |   /* sync pulse */
  45 -             (mode->htotal - mode->hsync_end)) & 1))   /* back porch */
  46 +             (mode->htotal - mode->hsync_end)) & 1))   /* back porch */ {
  47 +               DRM_DEBUG_KMS("[CRTC:%d] Odd timing rejected %u %u %u %u.\n",
  48 +                             crtc->base.id, mode->hdisplay, mode->hsync_start,
  49 +                             mode->hsync_end, mode->htotal);
  50                 return MODE_H_ILLEGAL;
  51 +       }
  52
  53         return MODE_OK;
  54  }