firmware-utils: bump to git HEAD
[openwrt/staging/ldir.git] / target / linux / bcm27xx / patches-5.4 / 950-0928-overlays-Fix-sc16is75x-overlays-w.r.t.-serdev.patch
1 From a934bc7776953d7ce8e27c2d8720de58d5ceeeef Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.com>
3 Date: Thu, 30 Jul 2020 15:13:09 +0100
4 Subject: [PATCH] overlays: Fix sc16is75x overlays w.r.t. serdev
5
6 Enabling serdev support in rpi-5.4.y had the unintended consequence of
7 making any UART device node with a subnode look like a "serdev" node,
8 which prevents it from having the usual /dev/ttyXXX character device.
9 Solve the problem by moving the subnode (a static clock declaration)
10 into the root node.
11
12 At the same time, regularise (and sometimes correct) the overlays.
13
14 See: https://github.com/raspberrypi/linux/issues/3765
15
16 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
17 ---
18 .../dts/overlays/sc16is750-i2c-overlay.dts | 23 +++++++++-------
19 .../dts/overlays/sc16is752-i2c-overlay.dts | 27 ++++++++++---------
20 .../dts/overlays/sc16is752-spi0-overlay.dts | 21 +++++++++------
21 .../dts/overlays/sc16is752-spi1-overlay.dts | 6 ++---
22 4 files changed, 45 insertions(+), 32 deletions(-)
23
24 --- a/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
25 +++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts
26 @@ -13,26 +13,31 @@
27
28 sc16is750: sc16is750@48 {
29 compatible = "nxp,sc16is750";
30 - reg = <0x48>; /* address */
31 + reg = <0x48>; /* i2c address */
32 clocks = <&sc16is750_clk>;
33 interrupt-parent = <&gpio>;
34 interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
35 + gpio-controller;
36 #gpio-cells = <2>;
37 -
38 - sc16is750_clk: sc16is750_clk {
39 - compatible = "fixed-clock";
40 - #clock-cells = <0>;
41 - clock-frequency = <14745600>;
42 - };
43 + i2c-max-frequency = <400000>;
44 };
45 };
46 };
47
48 + fragment@1 {
49 + target-path = "/";
50 + __overlay__ {
51 + sc16is750_clk: sc16is750_i2c_clk@48 {
52 + compatible = "fixed-clock";
53 + #clock-cells = <0>;
54 + clock-frequency = <14745600>;
55 + };
56 + };
57 + };
58
59 __overrides__ {
60 int_pin = <&sc16is750>,"interrupts:0";
61 - addr = <&sc16is750>,"reg:0",<&sc16is750_clk>,"name";
62 + addr = <&sc16is750>,"reg:0", <&sc16is750_clk>,"name";
63 xtal = <&sc16is750_clk>,"clock-frequency:0";
64 };
65 -
66 };
67 --- a/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
68 +++ b/arch/arm/boot/dts/overlays/sc16is752-i2c-overlay.dts
69 @@ -5,29 +5,32 @@
70 compatible = "brcm,bcm2835";
71
72 fragment@0 {
73 - target = <&i2c1>;
74 -
75 - frag1: __overlay__ {
76 + target = <&i2c_arm>;
77 + __overlay__ {
78 #address-cells = <1>;
79 #size-cells = <0>;
80 status = "okay";
81
82 sc16is752: sc16is752@48 {
83 compatible = "nxp,sc16is752";
84 - reg = <0x48>; // i2c address
85 + reg = <0x48>; /* i2c address */
86 clocks = <&sc16is752_clk>;
87 interrupt-parent = <&gpio>;
88 - interrupts = <24 0x2>; /* IRQ_TYPE_EDGE_FALLING */
89 + interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
90 gpio-controller;
91 - #gpio-cells = <0>;
92 + #gpio-cells = <2>;
93 i2c-max-frequency = <400000>;
94 - status = "okay";
95 + };
96 + };
97 + };
98
99 - sc16is752_clk: sc16is752_clk {
100 - compatible = "fixed-clock";
101 - #clock-cells = <0>;
102 - clock-frequency = <14745600>;
103 - };
104 + fragment@1 {
105 + target-path = "/";
106 + __overlay__ {
107 + sc16is752_clk: sc16is752_i2c_clk@48 {
108 + compatible = "fixed-clock";
109 + #clock-cells = <0>;
110 + clock-frequency = <14745600>;
111 };
112 };
113 };
114 --- a/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts
115 +++ b/arch/arm/boot/dts/overlays/sc16is752-spi0-overlay.dts
116 @@ -17,15 +17,9 @@
117 clocks = <&sc16is752_clk>;
118 interrupt-parent = <&gpio>;
119 interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
120 - #gpio-controller;
121 + gpio-controller;
122 #gpio-cells = <2>;
123 spi-max-frequency = <4000000>;
124 -
125 - sc16is752_clk: sc16is752_clk {
126 - compatible = "fixed-clock";
127 - #clock-cells = <0>;
128 - clock-frequency = <14745600>;
129 - };
130 };
131 };
132 };
133 @@ -37,8 +31,19 @@
134 };
135 };
136
137 + fragment@2 {
138 + target-path = "/";
139 + __overlay__ {
140 + sc16is752_clk: sc16is752_spi0_0_clk {
141 + compatible = "fixed-clock";
142 + #clock-cells = <0>;
143 + clock-frequency = <14745600>;
144 + };
145 + };
146 + };
147 +
148 __overrides__ {
149 int_pin = <&sc16is752>,"interrupts:0";
150 - xtal = <&sc16is752_clk>, "clock-frequency:0";
151 + xtal = <&sc16is752_clk>,"clock-frequency:0";
152 };
153 };
154 --- a/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
155 +++ b/arch/arm/boot/dts/overlays/sc16is752-spi1-overlay.dts
156 @@ -21,7 +21,7 @@
157
158 fragment@1 {
159 target = <&spi1>;
160 - frag1: __overlay__ {
161 + __overlay__ {
162 #address-cells = <1>;
163 #size-cells = <0>;
164 pinctrl-names = "default";
165 @@ -35,7 +35,7 @@
166 clocks = <&sc16is752_clk>;
167 interrupt-parent = <&gpio>;
168 interrupts = <24 2>; /* IRQ_TYPE_EDGE_FALLING */
169 - #gpio-controller;
170 + gpio-controller;
171 #gpio-cells = <2>;
172 spi-max-frequency = <4000000>;
173 };
174 @@ -52,7 +52,7 @@
175 fragment@3 {
176 target-path = "/";
177 __overlay__ {
178 - sc16is752_clk: sc16is752_spi1_clk {
179 + sc16is752_clk: sc16is752_spi1_0_clk {
180 compatible = "fixed-clock";
181 #clock-cells = <0>;
182 clock-frequency = <14745600>;