bcm63xx: smp: add NAND support
[openwrt/staging/dedeckeh.git] / target / linux / bcm63xx / dts / bcm6368.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "brcm,bcm6368";
5
6 aliases {
7 nflash = &nflash;
8 pflash = &pflash;
9 pinctrl = &pinctrl;
10 serial0 = &uart0;
11 serial1 = &uart1;
12 spi0 = &lsspi;
13 };
14
15 cpus {
16 #address-cells = <1>;
17 #size-cells = <0>;
18
19 cpu@0 {
20 compatible = "brcm,bmips4350", "mips,mips4Kc";
21 device_type = "cpu";
22 reg = <0>;
23 };
24
25 cpu@1 {
26 compatible = "brcm,bmips4350", "mips,mips4Kc";
27 device_type = "cpu";
28 reg = <1>;
29 };
30 };
31
32 cpu_intc: interrupt-controller {
33 #address-cells = <0>;
34 compatible = "mti,cpu-interrupt-controller";
35
36 interrupt-controller;
37 #interrupt-cells = <1>;
38 };
39
40 memory { device_type = "memory"; reg = <0 0>; };
41
42 ubus@10000000 {
43 #address-cells = <1>;
44 #size-cells = <1>;
45 ranges;
46 compatible = "simple-bus";
47 interrupt-parent = <&periph_intc>;
48
49 ext_intc0: interrupt-controller@10000018 {
50 compatible = "brcm,bcm6345-ext-intc";
51 reg = <0x10000018 0x4>;
52
53 interrupt-controller;
54 #interrupt-cells = <2>;
55
56 interrupts = <20>, <21>, <22>, <23>;
57 };
58
59 ext_intc1: interrupt-controller@1000001c {
60 compatible = "brcm,bcm6345-ext-intc";
61 reg = <0x1000001c 0x4>;
62
63 interrupt-controller;
64 #interrupt-cells = <2>;
65
66 interrupts = <24>, <25>;
67 };
68
69 periph_intc: interrupt-controller@10000020 {
70 compatible = "brcm,bcm6345-l1-intc";
71 reg = <0x10000020 0x10>,
72 <0x10000030 0x10>;
73
74 interrupt-controller;
75 #interrupt-cells = <1>;
76
77 interrupt-parent = <&cpu_intc>;
78 interrupts = <2>, <3>;
79 };
80
81 pinctrl: pin-controller@10000080 {
82 compatible = "brcm,bcm6368-pinctrl";
83 reg = <0x10000080 0x8>,
84 <0x10000088 0x8>,
85 <0x10000098 0x4>;
86 reg-names = "dirout", "dat", "mode";
87 brcm,gpiobasemode = <&gpiobasemode>;
88
89 gpio-controller;
90 #gpio-cells = <2>;
91
92 interrupts-extended = <&ext_intc1 0 0>,
93 <&ext_intc1 1 0>,
94 <&ext_intc0 0 0>,
95 <&ext_intc0 1 0>,
96 <&ext_intc0 2 0>,
97 <&ext_intc0 3 0>;
98 interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35",
99 "gpio36", "gpio37";
100
101 pinctrl_analog_afe_0: analog_afe_0 {
102 function = "analog_afe_0";
103 pins = "gpio0";
104 };
105
106 pinctrl_analog_afe_1: analog_afe_1 {
107 function = "analog_afe_1";
108 pins = "gpio1";
109 };
110
111 pinctrl_sys_irq: sys_irq {
112 function = "sys_irq";
113 pins = "gpio2";
114 };
115
116 pinctrl_serial_led: serial_led {
117 pinctrl_serial_led_data: serial_led_data {
118 function = "serial_led_data";
119 pins = "gpio3";
120 };
121
122 pinctrl_serial_led_clk: serial_led_clk {
123 function = "serial_led_clk";
124 pins = "gpio4";
125 };
126 };
127
128 pinctrl_inet_led: inet_led {
129 function = "inet_led";
130 pins = "gpio5";
131 };
132
133 pinctrl_ephy0_led: ephy0_led {
134 function = "ephy0_led";
135 pins = "gpio6";
136 };
137
138 pinctrl_ephy1_led: ephy1_led {
139 function = "ephy1_led";
140 pins = "gpio7";
141 };
142
143 pinctrl_ephy2_led: ephy2_led {
144 function = "ephy2_led";
145 pins = "gpio8";
146 };
147
148 pinctrl_ephy3_led: ephy3_led {
149 function = "ephy3_led";
150 pins = "gpio9";
151 };
152
153 pinctrl_robosw_led_data: robosw_led_data {
154 function = "robosw_led_data";
155 pins = "gpio10";
156 };
157
158 pinctrl_robosw_led_clk: robosw_led_clk {
159 function = "robosw_led_clk";
160 pins = "gpio11";
161 };
162
163 pinctrl_robosw_led0: robosw_led0 {
164 function = "robosw_led0";
165 pins = "gpio12";
166 };
167
168 pinctrl_robosw_led1: robosw_led1 {
169 function = "robosw_led1";
170 pins = "gpio13";
171 };
172
173 pinctrl_usb_device_led: usb_device_led {
174 function = "usb_device_led";
175 pins = "gpio14";
176 };
177
178 pinctrl_pci: pci {
179 pinctrl_pci_req1: pci_req1 {
180 function = "pci_req1";
181 pins = "gpio16";
182 };
183
184 pinctrl_pci_gnt1: pci_gnt1 {
185 function = "pci_gnt1";
186 pins = "gpio17";
187 };
188
189 pinctrl_pci_intb: pci_intb {
190 function = "pci_intb";
191 pins = "gpio18";
192 };
193
194 pinctrl_pci_req0: pci_req0 {
195 function = "pci_req0";
196 pins = "gpio19";
197 };
198
199 pinctrl_pci_gnt0: pci_gnt0 {
200 function = "pci_gnt0";
201 pins = "gpio20";
202 };
203 };
204
205 pinctrl_pcmcia: pcmcia {
206 pinctrl_pcmcia_cd1: pcmcia_cd1 {
207 function = "pcmcia_cd1";
208 pins = "gpio22";
209 };
210
211 pinctrl_pcmcia_cd2: pcmcia_cd2 {
212 function = "pcmcia_cd2";
213 pins = "gpio23";
214 };
215
216 pinctrl_pcmcia_vs1: pcmcia_vs1 {
217 function = "pcmcia_vs1";
218 pins = "gpio24";
219 };
220
221 pinctrl_pcmcia_vs2: pcmcia_vs2 {
222 function = "pcmcia_vs2";
223 pins = "gpio25";
224 };
225 };
226
227 pinctrl_ebi_cs2: ebi_cs2 {
228 function = "ebi_cs2";
229 pins = "gpio26";
230 };
231
232 pinctrl_ebi_cs3: ebi_cs3 {
233 function = "ebi_cs2";
234 pins = "gpio27";
235 };
236
237 pinctrl_spi_cs2: spi_cs2 {
238 function = "spi_cs2";
239 pins = "gpio28";
240 };
241
242 pinctrl_spi_cs3: spi_cs3 {
243 function = "spi_cs3";
244 pins = "gpio29";
245 };
246
247 pinctrl_spi_cs4: spi_cs4 {
248 function = "spi_cs4";
249 pins = "gpio30";
250 };
251
252 pinctrl_spi_cs5: spi_cs5 {
253 function = "spi_cs5";
254 pins = "gpio31";
255 };
256
257 pinctrl_uart1: uart1 {
258 function = "uart1";
259 group = "uart1_grp";
260 };
261 };
262
263 gpiobasemode: gpiobasemode@100000b8 {
264 compatible = "brcm,bcm6368-gpiobasemode", "syscon";
265 reg = <0x100000b8 0x4>;
266 };
267
268 leds: led-controller@100000d0 {
269 #address-cells = <1>;
270 #size-cells = <0>;
271 compatible = "brcm,bcm6358-leds";
272 reg = <0x100000d0 0x8>;
273 status = "disabled";
274 };
275
276 uart0: serial@10000100 {
277 compatible = "brcm,bcm6345-uart";
278 reg = <0x10000100 0x18>;
279
280 interrupt-parent = <&periph_intc>;
281 interrupts = <2>;
282
283 /* clocks = <&periph_clk>; */
284 /* clock-names = "refclk"; */
285
286 status = "disabled";
287 };
288
289 uart1: serial@10000120 {
290 compatible = "brcm,bcm6345-uart";
291 reg = <0x10000120 0x18>;
292
293 interrupt-parent = <&periph_intc>;
294 interrupts = <3>;
295
296 /* clocks = <&periph_clk>; */
297 /* clock-names = "refclk"; */
298
299 status = "disabled";
300 };
301
302 nflash: nand@10000200 {
303 #address-cells = <1>;
304 #size-cells = <0>;
305 compatible = "brcm,nand-bcm6368",
306 "brcm,brcmnand-v2.1",
307 "brcm,brcmnand";
308 reg = <0x10000200 0x180>,
309 <0x10000600 0x200>,
310 <0x10000070 0x10>;
311 reg-names = "nand",
312 "nand-cache",
313 "nand-int-base";
314
315 interrupt-parent = <&periph_intc>;
316 interrupts = <10>;
317
318 /* clocks = <&clkctl 17>; */
319
320 status = "disabled";
321 };
322
323 lsspi: spi@10000800 {
324 #address-cells = <1>;
325 #size-cells = <0>;
326 compatible = "brcm,bcm6358-spi";
327 reg = <0x10000800 0x70c>;
328 interrupts = <1>;
329 /* clocks = <&clkctl 9>; */
330 };
331 };
332
333 pflash: nor@18000000 {
334 compatible = "cfi-flash";
335 reg = <0x18000000 0x2000000>;
336 bank-width = <2>;
337 #address-cells = <1>;
338 #size-cells = <1>;
339 status = "disabled";
340 };
341 };