bmips: add new target
[openwrt/staging/ldir.git] / target / linux / bmips / dts / bcm6362.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6362-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6362-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm6362-reset.h>
10 #include <dt-bindings/soc/bcm6362-pm.h>
11
12 / {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "brcm,bcm6362";
16
17 aliases {
18 nflash = &nflash;
19 pinctrl = &pinctrl;
20 serial0 = &uart0;
21 serial1 = &uart1;
22 spi0 = &lsspi;
23 spi1 = &hsspi;
24 };
25
26 chosen {
27 bootargs = "console=ttyS0,115200n8 earlycon";
28 stdout-path = "serial0:115200n8";
29 };
30
31 clocks {
32 periph_osc: periph-osc {
33 compatible = "fixed-clock";
34
35 #clock-cells = <0>;
36
37 clock-frequency = <50000000>;
38 clock-output-names = "periph";
39 };
40
41 hsspi_osc: hsspi-osc {
42 compatible = "fixed-clock";
43
44 #clock-cells = <0>;
45
46 clock-frequency = <400000000>;
47 clock-output-names = "hsspi_osc";
48 };
49 };
50
51 cpus {
52 #address-cells = <1>;
53 #size-cells = <0>;
54 mips-hpt-frequency = <200000000>;
55
56 cpu@0 {
57 compatible = "brcm,bmips4350", "mips,mips4Kc";
58 device_type = "cpu";
59 reg = <0>;
60 };
61
62 cpu@1 {
63 compatible = "brcm,bmips4350", "mips,mips4Kc";
64 device_type = "cpu";
65 reg = <1>;
66 };
67 };
68
69 cpu_intc: interrupt-controller {
70 #address-cells = <0>;
71 compatible = "mti,cpu-interrupt-controller";
72
73 interrupt-controller;
74 #interrupt-cells = <1>;
75 };
76
77 memory@0 {
78 device_type = "memory";
79 reg = <0 0>;
80 };
81
82 ubus {
83 #address-cells = <1>;
84 #size-cells = <1>;
85
86 compatible = "simple-bus";
87 ranges;
88
89 periph_clk: clock-controller@10000004 {
90 compatible = "brcm,bcm6362-clocks";
91 reg = <0x10000004 0x4>;
92 #clock-cells = <1>;
93 };
94
95 pll_cntl: syscon@10000008 {
96 compatible = "syscon";
97 reg = <0x10000008 0x4>;
98 native-endian;
99 };
100
101 syscon-reboot {
102 compatible = "syscon-reboot";
103 regmap = <&pll_cntl>;
104 offset = <0x0>;
105 mask = <0x1>;
106 };
107
108 periph_rst: reset-controller@10000010 {
109 compatible = "brcm,bcm6345-reset";
110 reg = <0x10000010 0x4>;
111 #reset-cells = <1>;
112 };
113
114 ext_intc: interrupt-controller@10000018 {
115 #address-cells = <1>;
116 compatible = "brcm,bcm6345-ext-intc";
117 reg = <0x10000018 0x4>;
118
119 interrupt-controller;
120 #interrupt-cells = <2>;
121
122 interrupts = <BCM6362_IRQ_EXT0>,
123 <BCM6362_IRQ_EXT1>,
124 <BCM6362_IRQ_EXT2>,
125 <BCM6362_IRQ_EXT3>;
126 };
127
128 periph_intc: interrupt-controller@10000020 {
129 #address-cells = <1>;
130 compatible = "brcm,bcm6345-l1-intc";
131 reg = <0x10000020 0x10>,
132 <0x10000030 0x10>;
133
134 interrupt-controller;
135 #interrupt-cells = <1>;
136
137 interrupt-parent = <&cpu_intc>;
138 interrupts = <2>, <3>;
139 };
140
141 wdt: watchdog@1000005c {
142 compatible = "brcm,bcm7038-wdt";
143 reg = <0x1000005c 0xc>;
144
145 clocks = <&periph_osc>;
146
147 timeout-sec = <30>;
148 };
149
150 pinctrl: pin-controller@10000080 {
151 compatible = "brcm,bcm6362-pinctrl";
152 reg = <0x10000080 0x8>,
153 <0x10000088 0x8>,
154 <0x10000090 0x4>,
155 <0x10000098 0x4>,
156 <0x1000009c 0x4>,
157 <0x100000b8 0x4>;
158 reg-names = "dirout", "dat", "led",
159 "mode", "ctrl", "basemode";
160
161 gpio-controller;
162 #gpio-cells = <2>;
163
164 interrupt-parent = <&ext_intc>;
165 interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
166 interrupt-names = "gpio24", "gpio25",
167 "gpio26", "gpio27";
168
169 pinctrl_usb_device_led: usb_device_led {
170 function = "usb_device_led";
171 pins = "gpio0";
172 };
173
174 pinctrl_sys_irq: sys_irq {
175 function = "sys_irq";
176 pins = "gpio1";
177 };
178
179 pinctrl_serial_led: serial_led {
180 pinctrl_serial_led_clk: serial_led_clk {
181 function = "serial_led_clk";
182 pins = "gpio2";
183 };
184
185 pinctrl_serial_led_data: serial_led_data {
186 function = "serial_led_data";
187 pins = "gpio3";
188 };
189 };
190
191 pinctrl_robosw_led_data: robosw_led_data {
192 function = "robosw_led_data";
193 pins = "gpio4";
194 };
195
196 pinctrl_robosw_led_clk: robosw_led_clk {
197 function = "robosw_led_clk";
198 pins = "gpio5";
199 };
200
201 pinctrl_robosw_led0: robosw_led0 {
202 function = "robosw_led0";
203 pins = "gpio6";
204 };
205
206 pinctrl_robosw_led1: robosw_led1 {
207 function = "robosw_led1";
208 pins = "gpio7";
209 };
210
211 pinctrl_inet_led: inet_led {
212 function = "inet_led";
213 pins = "gpio8";
214 };
215
216 pinctrl_spi_cs2: spi_cs2 {
217 function = "spi_cs2";
218 pins = "gpio9";
219 };
220
221 pinctrl_spi_cs3: spi_cs3 {
222 function = "spi_cs3";
223 pins = "gpio10";
224 };
225
226 pinctrl_ntr_pulse: ntr_pulse {
227 function = "ntr_pulse";
228 pins = "gpio11";
229 };
230
231 pinctrl_uart1_scts: uart1_scts {
232 function = "uart1_scts";
233 pins = "gpio12";
234 };
235
236 pinctrl_uart1_srts: uart1_srts {
237 function = "uart1_srts";
238 pins = "gpio13";
239 };
240
241 pinctrl_uart1: uart1 {
242 pinctrl_uart1_sdin: uart1_sdin {
243 function = "uart1_sdin";
244 pins = "gpio14";
245 };
246
247 pinctrl_uart1_sdout: uart1_sdout {
248 function = "uart1_sdout";
249 pins = "gpio15";
250 };
251 };
252
253 pinctrl_adsl_spi: adsl_spi {
254 pinctrl_adsl_spi_miso: adsl_spi_miso {
255 function = "adsl_spi_miso";
256 pins = "gpio16";
257 };
258
259 pinctrl_adsl_spi_mosi: adsl_spi_mosi {
260 function = "adsl_spi_mosi";
261 pins = "gpio17";
262 };
263
264 pinctrl_adsl_spi_clk: adsl_spi_clk {
265 function = "adsl_spi_clk";
266 pins = "gpio18";
267 };
268
269 pinctrl_adsl_spi_cs: adsl_spi_cs {
270 function = "adsl_spi_cs";
271 pins = "gpio19";
272 };
273 };
274
275 pinctrl_ephy0_led: ephy0_led {
276 function = "ephy0_led";
277 pins = "gpio20";
278 };
279
280 pinctrl_ephy1_led: ephy1_led {
281 function = "ephy1_led";
282 pins = "gpio21";
283 };
284
285 pinctrl_ephy2_led: ephy2_led {
286 function = "ephy2_led";
287 pins = "gpio22";
288 };
289
290 pinctrl_ephy3_led: ephy3_led {
291 function = "ephy3_led";
292 pins = "gpio23";
293 };
294
295 pinctrl_ext_irq0: ext_irq0 {
296 function = "ext_irq0";
297 pins = "gpio24";
298 };
299
300 pinctrl_ext_irq1: ext_irq1 {
301 function = "ext_irq1";
302 pins = "gpio25";
303 };
304
305 pinctrl_ext_irq2: ext_irq2 {
306 function = "ext_irq2";
307 pins = "gpio26";
308 };
309
310 pinctrl_ext_irq3: ext_irq3 {
311 function = "ext_irq3";
312 pins = "gpio27";
313 };
314
315 pinctrl_nand: nand {
316 function = "nand";
317 group = "nand_grp";
318 };
319 };
320
321 uart0: serial@10000100 {
322 compatible = "brcm,bcm6345-uart";
323 reg = <0x10000100 0x18>;
324
325 interrupt-parent = <&periph_intc>;
326 interrupts = <BCM6362_IRQ_UART0>;
327
328 clocks = <&periph_osc>;
329 clock-names = "periph";
330
331 status = "disabled";
332 };
333
334 uart1: serial@10000120 {
335 compatible = "brcm,bcm6345-uart";
336 reg = <0x10000120 0x18>;
337
338 interrupt-parent = <&periph_intc>;
339 interrupts = <BCM6362_IRQ_UART1>;
340
341 clocks = <&periph_osc>;
342 clock-names = "periph";
343
344 status = "disabled";
345 };
346
347 nflash: nand@10000200 {
348 #address-cells = <1>;
349 #size-cells = <0>;
350 compatible = "brcm,nand-bcm6368",
351 "brcm,brcmnand-v2.2",
352 "brcm,brcmnand";
353 reg = <0x10000200 0x180>,
354 <0x10000600 0x200>,
355 <0x10000070 0x10>;
356 reg-names = "nand",
357 "nand-cache",
358 "nand-int-base";
359
360 interrupt-parent = <&periph_intc>;
361 interrupts = <BCM6362_IRQ_NAND>;
362
363 clocks = <&periph_clk BCM6362_CLK_NAND>;
364 clock-names = "nand";
365
366 pinctrl-names = "default";
367 pinctrl-0 = <&pinctrl_nand>;
368
369 status = "disabled";
370 };
371
372 lsspi: spi@10000800 {
373 compatible = "brcm,bcm6358-spi";
374 reg = <0x10000800 0x70c>;
375 #address-cells = <1>;
376 #size-cells = <0>;
377
378 interrupt-parent = <&periph_intc>;
379 interrupts = <BCM6362_IRQ_LSSPI>;
380
381 clocks = <&periph_clk BCM6362_CLK_SPI>;
382 clock-names = "spi";
383
384 resets = <&periph_rst BCM6362_RST_SPI>;
385
386 status = "disabled";
387 };
388
389 hsspi: spi@10001000 {
390 compatible = "brcm,bcm6328-hsspi";
391 reg = <0x10001000 0x600>;
392 #address-cells = <1>;
393 #size-cells = <0>;
394
395 interrupt-parent = <&periph_intc>;
396 interrupts = <BCM6362_IRQ_HSSPI>;
397
398 clocks = <&periph_clk BCM6362_CLK_HSSPI>,
399 <&hsspi_osc>;
400 clock-names = "hsspi",
401 "pll";
402
403 resets = <&periph_rst BCM6362_RST_SPI>;
404
405 status = "disabled";
406 };
407
408 periph_pwr: power-controller@10001848 {
409 compatible = "brcm,bcm6362-power-controller";
410 reg = <0x10001848 0x4>;
411 #power-domain-cells = <1>;
412 };
413
414 leds: led-controller@10001900 {
415 #address-cells = <1>;
416 #size-cells = <0>;
417 compatible = "brcm,bcm6328-leds";
418 reg = <0x10001900 0x24>;
419
420 status = "disabled";
421 };
422
423 ehci: usb@10002500 {
424 compatible = "brcm,bcm6362-ehci", "generic-ehci";
425 reg = <0x10002500 0x100>;
426 big-endian;
427 ignore-oc;
428
429 interrupt-parent = <&periph_intc>;
430 interrupts = <BCM6362_IRQ_EHCI>;
431
432 phys = <&usbh 0>;
433 phy-names = "usb";
434
435 status = "disabled";
436 };
437
438 ohci: usb@10002600 {
439 compatible = "brcm,bcm6362-ohci", "generic-ohci";
440 reg = <0x10002600 0x100>;
441 big-endian;
442 no-big-frame-no;
443
444 interrupt-parent = <&periph_intc>;
445 interrupts = <BCM6362_IRQ_OHCI>;
446
447 phys = <&usbh 0>;
448 phy-names = "usb";
449
450 status = "disabled";
451 };
452
453 usbh: usb-phy@10002700 {
454 compatible = "brcm,bcm6362-usbh-phy";
455 reg = <0x10002700 0x38>;
456
457 #phy-cells = <1>;
458
459 clocks = <&periph_clk BCM6362_CLK_USBH>;
460 clock-names = "usbh";
461
462 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>;
463 resets = <&periph_rst BCM6362_RST_USBH>;
464
465 status = "disabled";
466 };
467 };
468 };