d531ed4fe58ec2ba71c9957df0566e5a40ab1100
[openwrt/staging/ldir.git] / target / linux / bmips / dts / bcm6362.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6362-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6362-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm6362-reset.h>
10 #include <dt-bindings/soc/bcm6362-pm.h>
11
12 / {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "brcm,bcm6362";
16
17 aliases {
18 nflash = &nflash;
19 pinctrl = &pinctrl;
20 serial0 = &uart0;
21 serial1 = &uart1;
22 spi0 = &lsspi;
23 spi1 = &hsspi;
24 };
25
26 chosen {
27 bootargs = "console=ttyS0,115200n8 earlycon";
28 stdout-path = "serial0:115200n8";
29 };
30
31 clocks {
32 periph_osc: periph-osc {
33 compatible = "fixed-clock";
34
35 #clock-cells = <0>;
36
37 clock-frequency = <50000000>;
38 clock-output-names = "periph";
39 };
40
41 hsspi_osc: hsspi-osc {
42 compatible = "fixed-clock";
43
44 #clock-cells = <0>;
45
46 clock-frequency = <400000000>;
47 clock-output-names = "hsspi_osc";
48 };
49 };
50
51 cpus {
52 #address-cells = <1>;
53 #size-cells = <0>;
54 mips-hpt-frequency = <200000000>;
55
56 cpu@0 {
57 compatible = "brcm,bmips4350", "mips,mips4Kc";
58 device_type = "cpu";
59 reg = <0>;
60 };
61
62 cpu@1 {
63 compatible = "brcm,bmips4350", "mips,mips4Kc";
64 device_type = "cpu";
65 reg = <1>;
66 };
67 };
68
69 cpu_intc: interrupt-controller {
70 #address-cells = <0>;
71 compatible = "mti,cpu-interrupt-controller";
72
73 interrupt-controller;
74 #interrupt-cells = <1>;
75 };
76
77 memory@0 {
78 device_type = "memory";
79 reg = <0 0>;
80 };
81
82 ubus {
83 #address-cells = <1>;
84 #size-cells = <1>;
85
86 compatible = "simple-bus";
87 ranges;
88
89 periph_clk: clock-controller@10000004 {
90 compatible = "brcm,bcm6362-clocks";
91 reg = <0x10000004 0x4>;
92 #clock-cells = <1>;
93 };
94
95 pll_cntl: syscon@10000008 {
96 compatible = "syscon";
97 reg = <0x10000008 0x4>;
98 native-endian;
99 };
100
101 syscon-reboot {
102 compatible = "syscon-reboot";
103 regmap = <&pll_cntl>;
104 offset = <0x0>;
105 mask = <0x1>;
106 };
107
108 periph_rst: reset-controller@10000010 {
109 compatible = "brcm,bcm6345-reset";
110 reg = <0x10000010 0x4>;
111 #reset-cells = <1>;
112 };
113
114 ext_intc: interrupt-controller@10000018 {
115 #address-cells = <1>;
116 compatible = "brcm,bcm6345-ext-intc";
117 reg = <0x10000018 0x4>;
118
119 interrupt-controller;
120 #interrupt-cells = <2>;
121
122 interrupts = <BCM6362_IRQ_EXT0>,
123 <BCM6362_IRQ_EXT1>,
124 <BCM6362_IRQ_EXT2>,
125 <BCM6362_IRQ_EXT3>;
126 };
127
128 periph_intc: interrupt-controller@10000020 {
129 #address-cells = <1>;
130 compatible = "brcm,bcm6345-l1-intc";
131 reg = <0x10000020 0x10>,
132 <0x10000030 0x10>;
133
134 interrupt-controller;
135 #interrupt-cells = <1>;
136
137 interrupt-parent = <&cpu_intc>;
138 interrupts = <2>, <3>;
139 };
140
141 wdt: watchdog@1000005c {
142 compatible = "brcm,bcm7038-wdt";
143 reg = <0x1000005c 0xc>;
144
145 clocks = <&periph_osc>;
146
147 timeout-sec = <30>;
148 };
149
150 gpio: syscon@10000080 {
151 compatible = "syscon", "simple-mfd";
152 reg = <0x10000080 0x80>;
153 native-endian;
154
155 pinctrl: pin-controller {
156 compatible = "brcm,bcm6362-pinctrl";
157
158 gpio-controller;
159 #gpio-cells = <2>;
160
161 interrupts-extended = <&ext_intc 0 0>,
162 <&ext_intc 1 0>,
163 <&ext_intc 2 0>,
164 <&ext_intc 3 0>;
165 interrupt-names = "gpio24",
166 "gpio25",
167 "gpio26",
168 "gpio27";
169
170 pinctrl_usb_device_led: usb_device_led {
171 function = "usb_device_led";
172 pins = "gpio0";
173 };
174
175 pinctrl_sys_irq: sys_irq {
176 function = "sys_irq";
177 pins = "gpio1";
178 };
179
180 pinctrl_serial_led: serial_led {
181 pinctrl_serial_led_clk: serial_led_clk {
182 function = "serial_led_clk";
183 pins = "gpio2";
184 };
185
186 pinctrl_serial_led_data: serial_led_data {
187 function = "serial_led_data";
188 pins = "gpio3";
189 };
190 };
191
192 pinctrl_robosw_led_data: robosw_led_data {
193 function = "robosw_led_data";
194 pins = "gpio4";
195 };
196
197 pinctrl_robosw_led_clk: robosw_led_clk {
198 function = "robosw_led_clk";
199 pins = "gpio5";
200 };
201
202 pinctrl_robosw_led0: robosw_led0 {
203 function = "robosw_led0";
204 pins = "gpio6";
205 };
206
207 pinctrl_robosw_led1: robosw_led1 {
208 function = "robosw_led1";
209 pins = "gpio7";
210 };
211
212 pinctrl_inet_led: inet_led {
213 function = "inet_led";
214 pins = "gpio8";
215 };
216
217 pinctrl_spi_cs2: spi_cs2 {
218 function = "spi_cs2";
219 pins = "gpio9";
220 };
221
222 pinctrl_spi_cs3: spi_cs3 {
223 function = "spi_cs3";
224 pins = "gpio10";
225 };
226
227 pinctrl_ntr_pulse: ntr_pulse {
228 function = "ntr_pulse";
229 pins = "gpio11";
230 };
231
232 pinctrl_uart1_scts: uart1_scts {
233 function = "uart1_scts";
234 pins = "gpio12";
235 };
236
237 pinctrl_uart1_srts: uart1_srts {
238 function = "uart1_srts";
239 pins = "gpio13";
240 };
241
242 pinctrl_uart1: uart1 {
243 pinctrl_uart1_sdin: uart1_sdin {
244 function = "uart1_sdin";
245 pins = "gpio14";
246 };
247
248 pinctrl_uart1_sdout: uart1_sdout {
249 function = "uart1_sdout";
250 pins = "gpio15";
251 };
252 };
253
254 pinctrl_adsl_spi: adsl_spi {
255 pinctrl_adsl_spi_miso: adsl_spi_miso {
256 function = "adsl_spi_miso";
257 pins = "gpio16";
258 };
259
260 pinctrl_adsl_spi_mosi: adsl_spi_mosi {
261 function = "adsl_spi_mosi";
262 pins = "gpio17";
263 };
264
265 pinctrl_adsl_spi_clk: adsl_spi_clk {
266 function = "adsl_spi_clk";
267 pins = "gpio18";
268 };
269
270 pinctrl_adsl_spi_cs: adsl_spi_cs {
271 function = "adsl_spi_cs";
272 pins = "gpio19";
273 };
274 };
275
276 pinctrl_ephy0_led: ephy0_led {
277 function = "ephy0_led";
278 pins = "gpio20";
279 };
280
281 pinctrl_ephy1_led: ephy1_led {
282 function = "ephy1_led";
283 pins = "gpio21";
284 };
285
286 pinctrl_ephy2_led: ephy2_led {
287 function = "ephy2_led";
288 pins = "gpio22";
289 };
290
291 pinctrl_ephy3_led: ephy3_led {
292 function = "ephy3_led";
293 pins = "gpio23";
294 };
295
296 pinctrl_ext_irq0: ext_irq0 {
297 function = "ext_irq0";
298 pins = "gpio24";
299 };
300
301 pinctrl_ext_irq1: ext_irq1 {
302 function = "ext_irq1";
303 pins = "gpio25";
304 };
305
306 pinctrl_ext_irq2: ext_irq2 {
307 function = "ext_irq2";
308 pins = "gpio26";
309 };
310
311 pinctrl_ext_irq3: ext_irq3 {
312 function = "ext_irq3";
313 pins = "gpio27";
314 };
315
316 pinctrl_nand: nand {
317 function = "nand";
318 group = "nand_grp";
319 };
320 };
321 };
322
323 uart0: serial@10000100 {
324 compatible = "brcm,bcm6345-uart";
325 reg = <0x10000100 0x18>;
326
327 interrupt-parent = <&periph_intc>;
328 interrupts = <BCM6362_IRQ_UART0>;
329
330 clocks = <&periph_osc>;
331 clock-names = "periph";
332
333 status = "disabled";
334 };
335
336 uart1: serial@10000120 {
337 compatible = "brcm,bcm6345-uart";
338 reg = <0x10000120 0x18>;
339
340 interrupt-parent = <&periph_intc>;
341 interrupts = <BCM6362_IRQ_UART1>;
342
343 clocks = <&periph_osc>;
344 clock-names = "periph";
345
346 status = "disabled";
347 };
348
349 nflash: nand@10000200 {
350 #address-cells = <1>;
351 #size-cells = <0>;
352 compatible = "brcm,nand-bcm6368",
353 "brcm,brcmnand-v2.2",
354 "brcm,brcmnand";
355 reg = <0x10000200 0x180>,
356 <0x10000600 0x200>,
357 <0x10000070 0x10>;
358 reg-names = "nand",
359 "nand-cache",
360 "nand-int-base";
361
362 interrupt-parent = <&periph_intc>;
363 interrupts = <BCM6362_IRQ_NAND>;
364
365 clocks = <&periph_clk BCM6362_CLK_NAND>;
366 clock-names = "nand";
367
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_nand>;
370
371 status = "disabled";
372 };
373
374 lsspi: spi@10000800 {
375 compatible = "brcm,bcm6358-spi";
376 reg = <0x10000800 0x70c>;
377 #address-cells = <1>;
378 #size-cells = <0>;
379
380 interrupt-parent = <&periph_intc>;
381 interrupts = <BCM6362_IRQ_LSSPI>;
382
383 clocks = <&periph_clk BCM6362_CLK_SPI>;
384 clock-names = "spi";
385
386 resets = <&periph_rst BCM6362_RST_SPI>;
387
388 status = "disabled";
389 };
390
391 hsspi: spi@10001000 {
392 compatible = "brcm,bcm6328-hsspi";
393 reg = <0x10001000 0x600>;
394 #address-cells = <1>;
395 #size-cells = <0>;
396
397 interrupt-parent = <&periph_intc>;
398 interrupts = <BCM6362_IRQ_HSSPI>;
399
400 clocks = <&periph_clk BCM6362_CLK_HSSPI>,
401 <&hsspi_osc>;
402 clock-names = "hsspi",
403 "pll";
404
405 resets = <&periph_rst BCM6362_RST_SPI>;
406
407 status = "disabled";
408 };
409
410 periph_pwr: power-controller@10001848 {
411 compatible = "brcm,bcm6362-power-controller";
412 reg = <0x10001848 0x4>;
413 #power-domain-cells = <1>;
414 };
415
416 leds: led-controller@10001900 {
417 #address-cells = <1>;
418 #size-cells = <0>;
419 compatible = "brcm,bcm6328-leds";
420 reg = <0x10001900 0x24>;
421
422 status = "disabled";
423 };
424
425 ehci: usb@10002500 {
426 compatible = "brcm,bcm6362-ehci", "generic-ehci";
427 reg = <0x10002500 0x100>;
428 big-endian;
429 ignore-oc;
430
431 interrupt-parent = <&periph_intc>;
432 interrupts = <BCM6362_IRQ_EHCI>;
433
434 phys = <&usbh 0>;
435 phy-names = "usb";
436
437 status = "disabled";
438 };
439
440 ohci: usb@10002600 {
441 compatible = "brcm,bcm6362-ohci", "generic-ohci";
442 reg = <0x10002600 0x100>;
443 big-endian;
444 no-big-frame-no;
445
446 interrupt-parent = <&periph_intc>;
447 interrupts = <BCM6362_IRQ_OHCI>;
448
449 phys = <&usbh 0>;
450 phy-names = "usb";
451
452 status = "disabled";
453 };
454
455 usbh: usb-phy@10002700 {
456 compatible = "brcm,bcm6362-usbh-phy";
457 reg = <0x10002700 0x38>;
458
459 #phy-cells = <1>;
460
461 clocks = <&periph_clk BCM6362_CLK_USBH>;
462 clock-names = "usbh";
463
464 power-domains = <&periph_pwr BCM6362_POWER_DOMAIN_USBH>;
465 resets = <&periph_rst BCM6362_RST_USBH>;
466
467 status = "disabled";
468 };
469 };
470 };