0b434c5c013141912b239bf307be97514ab6a573
[openwrt/staging/ldir.git] / target / linux / bmips / dts / bcm6368.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6368-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6368-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm6368-reset.h>
10
11 / {
12 #address-cells = <1>;
13 #size-cells = <1>;
14 compatible = "brcm,bcm6368";
15
16 aliases {
17 nflash = &nflash;
18 pflash = &pflash;
19 pinctrl = &pinctrl;
20 serial0 = &uart0;
21 serial1 = &uart1;
22 spi0 = &lsspi;
23 };
24
25 chosen {
26 bootargs = "console=ttyS0,115200n8 earlycon";
27 stdout-path = "serial0:115200n8";
28 };
29
30 clocks {
31 periph_osc: periph-osc {
32 compatible = "fixed-clock";
33
34 #clock-cells = <0>;
35
36 clock-frequency = <50000000>;
37 clock-output-names = "periph";
38 };
39 };
40
41 cpus {
42 #address-cells = <1>;
43 #size-cells = <0>;
44 mips-hpt-frequency = <200000000>;
45
46 cpu@0 {
47 compatible = "brcm,bmips4350", "mips,mips4Kc";
48 device_type = "cpu";
49 reg = <0>;
50 };
51
52 cpu@1 {
53 compatible = "brcm,bmips4350", "mips,mips4Kc";
54 device_type = "cpu";
55 reg = <1>;
56 };
57 };
58
59 cpu_intc: interrupt-controller {
60 #address-cells = <0>;
61 compatible = "mti,cpu-interrupt-controller";
62
63 interrupt-controller;
64 #interrupt-cells = <1>;
65 };
66
67 memory@0 {
68 device_type = "memory";
69 reg = <0 0>;
70 };
71
72 ubus {
73 #address-cells = <1>;
74 #size-cells = <1>;
75
76 compatible = "simple-bus";
77 ranges;
78
79 periph_clk: clock-controller@10000004 {
80 compatible = "brcm,bcm6368-clocks";
81 reg = <0x10000004 0x4>;
82 #clock-cells = <1>;
83 };
84
85 pll_cntl: syscon@10000008 {
86 compatible = "syscon";
87 reg = <0x10000008 0x4>;
88 native-endian;
89 };
90
91 syscon-reboot {
92 compatible = "syscon-reboot";
93 regmap = <&pll_cntl>;
94 offset = <0x0>;
95 mask = <0x1>;
96 };
97
98 periph_rst: reset-controller@10000010 {
99 compatible = "brcm,bcm6345-reset";
100 reg = <0x10000010 0x4>;
101 #reset-cells = <1>;
102 };
103
104 ext_intc0: interrupt-controller@10000018 {
105 #address-cells = <1>;
106 compatible = "brcm,bcm6345-ext-intc";
107 reg = <0x10000018 0x4>;
108
109 interrupt-controller;
110 #interrupt-cells = <2>;
111
112 interrupts = <BCM6368_IRQ_EXT0>,
113 <BCM6368_IRQ_EXT1>,
114 <BCM6368_IRQ_EXT2>,
115 <BCM6368_IRQ_EXT3>;
116 };
117
118 ext_intc1: interrupt-controller@1000001c {
119 #address-cells = <1>;
120 compatible = "brcm,bcm6345-ext-intc";
121 reg = <0x1000001c 0x4>;
122
123 interrupt-controller;
124 #interrupt-cells = <2>;
125
126 interrupts = <BCM6368_IRQ_EXT4>,
127 <BCM6368_IRQ_EXT5>;
128 };
129
130 periph_intc: interrupt-controller@10000020 {
131 #address-cells = <1>;
132 compatible = "brcm,bcm6345-l1-intc";
133 reg = <0x10000020 0x10>,
134 <0x10000030 0x10>;
135
136 interrupt-controller;
137 #interrupt-cells = <1>;
138
139 interrupt-parent = <&cpu_intc>;
140 interrupts = <2>, <3>;
141 };
142
143 wdt: watchdog@1000005c {
144 compatible = "brcm,bcm7038-wdt";
145 reg = <0x1000005c 0xc>;
146
147 clocks = <&periph_osc>;
148
149 timeout-sec = <30>;
150 };
151
152 gpio: syscon@10000080 {
153 compatible = "syscon", "simple-mfd";
154 reg = <0x10000080 0x80>;
155 native-endian;
156
157 pinctrl: pin-controller {
158 compatible = "brcm,bcm6368-pinctrl";
159
160 gpio-controller;
161 #gpio-cells = <2>;
162
163 interrupts-extended = <&ext_intc1 0 0>,
164 <&ext_intc1 1 0>,
165 <&ext_intc0 0 0>,
166 <&ext_intc0 1 0>,
167 <&ext_intc0 2 0>,
168 <&ext_intc0 3 0>;
169 interrupt-names = "gpio32",
170 "gpio33",
171 "gpio34",
172 "gpio35",
173 "gpio36",
174 "gpio37";
175
176 pinctrl_analog_afe_0: analog_afe_0 {
177 function = "analog_afe_0";
178 pins = "gpio0";
179 };
180
181 pinctrl_analog_afe_1: analog_afe_1 {
182 function = "analog_afe_1";
183 pins = "gpio1";
184 };
185
186 pinctrl_sys_irq: sys_irq {
187 function = "sys_irq";
188 pins = "gpio2";
189 };
190
191 pinctrl_serial_led: serial_led {
192 pinctrl_serial_led_data: serial_led_data {
193 function = "serial_led_data";
194 pins = "gpio3";
195 };
196
197 pinctrl_serial_led_clk: serial_led_clk {
198 function = "serial_led_clk";
199 pins = "gpio4";
200 };
201 };
202
203 pinctrl_inet_led: inet_led {
204 function = "inet_led";
205 pins = "gpio5";
206 };
207
208 pinctrl_ephy0_led: ephy0_led {
209 function = "ephy0_led";
210 pins = "gpio6";
211 };
212
213 pinctrl_ephy1_led: ephy1_led {
214 function = "ephy1_led";
215 pins = "gpio7";
216 };
217
218 pinctrl_ephy2_led: ephy2_led {
219 function = "ephy2_led";
220 pins = "gpio8";
221 };
222
223 pinctrl_ephy3_led: ephy3_led {
224 function = "ephy3_led";
225 pins = "gpio9";
226 };
227
228 pinctrl_robosw_led_data: robosw_led_data {
229 function = "robosw_led_data";
230 pins = "gpio10";
231 };
232
233 pinctrl_robosw_led_clk: robosw_led_clk {
234 function = "robosw_led_clk";
235 pins = "gpio11";
236 };
237
238 pinctrl_robosw_led0: robosw_led0 {
239 function = "robosw_led0";
240 pins = "gpio12";
241 };
242
243 pinctrl_robosw_led1: robosw_led1 {
244 function = "robosw_led1";
245 pins = "gpio13";
246 };
247
248 pinctrl_usb_device_led: usb_device_led {
249 function = "usb_device_led";
250 pins = "gpio14";
251 };
252
253 pinctrl_pci: pci {
254 pinctrl_pci_req1: pci_req1 {
255 function = "pci_req1";
256 pins = "gpio16";
257 };
258
259 pinctrl_pci_gnt1: pci_gnt1 {
260 function = "pci_gnt1";
261 pins = "gpio17";
262 };
263
264 pinctrl_pci_intb: pci_intb {
265 function = "pci_intb";
266 pins = "gpio18";
267 };
268
269 pinctrl_pci_req0: pci_req0 {
270 function = "pci_req0";
271 pins = "gpio19";
272 };
273
274 pinctrl_pci_gnt0: pci_gnt0 {
275 function = "pci_gnt0";
276 pins = "gpio20";
277 };
278 };
279
280 pinctrl_pcmcia: pcmcia {
281 pinctrl_pcmcia_cd1: pcmcia_cd1 {
282 function = "pcmcia_cd1";
283 pins = "gpio22";
284 };
285
286 pinctrl_pcmcia_cd2: pcmcia_cd2 {
287 function = "pcmcia_cd2";
288 pins = "gpio23";
289 };
290
291 pinctrl_pcmcia_vs1: pcmcia_vs1 {
292 function = "pcmcia_vs1";
293 pins = "gpio24";
294 };
295
296 pinctrl_pcmcia_vs2: pcmcia_vs2 {
297 function = "pcmcia_vs2";
298 pins = "gpio25";
299 };
300 };
301
302 pinctrl_ebi_cs2: ebi_cs2 {
303 function = "ebi_cs2";
304 pins = "gpio26";
305 };
306
307 pinctrl_ebi_cs3: ebi_cs3 {
308 function = "ebi_cs3";
309 pins = "gpio27";
310 };
311
312 pinctrl_spi_cs2: spi_cs2 {
313 function = "spi_cs2";
314 pins = "gpio28";
315 };
316
317 pinctrl_spi_cs3: spi_cs3 {
318 function = "spi_cs3";
319 pins = "gpio29";
320 };
321
322 pinctrl_spi_cs4: spi_cs4 {
323 function = "spi_cs4";
324 pins = "gpio30";
325 };
326
327 pinctrl_spi_cs5: spi_cs5 {
328 function = "spi_cs5";
329 pins = "gpio31";
330 };
331
332 pinctrl_uart1: uart1 {
333 function = "uart1";
334 group = "uart1_grp";
335 };
336 };
337 };
338
339 gpiobasemode: gpiobasemode@100000b8 {
340 compatible = "brcm,bcm6368-gpiobasemode", "syscon";
341 reg = <0x100000b8 0x4>;
342 };
343
344 leds: led-controller@100000d0 {
345 #address-cells = <1>;
346 #size-cells = <0>;
347 compatible = "brcm,bcm6358-leds";
348 reg = <0x100000d0 0x8>;
349
350 status = "disabled";
351 };
352
353 uart0: serial@10000100 {
354 compatible = "brcm,bcm6345-uart";
355 reg = <0x10000100 0x18>;
356
357 interrupt-parent = <&periph_intc>;
358 interrupts = <BCM6368_IRQ_UART0>;
359
360 clocks = <&periph_osc>;
361 clock-names = "periph";
362
363 status = "disabled";
364 };
365
366 uart1: serial@10000120 {
367 compatible = "brcm,bcm6345-uart";
368 reg = <0x10000120 0x18>;
369
370 interrupt-parent = <&periph_intc>;
371 interrupts = <BCM6368_IRQ_UART1>;
372
373 clocks = <&periph_osc>;
374 clock-names = "periph";
375
376 status = "disabled";
377 };
378
379 nflash: nand@10000200 {
380 #address-cells = <1>;
381 #size-cells = <0>;
382 compatible = "brcm,nand-bcm6368",
383 "brcm,brcmnand-v2.1",
384 "brcm,brcmnand";
385 reg = <0x10000200 0x180>,
386 <0x10000600 0x200>,
387 <0x10000070 0x10>;
388 reg-names = "nand",
389 "nand-cache",
390 "nand-int-base";
391
392 interrupt-parent = <&periph_intc>;
393 interrupts = <BCM6368_IRQ_NAND>;
394
395 clocks = <&periph_clk BCM6368_CLK_NAND>;
396 clock-names = "nand";
397
398 status = "disabled";
399 };
400
401 lsspi: spi@10000800 {
402 compatible = "brcm,bcm6358-spi";
403 reg = <0x10000800 0x70c>;
404 #address-cells = <1>;
405 #size-cells = <0>;
406
407 interrupt-parent = <&periph_intc>;
408 interrupts = <BCM6368_IRQ_SPI>;
409
410 clocks = <&periph_clk BCM6368_CLK_SPI>;
411 clock-names = "spi";
412
413 resets = <&periph_rst BCM6368_RST_SPI>;
414
415 status = "disabled";
416 };
417
418 ehci: usb@10001500 {
419 compatible = "brcm,bcm6368-ehci", "generic-ehci";
420 reg = <0x10001500 0x100>;
421 big-endian;
422 ignore-oc;
423
424 interrupt-parent = <&periph_intc>;
425 interrupts = <BCM6368_IRQ_EHCI>;
426
427 phys = <&usbh 0>;
428 phy-names = "usb";
429
430 status = "disabled";
431 };
432
433 ohci: usb@10001600 {
434 compatible = "brcm,bcm6368-ohci", "generic-ohci";
435 reg = <0x10001600 0x100>;
436 big-endian;
437 no-big-frame-no;
438
439 interrupt-parent = <&periph_intc>;
440 interrupts = <BCM6368_IRQ_OHCI>;
441
442 phys = <&usbh 0>;
443 phy-names = "usb";
444
445 status = "disabled";
446 };
447
448 usbh: usb-phy@10001700 {
449 compatible = "brcm,bcm6368-usbh-phy";
450 reg = <0x10001700 0x38>;
451
452 #phy-cells = <1>;
453
454 clocks = <&periph_clk BCM6368_CLK_USBH>;
455 clock-names = "usbh";
456
457 resets = <&periph_rst BCM6368_RST_USBH>;
458
459 status = "disabled";
460 };
461
462 random: rng@10004180 {
463 compatible = "brcm,bcm6368-rng";
464 reg = <0x10004180 0x14>;
465
466 clocks = <&periph_clk BCM6368_CLK_IPSEC>;
467 clock-names = "ipsec";
468
469 resets = <&periph_rst BCM6368_RST_IPSEC>;
470 };
471 };
472
473 pflash: nor@18000000 {
474 #address-cells = <1>;
475 #size-cells = <1>;
476 compatible = "cfi-flash";
477 reg = <0x18000000 0x2000000>;
478 bank-width = <2>;
479
480 status = "disabled";
481 };
482 };