target/linux/bmips/patches-5.10/406-Documentation-add-BCM6368-pincontroller-binding-docu.patch

   1 From 12f1d5123ee405266596eaea238d9810e0628d18 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
   3 Date: Wed, 27 Jul 2016 11:36:51 +0200
   4 Subject: [PATCH 07/12] Documentation: add BCM6368 pincontroller binding
   5  documentation
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 Add binding documentation for the pincontrol core found in BCM6368 SoCs.
  11
  12 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
  13 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  14 ---
  15  .../pinctrl/brcm,bcm6368-pinctrl.yaml         | 255 ++++++++++++++++++
  16  1 file changed, 255 insertions(+)
  17  create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml
  18
  19 --- /dev/null
  20 +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml
  21 @@ -0,0 +1,255 @@
  22 +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  23 +%YAML 1.2
  24 +---
  25 +$id: http://devicetree.org/schemas/pinctrl/brcm,bcm6368-pinctrl.yaml#
  26 +$schema: http://devicetree.org/meta-schemas/core.yaml#
  27 +
  28 +title: Broadcom BCM6368 pin controller
  29 +
  30 +maintainers:
  31 +  - Álvaro Fernández Rojas <noltari@gmail.com>
  32 +  - Jonas Gorski <jonas.gorski@gmail.com>
  33 +
  34 +description: |+
  35 +  The pin controller node should be the child of a syscon node.
  36 +
  37 +  Refer to the the bindings described in
  38 +  Documentation/devicetree/bindings/mfd/syscon.yaml
  39 +
  40 +properties:
  41 +  compatible:
  42 +    const: brcm,bcm6368-pinctrl
  43 +
  44 +  gpio-controller: true
  45 +
  46 +  '#gpio-cells':
  47 +    description:
  48 +      Specifies the pin number and flags, as defined in
  49 +      include/dt-bindings/gpio/gpio.h
  50 +    const: 2
  51 +
  52 +  interrupts-extended:
  53 +    description:
  54 +      One interrupt per each of the 6 GPIO ports supported by the controller,
  55 +      sorted by port number ascending order.
  56 +    minItems: 6
  57 +    maxItems: 6
  58 +
  59 +patternProperties:
  60 +  '^.*$':
  61 +    if:
  62 +      type: object
  63 +    then:
  64 +      properties:
  65 +        function:
  66 +          $ref: "/schemas/types.yaml#/definitions/string"
  67 +          enum: [ analog_afe_0, analog_afe_1, sys_irq, serial_led_data,
  68 +                  serial_led_clk, inet_led, ephy0_led, ephy1_led, ephy2_led,
  69 +                  ephy3_led, robosw_led_data, robosw_led_clk, robosw_led0,
  70 +                  robosw_led1, usb_device_led, pci_req1, pci_gnt1, pci_intb,
  71 +                  pci_req0, pci_gnt0, pcmcia_cd1, pcmcia_cd2, pcmcia_vs1,
  72 +                  pcmcia_vs2, ebi_cs2, ebi_cs3, spi_cs2, spi_cs3, spi_cs4,
  73 +                  spi_cs5, uart1 ]
  74 +
  75 +        pins:
  76 +          $ref: "/schemas/types.yaml#/definitions/string"
  77 +          enum: [ gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7,
  78 +                  gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio14,
  79 +                  gpio16, gpio17, gpio18, gpio19, gpio20, gpio22, gpio23,
  80 +                  gpio24, gpio25, gpio26, gpio27, gpio28, gpio29, gpio30,
  81 +                  gpio31, uart1_grp ]
  82 +
  83 +required:
  84 +  - compatible
  85 +  - gpio-controller
  86 +  - '#gpio-cells'
  87 +
  88 +additionalProperties: false
  89 +
  90 +examples:
  91 +  - |
  92 +    gpio@10000080 {
  93 +      compatible = "syscon", "simple-mfd";
  94 +      reg = <0x10000080 0x80>;
  95 +
  96 +      pinctrl: pinctrl {
  97 +        compatible = "brcm,bcm6368-pinctrl";
  98 +
  99 +        gpio-controller;
 100 +        #gpio-cells = <2>;
 101 +
 102 +        interrupts-extended = <&ext_intc1 0 0>,
 103 +                              <&ext_intc1 1 0>,
 104 +                              <&ext_intc0 0 0>,
 105 +                              <&ext_intc0 1 0>,
 106 +                              <&ext_intc0 2 0>,
 107 +                              <&ext_intc0 3 0>;
 108 +        interrupt-names = "gpio32",
 109 +                          "gpio33",
 110 +                          "gpio34",
 111 +                          "gpio35",
 112 +                          "gpio36",
 113 +                          "gpio37";
 114 +
 115 +        pinctrl_analog_afe_0: analog_afe_0 {
 116 +          function = "analog_afe_0";
 117 +          pins = "gpio0";
 118 +        };
 119 +
 120 +        pinctrl_analog_afe_1: analog_afe_1 {
 121 +          function = "analog_afe_1";
 122 +          pins = "gpio1";
 123 +        };
 124 +
 125 +        pinctrl_sys_irq: sys_irq {
 126 +          function = "sys_irq";
 127 +          pins = "gpio2";
 128 +        };
 129 +
 130 +        pinctrl_serial_led: serial_led {
 131 +          pinctrl_serial_led_data: serial_led_data {
 132 +            function = "serial_led_data";
 133 +            pins = "gpio3";
 134 +          };
 135 +
 136 +          pinctrl_serial_led_clk: serial_led_clk {
 137 +            function = "serial_led_clk";
 138 +            pins = "gpio4";
 139 +          };
 140 +        };
 141 +
 142 +        pinctrl_inet_led: inet_led {
 143 +          function = "inet_led";
 144 +          pins = "gpio5";
 145 +        };
 146 +
 147 +        pinctrl_ephy0_led: ephy0_led {
 148 +          function = "ephy0_led";
 149 +          pins = "gpio6";
 150 +        };
 151 +
 152 +        pinctrl_ephy1_led: ephy1_led {
 153 +          function = "ephy1_led";
 154 +          pins = "gpio7";
 155 +        };
 156 +
 157 +        pinctrl_ephy2_led: ephy2_led {
 158 +          function = "ephy2_led";
 159 +          pins = "gpio8";
 160 +        };
 161 +
 162 +        pinctrl_ephy3_led: ephy3_led {
 163 +          function = "ephy3_led";
 164 +          pins = "gpio9";
 165 +        };
 166 +
 167 +        pinctrl_robosw_led_data: robosw_led_data {
 168 +          function = "robosw_led_data";
 169 +          pins = "gpio10";
 170 +        };
 171 +
 172 +        pinctrl_robosw_led_clk: robosw_led_clk {
 173 +          function = "robosw_led_clk";
 174 +          pins = "gpio11";
 175 +        };
 176 +
 177 +        pinctrl_robosw_led0: robosw_led0 {
 178 +          function = "robosw_led0";
 179 +          pins = "gpio12";
 180 +        };
 181 +
 182 +        pinctrl_robosw_led1: robosw_led1 {
 183 +          function = "robosw_led1";
 184 +          pins = "gpio13";
 185 +        };
 186 +
 187 +        pinctrl_usb_device_led: usb_device_led {
 188 +          function = "usb_device_led";
 189 +          pins = "gpio14";
 190 +        };
 191 +
 192 +        pinctrl_pci: pci {
 193 +          pinctrl_pci_req1: pci_req1 {
 194 +            function = "pci_req1";
 195 +            pins = "gpio16";
 196 +          };
 197 +
 198 +          pinctrl_pci_gnt1: pci_gnt1 {
 199 +            function = "pci_gnt1";
 200 +            pins = "gpio17";
 201 +          };
 202 +
 203 +          pinctrl_pci_intb: pci_intb {
 204 +            function = "pci_intb";
 205 +            pins = "gpio18";
 206 +          };
 207 +
 208 +          pinctrl_pci_req0: pci_req0 {
 209 +            function = "pci_req0";
 210 +            pins = "gpio19";
 211 +          };
 212 +
 213 +          pinctrl_pci_gnt0: pci_gnt0 {
 214 +            function = "pci_gnt0";
 215 +            pins = "gpio20";
 216 +          };
 217 +        };
 218 +
 219 +        pinctrl_pcmcia: pcmcia {
 220 +          pinctrl_pcmcia_cd1: pcmcia_cd1 {
 221 +            function = "pcmcia_cd1";
 222 +            pins = "gpio22";
 223 +          };
 224 +
 225 +          pinctrl_pcmcia_cd2: pcmcia_cd2 {
 226 +            function = "pcmcia_cd2";
 227 +            pins = "gpio23";
 228 +          };
 229 +
 230 +          pinctrl_pcmcia_vs1: pcmcia_vs1 {
 231 +            function = "pcmcia_vs1";
 232 +            pins = "gpio24";
 233 +          };
 234 +
 235 +          pinctrl_pcmcia_vs2: pcmcia_vs2 {
 236 +            function = "pcmcia_vs2";
 237 +            pins = "gpio25";
 238 +          };
 239 +        };
 240 +
 241 +        pinctrl_ebi_cs2: ebi_cs2 {
 242 +          function = "ebi_cs2";
 243 +          pins = "gpio26";
 244 +        };
 245 +
 246 +        pinctrl_ebi_cs3: ebi_cs3 {
 247 +          function = "ebi_cs3";
 248 +          pins = "gpio27";
 249 +        };
 250 +
 251 +        pinctrl_spi_cs2: spi_cs2 {
 252 +          function = "spi_cs2";
 253 +          pins = "gpio28";
 254 +        };
 255 +
 256 +        pinctrl_spi_cs3: spi_cs3 {
 257 +          function = "spi_cs3";
 258 +          pins = "gpio29";
 259 +        };
 260 +
 261 +        pinctrl_spi_cs4: spi_cs4 {
 262 +          function = "spi_cs4";
 263 +          pins = "gpio30";
 264 +        };
 265 +
 266 +        pinctrl_spi_cs5: spi_cs5 {
 267 +          function = "spi_cs5";
 268 +          pins = "gpio31";
 269 +        };
 270 +
 271 +        pinctrl_uart1: uart1 {
 272 +          function = "uart1";
 273 +          group = "uart1_grp";
 274 +        };
 275 +      };
 276 +    };