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update to 2.6.25.19, and refresh patches
[openwrt/staging/dedeckeh.git] / target / linux / etrax / patches / 301-usb_support.patch
1 --- a/drivers/usb/Makefile
2 +++ b/drivers/usb/Makefile
3 @@ -16,6 +16,7 @@ obj-$(CONFIG_USB_UHCI_HCD) += host/
4 obj-$(CONFIG_USB_SL811_HCD) += host/
5 obj-$(CONFIG_USB_U132_HCD) += host/
6 obj-$(CONFIG_USB_R8A66597_HCD) += host/
7 +obj-$(CONFIG_ETRAX_USB_HOST) += host/
8
9 obj-$(CONFIG_USB_ACM) += class/
10 obj-$(CONFIG_USB_PRINTER) += class/
11 --- a/drivers/usb/host/Makefile
12 +++ b/drivers/usb/host/Makefile
13 @@ -17,3 +17,5 @@ obj-$(CONFIG_USB_SL811_CS) += sl811_cs.o
14 obj-$(CONFIG_USB_U132_HCD) += u132-hcd.o
15 obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
16
17 +#obj-$(CONFIG_USB_CARNEOL) += hc-crisv10.o
18 +obj-$(CONFIG_ETRAX_USB_HOST) += hc-crisv10.o
19 --- /dev/null
20 +++ b/drivers/usb/host/hc-cris-dbg.h
21 @@ -0,0 +1,143 @@
22 +
23 +/* macros for debug output */
24 +
25 +#define hcd_dbg(hcd, fmt, args...) \
26 + dev_info(hcd->self.controller, fmt, ## args)
27 +#define hcd_err(hcd, fmt, args...) \
28 + dev_err(hcd->self.controller, fmt, ## args)
29 +#define hcd_info(hcd, fmt, args...) \
30 + dev_info(hcd->self.controller, fmt, ## args)
31 +#define hcd_warn(hcd, fmt, args...) \
32 + dev_warn(hcd->self.controller, fmt, ## args)
33 +
34 +/*
35 +#define devdrv_dbg(fmt, args...) \
36 + printk(KERN_INFO "usb_devdrv dbg: ");printk(fmt, ## args)
37 +*/
38 +#define devdrv_dbg(fmt, args...) {}
39 +
40 +#define devdrv_err(fmt, args...) \
41 + printk(KERN_ERR "usb_devdrv error: ");printk(fmt, ## args)
42 +#define devdrv_info(fmt, args...) \
43 + printk(KERN_INFO "usb_devdrv: ");printk(fmt, ## args)
44 +
45 +#define irq_dbg(fmt, args...) \
46 + printk(KERN_INFO "crisv10_irq dbg: ");printk(fmt, ## args)
47 +#define irq_err(fmt, args...) \
48 + printk(KERN_ERR "crisv10_irq error: ");printk(fmt, ## args)
49 +#define irq_warn(fmt, args...) \
50 + printk(KERN_INFO "crisv10_irq warn: ");printk(fmt, ## args)
51 +#define irq_info(fmt, args...) \
52 + printk(KERN_INFO "crisv10_hcd: ");printk(fmt, ## args)
53 +
54 +/*
55 +#define rh_dbg(fmt, args...) \
56 + printk(KERN_DEBUG "crisv10_rh dbg: ");printk(fmt, ## args)
57 +*/
58 +#define rh_dbg(fmt, args...) {}
59 +
60 +#define rh_err(fmt, args...) \
61 + printk(KERN_ERR "crisv10_rh error: ");printk(fmt, ## args)
62 +#define rh_warn(fmt, args...) \
63 + printk(KERN_INFO "crisv10_rh warning: ");printk(fmt, ## args)
64 +#define rh_info(fmt, args...) \
65 + printk(KERN_INFO "crisv10_rh: ");printk(fmt, ## args)
66 +
67 +/*
68 +#define tc_dbg(fmt, args...) \
69 + printk(KERN_INFO "crisv10_tc dbg: ");printk(fmt, ## args)
70 +*/
71 +#define tc_dbg(fmt, args...) {while(0){}}
72 +
73 +#define tc_err(fmt, args...) \
74 + printk(KERN_ERR "crisv10_tc error: ");printk(fmt, ## args)
75 +/*
76 +#define tc_warn(fmt, args...) \
77 + printk(KERN_INFO "crisv10_tc warning: ");printk(fmt, ## args)
78 +*/
79 +#define tc_warn(fmt, args...) {while(0){}}
80 +
81 +#define tc_info(fmt, args...) \
82 + printk(KERN_INFO "crisv10_tc: ");printk(fmt, ## args)
83 +
84 +
85 +/* Debug print-outs for various traffic types */
86 +
87 +#define intr_warn(fmt, args...) \
88 + printk(KERN_INFO "crisv10_intr warning: ");printk(fmt, ## args)
89 +
90 +#define intr_dbg(fmt, args...) \
91 + printk(KERN_DEBUG "crisv10_intr dbg: ");printk(fmt, ## args)
92 +/*
93 +#define intr_dbg(fmt, args...) {while(0){}}
94 +*/
95 +
96 +
97 +#define isoc_err(fmt, args...) \
98 + printk(KERN_ERR "crisv10_isoc error: ");printk(fmt, ## args)
99 +/*
100 +#define isoc_warn(fmt, args...) \
101 + printk(KERN_INFO "crisv10_isoc warning: ");printk(fmt, ## args)
102 +*/
103 +#define isoc_warn(fmt, args...) {while(0){}}
104 +
105 +/*
106 +#define isoc_dbg(fmt, args...) \
107 + printk(KERN_INFO "crisv10_isoc dbg: ");printk(fmt, ## args)
108 +*/
109 +#define isoc_dbg(fmt, args...) {while(0){}}
110 +
111 +/*
112 +#define timer_warn(fmt, args...) \
113 + printk(KERN_INFO "crisv10_timer warning: ");printk(fmt, ## args)
114 +*/
115 +#define timer_warn(fmt, args...) {while(0){}}
116 +
117 +/*
118 +#define timer_dbg(fmt, args...) \
119 + printk(KERN_INFO "crisv10_timer dbg: ");printk(fmt, ## args)
120 +*/
121 +#define timer_dbg(fmt, args...) {while(0){}}
122 +
123 +
124 +/* Debug printouts for events related to late finishing of URBs */
125 +
126 +#define late_dbg(fmt, args...) \
127 + printk(KERN_INFO "crisv10_late dbg: ");printk(fmt, ## args)
128 +/*
129 +#define late_dbg(fmt, args...) {while(0){}}
130 +*/
131 +
132 +#define late_warn(fmt, args...) \
133 + printk(KERN_INFO "crisv10_late warning: ");printk(fmt, ## args)
134 +/*
135 +#define errno_dbg(fmt, args...) \
136 + printk(KERN_INFO "crisv10_errno dbg: ");printk(fmt, ## args)
137 +*/
138 +#define errno_dbg(fmt, args...) {while(0){}}
139 +
140 +
141 +#define dma_dbg(fmt, args...) \
142 + printk(KERN_INFO "crisv10_dma dbg: ");printk(fmt, ## args)
143 +#define dma_err(fmt, args...) \
144 + printk(KERN_ERR "crisv10_dma error: ");printk(fmt, ## args)
145 +#define dma_warn(fmt, args...) \
146 + printk(KERN_INFO "crisv10_dma warning: ");printk(fmt, ## args)
147 +#define dma_info(fmt, args...) \
148 + printk(KERN_INFO "crisv10_dma: ");printk(fmt, ## args)
149 +
150 +
151 +
152 +#define str_dir(pipe) \
153 + (usb_pipeout(pipe) ? "out" : "in")
154 +#define str_type(pipe) \
155 + ({ \
156 + char *s = "?"; \
157 + switch (usb_pipetype(pipe)) { \
158 + case PIPE_ISOCHRONOUS: s = "iso"; break; \
159 + case PIPE_INTERRUPT: s = "intr"; break; \
160 + case PIPE_CONTROL: s = "ctrl"; break; \
161 + case PIPE_BULK: s = "bulk"; break; \
162 + }; \
163 + s; \
164 + })
165 --- /dev/null
166 +++ b/drivers/usb/host/hc-crisv10.c
167 @@ -0,0 +1,4800 @@
168 +/*
169 + *
170 + * ETRAX 100LX USB Host Controller Driver
171 + *
172 + * Copyright (C) 2005, 2006 Axis Communications AB
173 + *
174 + * Author: Konrad Eriksson <konrad.eriksson@axis.se>
175 + *
176 + */
177 +
178 +#include <linux/module.h>
179 +#include <linux/kernel.h>
180 +#include <linux/init.h>
181 +#include <linux/moduleparam.h>
182 +#include <linux/spinlock.h>
183 +#include <linux/usb.h>
184 +#include <linux/platform_device.h>
185 +
186 +#include <asm/io.h>
187 +#include <asm/irq.h>
188 +#include <asm/arch/dma.h>
189 +#include <asm/arch/io_interface_mux.h>
190 +
191 +#include "../core/hcd.h"
192 +#include "../core/hub.h"
193 +#include "hc-crisv10.h"
194 +#include "hc-cris-dbg.h"
195 +
196 +
197 +/***************************************************************************/
198 +/***************************************************************************/
199 +/* Host Controller settings */
200 +/***************************************************************************/
201 +/***************************************************************************/
202 +
203 +#define VERSION "1.00 hinko.4"
204 +#define COPYRIGHT "(c) 2005, 2006 Axis Communications AB"
205 +#define DESCRIPTION "ETRAX 100LX USB Host Controller (2.6.25-rc9 port)"
206 +
207 +#define ETRAX_USB_HC_IRQ USB_HC_IRQ_NBR
208 +#define ETRAX_USB_RX_IRQ USB_DMA_RX_IRQ_NBR
209 +#define ETRAX_USB_TX_IRQ USB_DMA_TX_IRQ_NBR
210 +
211 +/* Number of physical ports in Etrax 100LX */
212 +#define USB_ROOT_HUB_PORTS 2
213 +
214 +const char hc_name[] = "hc-crisv10";
215 +const char product_desc[] = DESCRIPTION;
216 +
217 +/* The number of epids is, among other things, used for pre-allocating
218 + ctrl, bulk and isoc EP descriptors (one for each epid).
219 + Assumed to be > 1 when initiating the DMA lists. */
220 +#define NBR_OF_EPIDS 32
221 +
222 +/* Support interrupt traffic intervals up to 128 ms. */
223 +#define MAX_INTR_INTERVAL 128
224 +
225 +/* If periodic traffic (intr or isoc) is to be used, then one entry in the EP
226 + table must be "invalid". By this we mean that we shouldn't care about epid
227 + attentions for this epid, or at least handle them differently from epid
228 + attentions for "valid" epids. This define determines which one to use
229 + (don't change it). */
230 +#define INVALID_EPID 31
231 +/* A special epid for the bulk dummys. */
232 +#define DUMMY_EPID 30
233 +
234 +/* Module settings */
235 +
236 +MODULE_DESCRIPTION(DESCRIPTION);
237 +MODULE_LICENSE("GPL");
238 +MODULE_AUTHOR("Konrad Eriksson <konrad.eriksson@axis.se>");
239 +
240 +
241 +/* Module parameters */
242 +
243 +/* 0 = No ports enabled
244 + 1 = Only port 1 enabled (on board ethernet on devboard)
245 + 2 = Only port 2 enabled (external connector on devboard)
246 + 3 = Both ports enabled
247 +*/
248 +static unsigned int ports = 3;
249 +module_param(ports, uint, S_IRUGO);
250 +MODULE_PARM_DESC(ports, "Bitmask indicating USB ports to use");
251 +
252 +
253 +/***************************************************************************/
254 +/***************************************************************************/
255 +/* Shared global variables for this module */
256 +/***************************************************************************/
257 +/***************************************************************************/
258 +
259 +/* EP descriptor lists for non period transfers. Must be 32-bit aligned. */
260 +static volatile struct USB_EP_Desc TxBulkEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
261 +
262 +static volatile struct USB_EP_Desc TxCtrlEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
263 +
264 +/* EP descriptor lists for period transfers. Must be 32-bit aligned. */
265 +static volatile struct USB_EP_Desc TxIntrEPList[MAX_INTR_INTERVAL] __attribute__ ((aligned (4)));
266 +static volatile struct USB_SB_Desc TxIntrSB_zout __attribute__ ((aligned (4)));
267 +
268 +static volatile struct USB_EP_Desc TxIsocEPList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
269 +static volatile struct USB_SB_Desc TxIsocSB_zout __attribute__ ((aligned (4)));
270 +
271 +//static volatile struct USB_SB_Desc TxIsocSBList[NBR_OF_EPIDS] __attribute__ ((aligned (4)));
272 +
273 +/* After each enabled bulk EP IN we put two disabled EP descriptors with the eol flag set,
274 + causing the DMA to stop the DMA channel. The first of these two has the intr flag set, which
275 + gives us a dma8_sub0_descr interrupt. When we receive this, we advance the DMA one step in the
276 + EP list and then restart the bulk channel, thus forcing a switch between bulk EP descriptors
277 + in each frame. */
278 +static volatile struct USB_EP_Desc TxBulkDummyEPList[NBR_OF_EPIDS][2] __attribute__ ((aligned (4)));
279 +
280 +/* List of URB pointers, where each points to the active URB for a epid.
281 + For Bulk, Ctrl and Intr this means which URB that currently is added to
282 + DMA lists (Isoc URBs are all directly added to DMA lists). As soon as
283 + URB has completed is the queue examined and the first URB in queue is
284 + removed and moved to the activeUrbList while its state change to STARTED and
285 + its transfer(s) gets added to DMA list (exception Isoc where URBs enter
286 + state STARTED directly and added transfers added to DMA lists). */
287 +static struct urb *activeUrbList[NBR_OF_EPIDS];
288 +
289 +/* Additional software state info for each epid */
290 +static struct etrax_epid epid_state[NBR_OF_EPIDS];
291 +
292 +/* Timer handles for bulk traffic timer used to avoid DMA bug where DMA stops
293 + even if there is new data waiting to be processed */
294 +static struct timer_list bulk_start_timer = TIMER_INITIALIZER(NULL, 0, 0);
295 +static struct timer_list bulk_eot_timer = TIMER_INITIALIZER(NULL, 0, 0);
296 +
297 +/* We want the start timer to expire before the eot timer, because the former
298 + might start traffic, thus making it unnecessary for the latter to time
299 + out. */
300 +#define BULK_START_TIMER_INTERVAL (HZ/50) /* 20 ms */
301 +#define BULK_EOT_TIMER_INTERVAL (HZ/16) /* 60 ms */
302 +
303 +/* Delay before a URB completion happen when it's scheduled to be delayed */
304 +#define LATER_TIMER_DELAY (HZ/50) /* 20 ms */
305 +
306 +/* Simplifying macros for checking software state info of a epid */
307 +/* ----------------------------------------------------------------------- */
308 +#define epid_inuse(epid) epid_state[epid].inuse
309 +#define epid_out_traffic(epid) epid_state[epid].out_traffic
310 +#define epid_isoc(epid) (epid_state[epid].type == PIPE_ISOCHRONOUS ? 1 : 0)
311 +#define epid_intr(epid) (epid_state[epid].type == PIPE_INTERRUPT ? 1 : 0)
312 +
313 +
314 +/***************************************************************************/
315 +/***************************************************************************/
316 +/* DEBUG FUNCTIONS */
317 +/***************************************************************************/
318 +/***************************************************************************/
319 +/* Note that these functions are always available in their "__" variants,
320 + for use in error situations. The "__" missing variants are controlled by
321 + the USB_DEBUG_DESC/USB_DEBUG_URB macros. */
322 +static void __dump_urb(struct urb* purb)
323 +{
324 + struct crisv10_urb_priv *urb_priv = purb->hcpriv;
325 + int urb_num = -1;
326 + if(urb_priv) {
327 + urb_num = urb_priv->urb_num;
328 + }
329 + printk("\nURB:0x%x[%d]\n", (unsigned int)purb, urb_num);
330 + printk("dev :0x%08lx\n", (unsigned long)purb->dev);
331 + printk("pipe :0x%08x\n", purb->pipe);
332 + printk("status :%d\n", purb->status);
333 + printk("transfer_flags :0x%08x\n", purb->transfer_flags);
334 + printk("transfer_buffer :0x%08lx\n", (unsigned long)purb->transfer_buffer);
335 + printk("transfer_buffer_length:%d\n", purb->transfer_buffer_length);
336 + printk("actual_length :%d\n", purb->actual_length);
337 + printk("setup_packet :0x%08lx\n", (unsigned long)purb->setup_packet);
338 + printk("start_frame :%d\n", purb->start_frame);
339 + printk("number_of_packets :%d\n", purb->number_of_packets);
340 + printk("interval :%d\n", purb->interval);
341 + printk("error_count :%d\n", purb->error_count);
342 + printk("context :0x%08lx\n", (unsigned long)purb->context);
343 + printk("complete :0x%08lx\n\n", (unsigned long)purb->complete);
344 +}
345 +
346 +static void __dump_in_desc(volatile struct USB_IN_Desc *in)
347 +{
348 + printk("\nUSB_IN_Desc at 0x%08lx\n", (unsigned long)in);
349 + printk(" sw_len : 0x%04x (%d)\n", in->sw_len, in->sw_len);
350 + printk(" command : 0x%04x\n", in->command);
351 + printk(" next : 0x%08lx\n", in->next);
352 + printk(" buf : 0x%08lx\n", in->buf);
353 + printk(" hw_len : 0x%04x (%d)\n", in->hw_len, in->hw_len);
354 + printk(" status : 0x%04x\n\n", in->status);
355 +}
356 +
357 +static void __dump_sb_desc(volatile struct USB_SB_Desc *sb)
358 +{
359 + char tt = (sb->command & 0x30) >> 4;
360 + char *tt_string;
361 +
362 + switch (tt) {
363 + case 0:
364 + tt_string = "zout";
365 + break;
366 + case 1:
367 + tt_string = "in";
368 + break;
369 + case 2:
370 + tt_string = "out";
371 + break;
372 + case 3:
373 + tt_string = "setup";
374 + break;
375 + default:
376 + tt_string = "unknown (weird)";
377 + }
378 +
379 + printk(" USB_SB_Desc at 0x%08lx ", (unsigned long)sb);
380 + printk(" command:0x%04x (", sb->command);
381 + printk("rem:%d ", (sb->command & 0x3f00) >> 8);
382 + printk("full:%d ", (sb->command & 0x40) >> 6);
383 + printk("tt:%d(%s) ", tt, tt_string);
384 + printk("intr:%d ", (sb->command & 0x8) >> 3);
385 + printk("eot:%d ", (sb->command & 0x2) >> 1);
386 + printk("eol:%d)", sb->command & 0x1);
387 + printk(" sw_len:0x%04x(%d)", sb->sw_len, sb->sw_len);
388 + printk(" next:0x%08lx", sb->next);
389 + printk(" buf:0x%08lx\n", sb->buf);
390 +}
391 +
392 +
393 +static void __dump_ep_desc(volatile struct USB_EP_Desc *ep)
394 +{
395 + printk("USB_EP_Desc at 0x%08lx ", (unsigned long)ep);
396 + printk(" command:0x%04x (", ep->command);
397 + printk("ep_id:%d ", (ep->command & 0x1f00) >> 8);
398 + printk("enable:%d ", (ep->command & 0x10) >> 4);
399 + printk("intr:%d ", (ep->command & 0x8) >> 3);
400 + printk("eof:%d ", (ep->command & 0x2) >> 1);
401 + printk("eol:%d)", ep->command & 0x1);
402 + printk(" hw_len:0x%04x(%d)", ep->hw_len, ep->hw_len);
403 + printk(" next:0x%08lx", ep->next);
404 + printk(" sub:0x%08lx\n", ep->sub);
405 +}
406 +
407 +static inline void __dump_ep_list(int pipe_type)
408 +{
409 + volatile struct USB_EP_Desc *ep;
410 + volatile struct USB_EP_Desc *first_ep;
411 + volatile struct USB_SB_Desc *sb;
412 +
413 + switch (pipe_type)
414 + {
415 + case PIPE_BULK:
416 + first_ep = &TxBulkEPList[0];
417 + break;
418 + case PIPE_CONTROL:
419 + first_ep = &TxCtrlEPList[0];
420 + break;
421 + case PIPE_INTERRUPT:
422 + first_ep = &TxIntrEPList[0];
423 + break;
424 + case PIPE_ISOCHRONOUS:
425 + first_ep = &TxIsocEPList[0];
426 + break;
427 + default:
428 + warn("Cannot dump unknown traffic type");
429 + return;
430 + }
431 + ep = first_ep;
432 +
433 + printk("\n\nDumping EP list...\n\n");
434 +
435 + do {
436 + __dump_ep_desc(ep);
437 + /* Cannot phys_to_virt on 0 as it turns into 80000000, which is != 0. */
438 + sb = ep->sub ? phys_to_virt(ep->sub) : 0;
439 + while (sb) {
440 + __dump_sb_desc(sb);
441 + sb = sb->next ? phys_to_virt(sb->next) : 0;
442 + }
443 + ep = (volatile struct USB_EP_Desc *)(phys_to_virt(ep->next));
444 +
445 + } while (ep != first_ep);
446 +}
447 +
448 +static inline void __dump_ept_data(int epid)
449 +{
450 + unsigned long flags;
451 + __u32 r_usb_ept_data;
452 +
453 + if (epid < 0 || epid > 31) {
454 + printk("Cannot dump ept data for invalid epid %d\n", epid);
455 + return;
456 + }
457 +
458 + local_irq_save(flags);
459 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
460 + nop();
461 + r_usb_ept_data = *R_USB_EPT_DATA;
462 + local_irq_restore(flags);
463 +
464 + printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", r_usb_ept_data, epid);
465 + if (r_usb_ept_data == 0) {
466 + /* No need for more detailed printing. */
467 + return;
468 + }
469 + printk(" valid : %d\n", (r_usb_ept_data & 0x80000000) >> 31);
470 + printk(" hold : %d\n", (r_usb_ept_data & 0x40000000) >> 30);
471 + printk(" error_count_in : %d\n", (r_usb_ept_data & 0x30000000) >> 28);
472 + printk(" t_in : %d\n", (r_usb_ept_data & 0x08000000) >> 27);
473 + printk(" low_speed : %d\n", (r_usb_ept_data & 0x04000000) >> 26);
474 + printk(" port : %d\n", (r_usb_ept_data & 0x03000000) >> 24);
475 + printk(" error_code : %d\n", (r_usb_ept_data & 0x00c00000) >> 22);
476 + printk(" t_out : %d\n", (r_usb_ept_data & 0x00200000) >> 21);
477 + printk(" error_count_out : %d\n", (r_usb_ept_data & 0x00180000) >> 19);
478 + printk(" max_len : %d\n", (r_usb_ept_data & 0x0003f800) >> 11);
479 + printk(" ep : %d\n", (r_usb_ept_data & 0x00000780) >> 7);
480 + printk(" dev : %d\n", (r_usb_ept_data & 0x0000003f));
481 +}
482 +
483 +static inline void __dump_ept_data_iso(int epid)
484 +{
485 + unsigned long flags;
486 + __u32 ept_data;
487 +
488 + if (epid < 0 || epid > 31) {
489 + printk("Cannot dump ept data for invalid epid %d\n", epid);
490 + return;
491 + }
492 +
493 + local_irq_save(flags);
494 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
495 + nop();
496 + ept_data = *R_USB_EPT_DATA_ISO;
497 + local_irq_restore(flags);
498 +
499 + printk(" R_USB_EPT_DATA = 0x%x for epid %d :\n", ept_data, epid);
500 + if (ept_data == 0) {
501 + /* No need for more detailed printing. */
502 + return;
503 + }
504 + printk(" valid : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, valid,
505 + ept_data));
506 + printk(" port : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, port,
507 + ept_data));
508 + printk(" error_code : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code,
509 + ept_data));
510 + printk(" max_len : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, max_len,
511 + ept_data));
512 + printk(" ep : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, ep,
513 + ept_data));
514 + printk(" dev : %d\n", IO_EXTRACT(R_USB_EPT_DATA_ISO, dev,
515 + ept_data));
516 +}
517 +
518 +static inline void __dump_ept_data_list(void)
519 +{
520 + int i;
521 +
522 + printk("Dumping the whole R_USB_EPT_DATA list\n");
523 +
524 + for (i = 0; i < 32; i++) {
525 + __dump_ept_data(i);
526 + }
527 +}
528 +
529 +static void debug_epid(int epid) {
530 + int i;
531 +
532 + if(epid_isoc(epid)) {
533 + __dump_ept_data_iso(epid);
534 + } else {
535 + __dump_ept_data(epid);
536 + }
537 +
538 + printk("Bulk:\n");
539 + for(i = 0; i < 32; i++) {
540 + if(IO_EXTRACT(USB_EP_command, epid, TxBulkEPList[i].command) ==
541 + epid) {
542 + printk("%d: ", i); __dump_ep_desc(&(TxBulkEPList[i]));
543 + }
544 + }
545 +
546 + printk("Ctrl:\n");
547 + for(i = 0; i < 32; i++) {
548 + if(IO_EXTRACT(USB_EP_command, epid, TxCtrlEPList[i].command) ==
549 + epid) {
550 + printk("%d: ", i); __dump_ep_desc(&(TxCtrlEPList[i]));
551 + }
552 + }
553 +
554 + printk("Intr:\n");
555 + for(i = 0; i < MAX_INTR_INTERVAL; i++) {
556 + if(IO_EXTRACT(USB_EP_command, epid, TxIntrEPList[i].command) ==
557 + epid) {
558 + printk("%d: ", i); __dump_ep_desc(&(TxIntrEPList[i]));
559 + }
560 + }
561 +
562 + printk("Isoc:\n");
563 + for(i = 0; i < 32; i++) {
564 + if(IO_EXTRACT(USB_EP_command, epid, TxIsocEPList[i].command) ==
565 + epid) {
566 + printk("%d: ", i); __dump_ep_desc(&(TxIsocEPList[i]));
567 + }
568 + }
569 +
570 + __dump_ept_data_list();
571 + __dump_ep_list(PIPE_INTERRUPT);
572 + printk("\n\n");
573 +}
574 +
575 +
576 +
577 +char* hcd_status_to_str(__u8 bUsbStatus) {
578 + static char hcd_status_str[128];
579 + hcd_status_str[0] = '\0';
580 + if(bUsbStatus & IO_STATE(R_USB_STATUS, ourun, yes)) {
581 + strcat(hcd_status_str, "ourun ");
582 + }
583 + if(bUsbStatus & IO_STATE(R_USB_STATUS, perror, yes)) {
584 + strcat(hcd_status_str, "perror ");
585 + }
586 + if(bUsbStatus & IO_STATE(R_USB_STATUS, device_mode, yes)) {
587 + strcat(hcd_status_str, "device_mode ");
588 + }
589 + if(bUsbStatus & IO_STATE(R_USB_STATUS, host_mode, yes)) {
590 + strcat(hcd_status_str, "host_mode ");
591 + }
592 + if(bUsbStatus & IO_STATE(R_USB_STATUS, started, yes)) {
593 + strcat(hcd_status_str, "started ");
594 + }
595 + if(bUsbStatus & IO_STATE(R_USB_STATUS, running, yes)) {
596 + strcat(hcd_status_str, "running ");
597 + }
598 + return hcd_status_str;
599 +}
600 +
601 +
602 +char* sblist_to_str(struct USB_SB_Desc* sb_desc) {
603 + static char sblist_to_str_buff[128];
604 + char tmp[32], tmp2[32];
605 + sblist_to_str_buff[0] = '\0';
606 + while(sb_desc != NULL) {
607 + switch(IO_EXTRACT(USB_SB_command, tt, sb_desc->command)) {
608 + case 0: sprintf(tmp, "zout"); break;
609 + case 1: sprintf(tmp, "in"); break;
610 + case 2: sprintf(tmp, "out"); break;
611 + case 3: sprintf(tmp, "setup"); break;
612 + }
613 + sprintf(tmp2, "(%s %d)", tmp, sb_desc->sw_len);
614 + strcat(sblist_to_str_buff, tmp2);
615 + if(sb_desc->next != 0) {
616 + sb_desc = phys_to_virt(sb_desc->next);
617 + } else {
618 + sb_desc = NULL;
619 + }
620 + }
621 + return sblist_to_str_buff;
622 +}
623 +
624 +char* port_status_to_str(__u16 wPortStatus) {
625 + static char port_status_str[128];
626 + port_status_str[0] = '\0';
627 + if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, connected, yes)) {
628 + strcat(port_status_str, "connected ");
629 + }
630 + if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) {
631 + strcat(port_status_str, "enabled ");
632 + }
633 + if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, suspended, yes)) {
634 + strcat(port_status_str, "suspended ");
635 + }
636 + if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, reset, yes)) {
637 + strcat(port_status_str, "reset ");
638 + }
639 + if(wPortStatus & IO_STATE(R_USB_RH_PORT_STATUS_1, speed, full)) {
640 + strcat(port_status_str, "full-speed ");
641 + } else {
642 + strcat(port_status_str, "low-speed ");
643 + }
644 + return port_status_str;
645 +}
646 +
647 +
648 +char* endpoint_to_str(struct usb_endpoint_descriptor *ed) {
649 + static char endpoint_to_str_buff[128];
650 + char tmp[32];
651 + int epnum = ed->bEndpointAddress & 0x0F;
652 + int dir = ed->bEndpointAddress & 0x80;
653 + int type = ed->bmAttributes & 0x03;
654 + endpoint_to_str_buff[0] = '\0';
655 + sprintf(endpoint_to_str_buff, "ep:%d ", epnum);
656 + switch(type) {
657 + case 0:
658 + sprintf(tmp, " ctrl");
659 + break;
660 + case 1:
661 + sprintf(tmp, " isoc");
662 + break;
663 + case 2:
664 + sprintf(tmp, " bulk");
665 + break;
666 + case 3:
667 + sprintf(tmp, " intr");
668 + break;
669 + }
670 + strcat(endpoint_to_str_buff, tmp);
671 + if(dir) {
672 + sprintf(tmp, " in");
673 + } else {
674 + sprintf(tmp, " out");
675 + }
676 + strcat(endpoint_to_str_buff, tmp);
677 +
678 + return endpoint_to_str_buff;
679 +}
680 +
681 +/* Debug helper functions for Transfer Controller */
682 +char* pipe_to_str(unsigned int pipe) {
683 + static char pipe_to_str_buff[128];
684 + char tmp[64];
685 + sprintf(pipe_to_str_buff, "dir:%s", str_dir(pipe));
686 + sprintf(tmp, " type:%s", str_type(pipe));
687 + strcat(pipe_to_str_buff, tmp);
688 +
689 + sprintf(tmp, " dev:%d", usb_pipedevice(pipe));
690 + strcat(pipe_to_str_buff, tmp);
691 + sprintf(tmp, " ep:%d", usb_pipeendpoint(pipe));
692 + strcat(pipe_to_str_buff, tmp);
693 + return pipe_to_str_buff;
694 +}
695 +
696 +
697 +#define USB_DEBUG_DESC 1
698 +
699 +#ifdef USB_DEBUG_DESC
700 +#define dump_in_desc(x) __dump_in_desc(x)
701 +#define dump_sb_desc(...) __dump_sb_desc(...)
702 +#define dump_ep_desc(x) __dump_ep_desc(x)
703 +#define dump_ept_data(x) __dump_ept_data(x)
704 +#else
705 +#define dump_in_desc(...) do {} while (0)
706 +#define dump_sb_desc(...) do {} while (0)
707 +#define dump_ep_desc(...) do {} while (0)
708 +#endif
709 +
710 +
711 +/* Uncomment this to enable massive function call trace
712 + #define USB_DEBUG_TRACE */
713 +//#define USB_DEBUG_TRACE 1
714 +
715 +#ifdef USB_DEBUG_TRACE
716 +#define DBFENTER (printk(": Entering: %s\n", __FUNCTION__))
717 +#define DBFEXIT (printk(": Exiting: %s\n", __FUNCTION__))
718 +#else
719 +#define DBFENTER do {} while (0)
720 +#define DBFEXIT do {} while (0)
721 +#endif
722 +
723 +#define CHECK_ALIGN(x) if (((__u32)(x)) & 0x00000003) \
724 +{panic("Alignment check (DWORD) failed at %s:%s:%d\n", __FILE__, __FUNCTION__, __LINE__);}
725 +
726 +/* Most helpful debugging aid */
727 +#define ASSERT(expr) ((void) ((expr) ? 0 : (err("assert failed at: %s %d",__FUNCTION__, __LINE__))))
728 +
729 +
730 +/***************************************************************************/
731 +/***************************************************************************/
732 +/* Forward declarations */
733 +/***************************************************************************/
734 +/***************************************************************************/
735 +void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg);
736 +void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg);
737 +void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg);
738 +void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg);
739 +
740 +void rh_port_status_change(__u16[]);
741 +int rh_clear_port_feature(__u8, __u16);
742 +int rh_set_port_feature(__u8, __u16);
743 +static void rh_disable_port(unsigned int port);
744 +
745 +static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
746 + int timer);
747 +
748 +//static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
749 +// int mem_flags);
750 +static int tc_setup_epid(struct urb *urb, int mem_flags);
751 +static void tc_free_epid(struct usb_host_endpoint *ep);
752 +static int tc_allocate_epid(void);
753 +static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status);
754 +static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
755 + int status);
756 +
757 +static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
758 + int mem_flags);
759 +static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb);
760 +
761 +static inline struct urb *urb_list_first(int epid);
762 +static inline void urb_list_add(struct urb *urb, int epid,
763 + int mem_flags);
764 +static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid);
765 +static inline void urb_list_del(struct urb *urb, int epid);
766 +static inline void urb_list_move_last(struct urb *urb, int epid);
767 +static inline struct urb *urb_list_next(struct urb *urb, int epid);
768 +
769 +int create_sb_for_urb(struct urb *urb, int mem_flags);
770 +int init_intr_urb(struct urb *urb, int mem_flags);
771 +
772 +static inline void etrax_epid_set(__u8 index, __u32 data);
773 +static inline void etrax_epid_clear_error(__u8 index);
774 +static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
775 + __u8 toggle);
776 +static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout);
777 +static inline __u32 etrax_epid_get(__u8 index);
778 +
779 +/* We're accessing the same register position in Etrax so
780 + when we do full access the internal difference doesn't matter */
781 +#define etrax_epid_iso_set(index, data) etrax_epid_set(index, data)
782 +#define etrax_epid_iso_get(index) etrax_epid_get(index)
783 +
784 +
785 +//static void tc_dma_process_isoc_urb(struct urb *urb);
786 +static void tc_dma_process_queue(int epid);
787 +static void tc_dma_unlink_intr_urb(struct urb *urb);
788 +static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc);
789 +static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc);
790 +
791 +static void tc_bulk_start_timer_func(unsigned long dummy);
792 +static void tc_bulk_eot_timer_func(unsigned long dummy);
793 +
794 +
795 +/*************************************************************/
796 +/*************************************************************/
797 +/* Host Controler Driver block */
798 +/*************************************************************/
799 +/*************************************************************/
800 +
801 +/* HCD operations */
802 +static irqreturn_t crisv10_hcd_top_irq(int irq, void*);
803 +static int crisv10_hcd_reset(struct usb_hcd *);
804 +static int crisv10_hcd_start(struct usb_hcd *);
805 +static void crisv10_hcd_stop(struct usb_hcd *);
806 +#ifdef CONFIG_PM
807 +static int crisv10_hcd_suspend(struct device *, u32, u32);
808 +static int crisv10_hcd_resume(struct device *, u32);
809 +#endif /* CONFIG_PM */
810 +static int crisv10_hcd_get_frame(struct usb_hcd *);
811 +
812 +//static int tc_urb_enqueue(struct usb_hcd *, struct usb_host_endpoint *ep, struct urb *, gfp_t mem_flags);
813 +static int tc_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags);
814 +//static int tc_urb_dequeue(struct usb_hcd *, struct urb *);
815 +static int tc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status);
816 +static void tc_endpoint_disable(struct usb_hcd *, struct usb_host_endpoint *ep);
817 +
818 +static int rh_status_data_request(struct usb_hcd *, char *);
819 +static int rh_control_request(struct usb_hcd *, u16, u16, u16, char*, u16);
820 +
821 +#ifdef CONFIG_PM
822 +static int crisv10_hcd_hub_suspend(struct usb_hcd *);
823 +static int crisv10_hcd_hub_resume(struct usb_hcd *);
824 +#endif /* CONFIG_PM */
825 +#ifdef CONFIG_USB_OTG
826 +static int crisv10_hcd_start_port_reset(struct usb_hcd *, unsigned);
827 +#endif /* CONFIG_USB_OTG */
828 +
829 +/* host controller driver interface */
830 +static const struct hc_driver crisv10_hc_driver =
831 + {
832 + .description = hc_name,
833 + .product_desc = product_desc,
834 + .hcd_priv_size = sizeof(struct crisv10_hcd),
835 +
836 + /* Attaching IRQ handler manualy in probe() */
837 + /* .irq = crisv10_hcd_irq, */
838 +
839 + .flags = HCD_USB11,
840 +
841 + /* called to init HCD and root hub */
842 + .reset = crisv10_hcd_reset,
843 + .start = crisv10_hcd_start,
844 +
845 + /* cleanly make HCD stop writing memory and doing I/O */
846 + .stop = crisv10_hcd_stop,
847 +
848 + /* return current frame number */
849 + .get_frame_number = crisv10_hcd_get_frame,
850 +
851 +
852 + /* Manage i/o requests via the Transfer Controller */
853 + .urb_enqueue = tc_urb_enqueue,
854 + .urb_dequeue = tc_urb_dequeue,
855 +
856 + /* hw synch, freeing endpoint resources that urb_dequeue can't */
857 + .endpoint_disable = tc_endpoint_disable,
858 +
859 +
860 + /* Root Hub support */
861 + .hub_status_data = rh_status_data_request,
862 + .hub_control = rh_control_request,
863 +#ifdef CONFIG_PM
864 + .hub_suspend = rh_suspend_request,
865 + .hub_resume = rh_resume_request,
866 +#endif /* CONFIG_PM */
867 +#ifdef CONFIG_USB_OTG
868 + .start_port_reset = crisv10_hcd_start_port_reset,
869 +#endif /* CONFIG_USB_OTG */
870 + };
871 +
872 +
873 +/*
874 + * conversion between pointers to a hcd and the corresponding
875 + * crisv10_hcd
876 + */
877 +
878 +static inline struct crisv10_hcd *hcd_to_crisv10_hcd(struct usb_hcd *hcd)
879 +{
880 + return (struct crisv10_hcd *) hcd->hcd_priv;
881 +}
882 +
883 +static inline struct usb_hcd *crisv10_hcd_to_hcd(struct crisv10_hcd *hcd)
884 +{
885 + return container_of((void *) hcd, struct usb_hcd, hcd_priv);
886 +}
887 +
888 +/* check if specified port is in use */
889 +static inline int port_in_use(unsigned int port)
890 +{
891 + return ports & (1 << port);
892 +}
893 +
894 +/* number of ports in use */
895 +static inline unsigned int num_ports(void)
896 +{
897 + unsigned int i, num = 0;
898 + for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
899 + if (port_in_use(i))
900 + num++;
901 + return num;
902 +}
903 +
904 +/* map hub port number to the port number used internally by the HC */
905 +static inline unsigned int map_port(unsigned int port)
906 +{
907 + unsigned int i, num = 0;
908 + for (i = 0; i < USB_ROOT_HUB_PORTS; i++)
909 + if (port_in_use(i))
910 + if (++num == port)
911 + return i;
912 + return -1;
913 +}
914 +
915 +/* size of descriptors in slab cache */
916 +#ifndef MAX
917 +#define MAX(x, y) ((x) > (y) ? (x) : (y))
918 +#endif
919 +
920 +
921 +/******************************************************************/
922 +/* Hardware Interrupt functions */
923 +/******************************************************************/
924 +
925 +/* Fast interrupt handler for HC */
926 +static irqreturn_t crisv10_hcd_top_irq(int irq, void *vcd)
927 +{
928 + struct usb_hcd *hcd = vcd;
929 + struct crisv10_irq_reg reg;
930 + __u32 irq_mask;
931 + unsigned long flags;
932 +
933 + DBFENTER;
934 +
935 + ASSERT(hcd != NULL);
936 + reg.hcd = hcd;
937 +
938 + /* Turn of other interrupts while handling these sensitive cases */
939 + local_irq_save(flags);
940 +
941 + /* Read out which interrupts that are flaged */
942 + irq_mask = *R_USB_IRQ_MASK_READ;
943 + reg.r_usb_irq_mask_read = irq_mask;
944 +
945 + /* Reading R_USB_STATUS clears the ctl_status interrupt. Note that
946 + R_USB_STATUS must be read before R_USB_EPID_ATTN since reading the latter
947 + clears the ourun and perror fields of R_USB_STATUS. */
948 + reg.r_usb_status = *R_USB_STATUS;
949 +
950 + /* Reading R_USB_EPID_ATTN clears the iso_eof, bulk_eot and epid_attn
951 + interrupts. */
952 + reg.r_usb_epid_attn = *R_USB_EPID_ATTN;
953 +
954 + /* Reading R_USB_RH_PORT_STATUS_1 and R_USB_RH_PORT_STATUS_2 clears the
955 + port_status interrupt. */
956 + reg.r_usb_rh_port_status_1 = *R_USB_RH_PORT_STATUS_1;
957 + reg.r_usb_rh_port_status_2 = *R_USB_RH_PORT_STATUS_2;
958 +
959 + /* Reading R_USB_FM_NUMBER clears the sof interrupt. */
960 + /* Note: the lower 11 bits contain the actual frame number, sent with each
961 + sof. */
962 + reg.r_usb_fm_number = *R_USB_FM_NUMBER;
963 +
964 + /* Interrupts are handled in order of priority. */
965 + if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, port_status)) {
966 + crisv10_hcd_port_status_irq(&reg);
967 + }
968 + if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, epid_attn)) {
969 + crisv10_hcd_epid_attn_irq(&reg);
970 + }
971 + if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, ctl_status)) {
972 + crisv10_hcd_ctl_status_irq(&reg);
973 + }
974 + if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, iso_eof)) {
975 + crisv10_hcd_isoc_eof_irq(&reg);
976 + }
977 + if (irq_mask & IO_MASK(R_USB_IRQ_MASK_READ, bulk_eot)) {
978 + /* Update/restart the bulk start timer since obviously the channel is
979 + running. */
980 + mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
981 + /* Update/restart the bulk eot timer since we just received an bulk eot
982 + interrupt. */
983 + mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
984 +
985 + /* Check for finished bulk transfers on epids */
986 + check_finished_bulk_tx_epids(hcd, 0);
987 + }
988 + local_irq_restore(flags);
989 +
990 + DBFEXIT;
991 + return IRQ_HANDLED;
992 +}
993 +
994 +
995 +void crisv10_hcd_epid_attn_irq(struct crisv10_irq_reg *reg) {
996 + struct usb_hcd *hcd = reg->hcd;
997 + struct crisv10_urb_priv *urb_priv;
998 + int epid;
999 + DBFENTER;
1000 +
1001 + for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
1002 + if (test_bit(epid, (void *)&reg->r_usb_epid_attn)) {
1003 + struct urb *urb;
1004 + __u32 ept_data;
1005 + int error_code;
1006 +
1007 + if (epid == DUMMY_EPID || epid == INVALID_EPID) {
1008 + /* We definitely don't care about these ones. Besides, they are
1009 + always disabled, so any possible disabling caused by the
1010 + epid attention interrupt is irrelevant. */
1011 + warn("Got epid_attn for INVALID_EPID or DUMMY_EPID (%d).", epid);
1012 + continue;
1013 + }
1014 +
1015 + if(!epid_inuse(epid)) {
1016 + irq_err("Epid attention on epid:%d that isn't in use\n", epid);
1017 + printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
1018 + debug_epid(epid);
1019 + continue;
1020 + }
1021 +
1022 + /* Note that although there are separate R_USB_EPT_DATA and
1023 + R_USB_EPT_DATA_ISO registers, they are located at the same address and
1024 + are of the same size. In other words, this read should be ok for isoc
1025 + also. */
1026 + ept_data = etrax_epid_get(epid);
1027 + error_code = IO_EXTRACT(R_USB_EPT_DATA, error_code, ept_data);
1028 +
1029 + /* Get the active URB for this epid. We blatantly assume
1030 + that only this URB could have caused the epid attention. */
1031 + urb = activeUrbList[epid];
1032 + if (urb == NULL) {
1033 + irq_err("Attention on epid:%d error:%d with no active URB.\n",
1034 + epid, error_code);
1035 + printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
1036 + debug_epid(epid);
1037 + continue;
1038 + }
1039 +
1040 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
1041 + ASSERT(urb_priv);
1042 +
1043 + /* Using IO_STATE_VALUE on R_USB_EPT_DATA should be ok for isoc also. */
1044 + if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
1045 +
1046 + /* Isoc traffic doesn't have error_count_in/error_count_out. */
1047 + if ((usb_pipetype(urb->pipe) != PIPE_ISOCHRONOUS) &&
1048 + (IO_EXTRACT(R_USB_EPT_DATA, error_count_in, ept_data) == 3 ||
1049 + IO_EXTRACT(R_USB_EPT_DATA, error_count_out, ept_data) == 3)) {
1050 + /* Check if URB allready is marked for late-finish, we can get
1051 + several 3rd error for Intr traffic when a device is unplugged */
1052 + if(urb_priv->later_data == NULL) {
1053 + /* 3rd error. */
1054 + irq_warn("3rd error for epid:%d (%s %s) URB:0x%x[%d]\n", epid,
1055 + str_dir(urb->pipe), str_type(urb->pipe),
1056 + (unsigned int)urb, urb_priv->urb_num);
1057 +
1058 + tc_finish_urb_later(hcd, urb, -EPROTO);
1059 + }
1060 +
1061 + } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
1062 + irq_warn("Perror for epid:%d\n", epid);
1063 + printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
1064 + printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
1065 + __dump_urb(urb);
1066 + debug_epid(epid);
1067 +
1068 + if (!(ept_data & IO_MASK(R_USB_EPT_DATA, valid))) {
1069 + /* invalid ep_id */
1070 + panic("Perror because of invalid epid."
1071 + " Deconfigured too early?");
1072 + } else {
1073 + /* past eof1, near eof, zout transfer, setup transfer */
1074 + /* Dump the urb and the relevant EP descriptor. */
1075 + panic("Something wrong with DMA descriptor contents."
1076 + " Too much traffic inserted?");
1077 + }
1078 + } else if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
1079 + /* buffer ourun */
1080 + printk("FM_NUMBER: %d\n", reg->r_usb_fm_number & 0x7ff);
1081 + printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
1082 + __dump_urb(urb);
1083 + debug_epid(epid);
1084 +
1085 + panic("Buffer overrun/underrun for epid:%d. DMA too busy?", epid);
1086 + } else {
1087 + irq_warn("Attention on epid:%d (%s %s) with no error code\n", epid,
1088 + str_dir(urb->pipe), str_type(urb->pipe));
1089 + printk("R_USB_STATUS: 0x%x\n", reg->r_usb_status);
1090 + __dump_urb(urb);
1091 + debug_epid(epid);
1092 + }
1093 +
1094 + } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
1095 + stall)) {
1096 + /* Not really a protocol error, just says that the endpoint gave
1097 + a stall response. Note that error_code cannot be stall for isoc. */
1098 + if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
1099 + panic("Isoc traffic cannot stall");
1100 + }
1101 +
1102 + tc_dbg("Stall for epid:%d (%s %s) URB:0x%x\n", epid,
1103 + str_dir(urb->pipe), str_type(urb->pipe), (unsigned int)urb);
1104 + tc_finish_urb(hcd, urb, -EPIPE);
1105 +
1106 + } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
1107 + bus_error)) {
1108 + /* Two devices responded to a transaction request. Must be resolved
1109 + by software. FIXME: Reset ports? */
1110 + panic("Bus error for epid %d."
1111 + " Two devices responded to transaction request\n",
1112 + epid);
1113 +
1114 + } else if (error_code == IO_STATE_VALUE(R_USB_EPT_DATA, error_code,
1115 + buffer_error)) {
1116 + /* DMA overrun or underrun. */
1117 + irq_warn("Buffer overrun/underrun for epid:%d (%s %s)\n", epid,
1118 + str_dir(urb->pipe), str_type(urb->pipe));
1119 +
1120 + /* It seems that error_code = buffer_error in
1121 + R_USB_EPT_DATA/R_USB_EPT_DATA_ISO and ourun = yes in R_USB_STATUS
1122 + are the same error. */
1123 + tc_finish_urb(hcd, urb, -EPROTO);
1124 + } else {
1125 + irq_warn("Unknown attention on epid:%d (%s %s)\n", epid,
1126 + str_dir(urb->pipe), str_type(urb->pipe));
1127 + dump_ept_data(epid);
1128 + }
1129 + }
1130 + }
1131 + DBFEXIT;
1132 +}
1133 +
1134 +void crisv10_hcd_port_status_irq(struct crisv10_irq_reg *reg)
1135 +{
1136 + __u16 port_reg[USB_ROOT_HUB_PORTS];
1137 + DBFENTER;
1138 + port_reg[0] = reg->r_usb_rh_port_status_1;
1139 + port_reg[1] = reg->r_usb_rh_port_status_2;
1140 + rh_port_status_change(port_reg);
1141 + DBFEXIT;
1142 +}
1143 +
1144 +void crisv10_hcd_isoc_eof_irq(struct crisv10_irq_reg *reg)
1145 +{
1146 + int epid;
1147 + struct urb *urb;
1148 + struct crisv10_urb_priv *urb_priv;
1149 +
1150 + DBFENTER;
1151 +
1152 + for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
1153 +
1154 + /* Only check epids that are in use, is valid and has SB list */
1155 + if (!epid_inuse(epid) || epid == INVALID_EPID ||
1156 + TxIsocEPList[epid].sub == 0 || epid == DUMMY_EPID) {
1157 + /* Nothing here to see. */
1158 + continue;
1159 + }
1160 + ASSERT(epid_isoc(epid));
1161 +
1162 + /* Get the active URB for this epid (if any). */
1163 + urb = activeUrbList[epid];
1164 + if (urb == 0) {
1165 + isoc_warn("Ignoring NULL urb for epid:%d\n", epid);
1166 + continue;
1167 + }
1168 + if(!epid_out_traffic(epid)) {
1169 + /* Sanity check. */
1170 + ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
1171 +
1172 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
1173 + ASSERT(urb_priv);
1174 +
1175 + if (urb_priv->urb_state == NOT_STARTED) {
1176 + /* If ASAP is not set and urb->start_frame is the current frame,
1177 + start the transfer. */
1178 + if (!(urb->transfer_flags & URB_ISO_ASAP) &&
1179 + (urb->start_frame == (*R_USB_FM_NUMBER & 0x7ff))) {
1180 + /* EP should not be enabled if we're waiting for start_frame */
1181 + ASSERT((TxIsocEPList[epid].command &
1182 + IO_STATE(USB_EP_command, enable, yes)) == 0);
1183 +
1184 + isoc_warn("Enabling isoc IN EP descr for epid %d\n", epid);
1185 + TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
1186 +
1187 + /* This urb is now active. */
1188 + urb_priv->urb_state = STARTED;
1189 + continue;
1190 + }
1191 + }
1192 + }
1193 + }
1194 +
1195 + DBFEXIT;
1196 +}
1197 +
1198 +void crisv10_hcd_ctl_status_irq(struct crisv10_irq_reg *reg)
1199 +{
1200 + struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(reg->hcd);
1201 +
1202 + DBFENTER;
1203 + ASSERT(crisv10_hcd);
1204 +
1205 + irq_dbg("ctr_status_irq, controller status: %s\n",
1206 + hcd_status_to_str(reg->r_usb_status));
1207 +
1208 + /* FIXME: What should we do if we get ourun or perror? Dump the EP and SB
1209 + list for the corresponding epid? */
1210 + if (reg->r_usb_status & IO_MASK(R_USB_STATUS, ourun)) {
1211 + panic("USB controller got ourun.");
1212 + }
1213 + if (reg->r_usb_status & IO_MASK(R_USB_STATUS, perror)) {
1214 +
1215 + /* Before, etrax_usb_do_intr_recover was called on this epid if it was
1216 + an interrupt pipe. I don't see how re-enabling all EP descriptors
1217 + will help if there was a programming error. */
1218 + panic("USB controller got perror.");
1219 + }
1220 +
1221 + /* Keep track of USB Controller, if it's running or not */
1222 + if(reg->r_usb_status & IO_STATE(R_USB_STATUS, running, yes)) {
1223 + crisv10_hcd->running = 1;
1224 + } else {
1225 + crisv10_hcd->running = 0;
1226 + }
1227 +
1228 + if (reg->r_usb_status & IO_MASK(R_USB_STATUS, device_mode)) {
1229 + /* We should never operate in device mode. */
1230 + panic("USB controller in device mode.");
1231 + }
1232 +
1233 + /* Set the flag to avoid getting "Unlink after no-IRQ? Controller is probably
1234 + using the wrong IRQ" from hcd_unlink_urb() in drivers/usb/core/hcd.c */
1235 + set_bit(HCD_FLAG_SAW_IRQ, &reg->hcd->flags);
1236 +
1237 + DBFEXIT;
1238 +}
1239 +
1240 +
1241 +/******************************************************************/
1242 +/* Host Controller interface functions */
1243 +/******************************************************************/
1244 +
1245 +static inline void crisv10_ready_wait(void) {
1246 + volatile int timeout = 10000;
1247 + /* Check the busy bit of USB controller in Etrax */
1248 + while((*R_USB_COMMAND & IO_MASK(R_USB_COMMAND, busy)) &&
1249 + (timeout-- > 0));
1250 + if(timeout == 0) {
1251 + warn("Timeout while waiting for USB controller to be idle\n");
1252 + }
1253 +}
1254 +
1255 +/* reset host controller */
1256 +static int crisv10_hcd_reset(struct usb_hcd *hcd)
1257 +{
1258 + DBFENTER;
1259 + hcd_dbg(hcd, "reset\n");
1260 +
1261 +
1262 + /* Reset the USB interface. */
1263 + /*
1264 + *R_USB_COMMAND =
1265 + IO_STATE(R_USB_COMMAND, port_sel, nop) |
1266 + IO_STATE(R_USB_COMMAND, port_cmd, reset) |
1267 + IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
1268 + nop();
1269 + */
1270 + DBFEXIT;
1271 + return 0;
1272 +}
1273 +
1274 +/* start host controller */
1275 +static int crisv10_hcd_start(struct usb_hcd *hcd)
1276 +{
1277 + DBFENTER;
1278 + hcd_dbg(hcd, "start\n");
1279 +
1280 + crisv10_ready_wait();
1281 +
1282 + /* Start processing of USB traffic. */
1283 + *R_USB_COMMAND =
1284 + IO_STATE(R_USB_COMMAND, port_sel, nop) |
1285 + IO_STATE(R_USB_COMMAND, port_cmd, reset) |
1286 + IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
1287 +
1288 + nop();
1289 +
1290 + hcd->state = HC_STATE_RUNNING;
1291 +
1292 + DBFEXIT;
1293 + return 0;
1294 +}
1295 +
1296 +/* stop host controller */
1297 +static void crisv10_hcd_stop(struct usb_hcd *hcd)
1298 +{
1299 + DBFENTER;
1300 + hcd_dbg(hcd, "stop\n");
1301 + crisv10_hcd_reset(hcd);
1302 + DBFEXIT;
1303 +}
1304 +
1305 +/* return the current frame number */
1306 +static int crisv10_hcd_get_frame(struct usb_hcd *hcd)
1307 +{
1308 + DBFENTER;
1309 + DBFEXIT;
1310 + return (*R_USB_FM_NUMBER & 0x7ff);
1311 +}
1312 +
1313 +#ifdef CONFIG_USB_OTG
1314 +
1315 +static int crisv10_hcd_start_port_reset(struct usb_hcd *hcd, unsigned port)
1316 +{
1317 + return 0; /* no-op for now */
1318 +}
1319 +
1320 +#endif /* CONFIG_USB_OTG */
1321 +
1322 +
1323 +/******************************************************************/
1324 +/* Root Hub functions */
1325 +/******************************************************************/
1326 +
1327 +/* root hub status */
1328 +static const struct usb_hub_status rh_hub_status =
1329 + {
1330 + .wHubStatus = 0,
1331 + .wHubChange = 0,
1332 + };
1333 +
1334 +/* root hub descriptor */
1335 +static const u8 rh_hub_descr[] =
1336 + {
1337 + 0x09, /* bDescLength */
1338 + 0x29, /* bDescriptorType */
1339 + USB_ROOT_HUB_PORTS, /* bNbrPorts */
1340 + 0x00, /* wHubCharacteristics */
1341 + 0x00,
1342 + 0x01, /* bPwrOn2pwrGood */
1343 + 0x00, /* bHubContrCurrent */
1344 + 0x00, /* DeviceRemovable */
1345 + 0xff /* PortPwrCtrlMask */
1346 + };
1347 +
1348 +/* Actual holder of root hub status*/
1349 +struct crisv10_rh rh;
1350 +
1351 +/* Initialize root hub data structures (called from dvdrv_hcd_probe()) */
1352 +int rh_init(void) {
1353 + int i;
1354 + /* Reset port status flags */
1355 + for (i = 0; i < USB_ROOT_HUB_PORTS; i++) {
1356 + rh.wPortChange[i] = 0;
1357 + rh.wPortStatusPrev[i] = 0;
1358 + }
1359 + return 0;
1360 +}
1361 +
1362 +#define RH_FEAT_MASK ((1<<USB_PORT_FEAT_CONNECTION)|\
1363 + (1<<USB_PORT_FEAT_ENABLE)|\
1364 + (1<<USB_PORT_FEAT_SUSPEND)|\
1365 + (1<<USB_PORT_FEAT_RESET))
1366 +
1367 +/* Handle port status change interrupt (called from bottom part interrupt) */
1368 +void rh_port_status_change(__u16 port_reg[]) {
1369 + int i;
1370 + __u16 wChange;
1371 +
1372 + for(i = 0; i < USB_ROOT_HUB_PORTS; i++) {
1373 + /* Xor out changes since last read, masked for important flags */
1374 + wChange = (port_reg[i] & RH_FEAT_MASK) ^ rh.wPortStatusPrev[i];
1375 + /* Or changes together with (if any) saved changes */
1376 + rh.wPortChange[i] |= wChange;
1377 + /* Save new status */
1378 + rh.wPortStatusPrev[i] = port_reg[i];
1379 +
1380 + if(wChange) {
1381 + rh_dbg("Interrupt port_status change port%d: %s Current-status:%s\n", i+1,
1382 + port_status_to_str(wChange),
1383 + port_status_to_str(port_reg[i]));
1384 + }
1385 + }
1386 +}
1387 +
1388 +/* Construct port status change bitmap for the root hub */
1389 +static int rh_status_data_request(struct usb_hcd *hcd, char *buf)
1390 +{
1391 + struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
1392 + unsigned int i;
1393 +
1394 +// DBFENTER;
1395 +
1396 + /*
1397 + * corresponds to hub status change EP (USB 2.0 spec section 11.13.4)
1398 + * return bitmap indicating ports with status change
1399 + */
1400 + *buf = 0;
1401 + spin_lock(&crisv10_hcd->lock);
1402 + for (i = 1; i <= crisv10_hcd->num_ports; i++) {
1403 + if (rh.wPortChange[map_port(i)]) {
1404 + *buf |= (1 << i);
1405 + rh_dbg("rh_status_data_request, change on port %d: %s Current Status: %s\n", i,
1406 + port_status_to_str(rh.wPortChange[map_port(i)]),
1407 + port_status_to_str(rh.wPortStatusPrev[map_port(i)]));
1408 + }
1409 + }
1410 + spin_unlock(&crisv10_hcd->lock);
1411 +
1412 +// DBFEXIT;
1413 +
1414 + return *buf == 0 ? 0 : 1;
1415 +}
1416 +
1417 +/* Handle a control request for the root hub (called from hcd_driver) */
1418 +static int rh_control_request(struct usb_hcd *hcd,
1419 + u16 typeReq,
1420 + u16 wValue,
1421 + u16 wIndex,
1422 + char *buf,
1423 + u16 wLength) {
1424 +
1425 + struct crisv10_hcd *crisv10_hcd = hcd_to_crisv10_hcd(hcd);
1426 + int retval = 0;
1427 + int len;
1428 + DBFENTER;
1429 +
1430 + switch (typeReq) {
1431 + case GetHubDescriptor:
1432 + rh_dbg("GetHubDescriptor\n");
1433 + len = min_t(unsigned int, sizeof rh_hub_descr, wLength);
1434 + memcpy(buf, rh_hub_descr, len);
1435 + buf[2] = crisv10_hcd->num_ports;
1436 + break;
1437 + case GetHubStatus:
1438 + rh_dbg("GetHubStatus\n");
1439 + len = min_t(unsigned int, sizeof rh_hub_status, wLength);
1440 + memcpy(buf, &rh_hub_status, len);
1441 + break;
1442 + case GetPortStatus:
1443 + if (!wIndex || wIndex > crisv10_hcd->num_ports)
1444 + goto error;
1445 + rh_dbg("GetportStatus, port:%d change:%s status:%s\n", wIndex,
1446 + port_status_to_str(rh.wPortChange[map_port(wIndex)]),
1447 + port_status_to_str(rh.wPortStatusPrev[map_port(wIndex)]));
1448 + *(u16 *) buf = cpu_to_le16(rh.wPortStatusPrev[map_port(wIndex)]);
1449 + *(u16 *) (buf + 2) = cpu_to_le16(rh.wPortChange[map_port(wIndex)]);
1450 + break;
1451 + case SetHubFeature:
1452 + rh_dbg("SetHubFeature\n");
1453 + case ClearHubFeature:
1454 + rh_dbg("ClearHubFeature\n");
1455 + switch (wValue) {
1456 + case C_HUB_OVER_CURRENT:
1457 + case C_HUB_LOCAL_POWER:
1458 + rh_warn("Not implemented hub request:%d \n", typeReq);
1459 + /* not implemented */
1460 + break;
1461 + default:
1462 + goto error;
1463 + }
1464 + break;
1465 + case SetPortFeature:
1466 + if (!wIndex || wIndex > crisv10_hcd->num_ports)
1467 + goto error;
1468 + if(rh_set_port_feature(map_port(wIndex), wValue))
1469 + goto error;
1470 + break;
1471 + case ClearPortFeature:
1472 + if (!wIndex || wIndex > crisv10_hcd->num_ports)
1473 + goto error;
1474 + if(rh_clear_port_feature(map_port(wIndex), wValue))
1475 + goto error;
1476 + break;
1477 + default:
1478 + rh_warn("Unknown hub request: %d\n", typeReq);
1479 + error:
1480 + retval = -EPIPE;
1481 + }
1482 + DBFEXIT;
1483 + return retval;
1484 +}
1485 +
1486 +int rh_set_port_feature(__u8 bPort, __u16 wFeature) {
1487 + __u8 bUsbCommand = 0;
1488 + switch(wFeature) {
1489 + case USB_PORT_FEAT_RESET:
1490 + rh_dbg("SetPortFeature: reset\n");
1491 + bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, reset);
1492 + goto set;
1493 + break;
1494 + case USB_PORT_FEAT_SUSPEND:
1495 + rh_dbg("SetPortFeature: suspend\n");
1496 + bUsbCommand |= IO_STATE(R_USB_COMMAND, port_cmd, suspend);
1497 + goto set;
1498 + break;
1499 + case USB_PORT_FEAT_POWER:
1500 + rh_dbg("SetPortFeature: power\n");
1501 + break;
1502 + case USB_PORT_FEAT_C_CONNECTION:
1503 + rh_dbg("SetPortFeature: c_connection\n");
1504 + break;
1505 + case USB_PORT_FEAT_C_RESET:
1506 + rh_dbg("SetPortFeature: c_reset\n");
1507 + break;
1508 + case USB_PORT_FEAT_C_OVER_CURRENT:
1509 + rh_dbg("SetPortFeature: c_over_current\n");
1510 + break;
1511 +
1512 + set:
1513 + /* Select which port via the port_sel field */
1514 + bUsbCommand |= IO_FIELD(R_USB_COMMAND, port_sel, bPort+1);
1515 +
1516 + /* Make sure the controller isn't busy. */
1517 + crisv10_ready_wait();
1518 + /* Send out the actual command to the USB controller */
1519 + *R_USB_COMMAND = bUsbCommand;
1520 +
1521 + /* If port reset then also bring USB controller into running state */
1522 + if(wFeature == USB_PORT_FEAT_RESET) {
1523 + /* Wait a while for controller to first become started after port reset */
1524 + udelay(12000); /* 12ms blocking wait */
1525 +
1526 + /* Make sure the controller isn't busy. */
1527 + crisv10_ready_wait();
1528 +
1529 + /* If all enabled ports were disabled the host controller goes down into
1530 + started mode, so we need to bring it back into the running state.
1531 + (This is safe even if it's already in the running state.) */
1532 + *R_USB_COMMAND =
1533 + IO_STATE(R_USB_COMMAND, port_sel, nop) |
1534 + IO_STATE(R_USB_COMMAND, port_cmd, reset) |
1535 + IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
1536 + }
1537 +
1538 + break;
1539 + default:
1540 + rh_dbg("SetPortFeature: unknown feature\n");
1541 + return -1;
1542 + }
1543 + return 0;
1544 +}
1545 +
1546 +int rh_clear_port_feature(__u8 bPort, __u16 wFeature) {
1547 + switch(wFeature) {
1548 + case USB_PORT_FEAT_ENABLE:
1549 + rh_dbg("ClearPortFeature: enable\n");
1550 + rh_disable_port(bPort);
1551 + break;
1552 + case USB_PORT_FEAT_SUSPEND:
1553 + rh_dbg("ClearPortFeature: suspend\n");
1554 + break;
1555 + case USB_PORT_FEAT_POWER:
1556 + rh_dbg("ClearPortFeature: power\n");
1557 + break;
1558 +
1559 + case USB_PORT_FEAT_C_ENABLE:
1560 + rh_dbg("ClearPortFeature: c_enable\n");
1561 + goto clear;
1562 + case USB_PORT_FEAT_C_SUSPEND:
1563 + rh_dbg("ClearPortFeature: c_suspend\n");
1564 + goto clear;
1565 + case USB_PORT_FEAT_C_CONNECTION:
1566 + rh_dbg("ClearPortFeature: c_connection\n");
1567 + goto clear;
1568 + case USB_PORT_FEAT_C_OVER_CURRENT:
1569 + rh_dbg("ClearPortFeature: c_over_current\n");
1570 + goto clear;
1571 + case USB_PORT_FEAT_C_RESET:
1572 + rh_dbg("ClearPortFeature: c_reset\n");
1573 + goto clear;
1574 + clear:
1575 + rh.wPortChange[bPort] &= ~(1 << (wFeature - 16));
1576 + break;
1577 + default:
1578 + rh_dbg("ClearPortFeature: unknown feature\n");
1579 + return -1;
1580 + }
1581 + return 0;
1582 +}
1583 +
1584 +
1585 +#ifdef CONFIG_PM
1586 +/* Handle a suspend request for the root hub (called from hcd_driver) */
1587 +static int rh_suspend_request(struct usb_hcd *hcd)
1588 +{
1589 + return 0; /* no-op for now */
1590 +}
1591 +
1592 +/* Handle a resume request for the root hub (called from hcd_driver) */
1593 +static int rh_resume_request(struct usb_hcd *hcd)
1594 +{
1595 + return 0; /* no-op for now */
1596 +}
1597 +#endif /* CONFIG_PM */
1598 +
1599 +
1600 +
1601 +/* Wrapper function for workaround port disable registers in USB controller */
1602 +static void rh_disable_port(unsigned int port) {
1603 + volatile int timeout = 10000;
1604 + volatile char* usb_portx_disable;
1605 + switch(port) {
1606 + case 0:
1607 + usb_portx_disable = R_USB_PORT1_DISABLE;
1608 + break;
1609 + case 1:
1610 + usb_portx_disable = R_USB_PORT2_DISABLE;
1611 + break;
1612 + default:
1613 + /* Invalid port index */
1614 + return;
1615 + }
1616 + /* Set disable flag in special register */
1617 + *usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
1618 + /* Wait until not enabled anymore */
1619 + while((rh.wPortStatusPrev[port] &
1620 + IO_STATE(R_USB_RH_PORT_STATUS_1, enabled, yes)) &&
1621 + (timeout-- > 0));
1622 + if(timeout == 0) {
1623 + warn("Timeout while waiting for port %d to become disabled\n", port);
1624 + }
1625 + /* clear disable flag in special register */
1626 + *usb_portx_disable = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
1627 + rh_info("Physical port %d disabled\n", port+1);
1628 +}
1629 +
1630 +
1631 +/******************************************************************/
1632 +/* Transfer Controller (TC) functions */
1633 +/******************************************************************/
1634 +
1635 +/* FIXME: Should RX_BUF_SIZE be a config option, or maybe we should adjust it
1636 + dynamically?
1637 + To adjust it dynamically we would have to get an interrupt when we reach
1638 + the end of the rx descriptor list, or when we get close to the end, and
1639 + then allocate more descriptors. */
1640 +#define NBR_OF_RX_DESC 512
1641 +#define RX_DESC_BUF_SIZE 1024
1642 +#define RX_BUF_SIZE (NBR_OF_RX_DESC * RX_DESC_BUF_SIZE)
1643 +
1644 +
1645 +/* Local variables for Transfer Controller */
1646 +/* --------------------------------------- */
1647 +
1648 +/* This is a circular (double-linked) list of the active urbs for each epid.
1649 + The head is never removed, and new urbs are linked onto the list as
1650 + urb_entry_t elements. Don't reference urb_list directly; use the wrapper
1651 + functions instead (which includes spin_locks) */
1652 +static struct list_head urb_list[NBR_OF_EPIDS];
1653 +
1654 +/* Read about the need and usage of this lock in submit_ctrl_urb. */
1655 +/* Lock for URB lists for each EPID */
1656 +static spinlock_t urb_list_lock;
1657 +
1658 +/* Lock for EPID array register (R_USB_EPT_x) in Etrax */
1659 +static spinlock_t etrax_epid_lock;
1660 +
1661 +/* Lock for dma8 sub0 handling */
1662 +static spinlock_t etrax_dma8_sub0_lock;
1663 +
1664 +/* DMA IN cache bug. Align the DMA IN buffers to 32 bytes, i.e. a cache line.
1665 + Since RX_DESC_BUF_SIZE is 1024 is a multiple of 32, all rx buffers will be
1666 + cache aligned. */
1667 +static volatile unsigned char RxBuf[RX_BUF_SIZE] __attribute__ ((aligned (32)));
1668 +static volatile struct USB_IN_Desc RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned (4)));
1669 +
1670 +/* Pointers into RxDescList. */
1671 +static volatile struct USB_IN_Desc *myNextRxDesc;
1672 +static volatile struct USB_IN_Desc *myLastRxDesc;
1673 +
1674 +/* A zout transfer makes a memory access at the address of its buf pointer,
1675 + which means that setting this buf pointer to 0 will cause an access to the
1676 + flash. In addition to this, setting sw_len to 0 results in a 16/32 bytes
1677 + (depending on DMA burst size) transfer.
1678 + Instead, we set it to 1, and point it to this buffer. */
1679 +static int zout_buffer[4] __attribute__ ((aligned (4)));
1680 +
1681 +/* Cache for allocating new EP and SB descriptors. */
1682 +//static kmem_cache_t *usb_desc_cache;
1683 +static struct kmem_cache *usb_desc_cache;
1684 +
1685 +/* Cache for the data allocated in the isoc descr top half. */
1686 +//static kmem_cache_t *isoc_compl_cache;
1687 +static struct kmem_cache *isoc_compl_cache;
1688 +
1689 +/* Cache for the data allocated when delayed finishing of URBs */
1690 +//static kmem_cache_t *later_data_cache;
1691 +static struct kmem_cache *later_data_cache;
1692 +
1693 +/* Counter to keep track of how many Isoc EP we have sat up. Used to enable
1694 + and disable iso_eof interrupt. We only need these interrupts when we have
1695 + Isoc data endpoints (consumes CPU cycles).
1696 + FIXME: This could be more fine granular, so this interrupt is only enabled
1697 + when we have a In Isoc URB not URB_ISO_ASAP flaged queued. */
1698 +static int isoc_epid_counter;
1699 +
1700 +/* Protecting wrapper functions for R_USB_EPT_x */
1701 +/* -------------------------------------------- */
1702 +static inline void etrax_epid_set(__u8 index, __u32 data) {
1703 + unsigned long flags;
1704 + spin_lock_irqsave(&etrax_epid_lock, flags);
1705 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
1706 + nop();
1707 + *R_USB_EPT_DATA = data;
1708 + spin_unlock_irqrestore(&etrax_epid_lock, flags);
1709 +}
1710 +
1711 +static inline void etrax_epid_clear_error(__u8 index) {
1712 + unsigned long flags;
1713 + spin_lock_irqsave(&etrax_epid_lock, flags);
1714 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
1715 + nop();
1716 + *R_USB_EPT_DATA &=
1717 + ~(IO_MASK(R_USB_EPT_DATA, error_count_in) |
1718 + IO_MASK(R_USB_EPT_DATA, error_count_out) |
1719 + IO_MASK(R_USB_EPT_DATA, error_code));
1720 + spin_unlock_irqrestore(&etrax_epid_lock, flags);
1721 +}
1722 +
1723 +static inline void etrax_epid_set_toggle(__u8 index, __u8 dirout,
1724 + __u8 toggle) {
1725 + unsigned long flags;
1726 + spin_lock_irqsave(&etrax_epid_lock, flags);
1727 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
1728 + nop();
1729 + if(dirout) {
1730 + *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_out);
1731 + *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_out, toggle);
1732 + } else {
1733 + *R_USB_EPT_DATA &= ~IO_MASK(R_USB_EPT_DATA, t_in);
1734 + *R_USB_EPT_DATA |= IO_FIELD(R_USB_EPT_DATA, t_in, toggle);
1735 + }
1736 + spin_unlock_irqrestore(&etrax_epid_lock, flags);
1737 +}
1738 +
1739 +static inline __u8 etrax_epid_get_toggle(__u8 index, __u8 dirout) {
1740 + unsigned long flags;
1741 + __u8 toggle;
1742 + spin_lock_irqsave(&etrax_epid_lock, flags);
1743 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
1744 + nop();
1745 + if (dirout) {
1746 + toggle = IO_EXTRACT(R_USB_EPT_DATA, t_out, *R_USB_EPT_DATA);
1747 + } else {
1748 + toggle = IO_EXTRACT(R_USB_EPT_DATA, t_in, *R_USB_EPT_DATA);
1749 + }
1750 + spin_unlock_irqrestore(&etrax_epid_lock, flags);
1751 + return toggle;
1752 +}
1753 +
1754 +
1755 +static inline __u32 etrax_epid_get(__u8 index) {
1756 + unsigned long flags;
1757 + __u32 data;
1758 + spin_lock_irqsave(&etrax_epid_lock, flags);
1759 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, index);
1760 + nop();
1761 + data = *R_USB_EPT_DATA;
1762 + spin_unlock_irqrestore(&etrax_epid_lock, flags);
1763 + return data;
1764 +}
1765 +
1766 +
1767 +
1768 +
1769 +/* Main functions for Transfer Controller */
1770 +/* -------------------------------------- */
1771 +
1772 +/* Init structs, memories and lists used by Transfer Controller */
1773 +int tc_init(struct usb_hcd *hcd) {
1774 + int i;
1775 + /* Clear software state info for all epids */
1776 + memset(epid_state, 0, sizeof(struct etrax_epid) * NBR_OF_EPIDS);
1777 +
1778 + /* Set Invalid and Dummy as being in use and disabled */
1779 + epid_state[INVALID_EPID].inuse = 1;
1780 + epid_state[DUMMY_EPID].inuse = 1;
1781 + epid_state[INVALID_EPID].disabled = 1;
1782 + epid_state[DUMMY_EPID].disabled = 1;
1783 +
1784 + /* Clear counter for how many Isoc epids we have sat up */
1785 + isoc_epid_counter = 0;
1786 +
1787 + /* Initialize the urb list by initiating a head for each list.
1788 + Also reset list hodling active URB for each epid */
1789 + for (i = 0; i < NBR_OF_EPIDS; i++) {
1790 + INIT_LIST_HEAD(&urb_list[i]);
1791 + activeUrbList[i] = NULL;
1792 + }
1793 +
1794 + /* Init lock for URB lists */
1795 + spin_lock_init(&urb_list_lock);
1796 + /* Init lock for Etrax R_USB_EPT register */
1797 + spin_lock_init(&etrax_epid_lock);
1798 + /* Init lock for Etrax dma8 sub0 handling */
1799 + spin_lock_init(&etrax_dma8_sub0_lock);
1800 +
1801 + /* We use kmem_cache_* to make sure that all DMA desc. are dword aligned */
1802 +
1803 + /* Note that we specify sizeof(struct USB_EP_Desc) as the size, but also
1804 + allocate SB descriptors from this cache. This is ok since
1805 + sizeof(struct USB_EP_Desc) == sizeof(struct USB_SB_Desc). */
1806 +// usb_desc_cache = kmem_cache_create("usb_desc_cache",
1807 +// sizeof(struct USB_EP_Desc), 0,
1808 +// SLAB_HWCACHE_ALIGN, 0, 0);
1809 + usb_desc_cache = kmem_cache_create(
1810 + "usb_desc_cache",
1811 + sizeof(struct USB_EP_Desc),
1812 + 0,
1813 + SLAB_HWCACHE_ALIGN,
1814 + NULL);
1815 + if(usb_desc_cache == NULL) {
1816 + return -ENOMEM;
1817 + }
1818 +
1819 + /* Create slab cache for speedy allocation of memory for isoc bottom-half
1820 + interrupt handling */
1821 +// isoc_compl_cache =
1822 +// kmem_cache_create("isoc_compl_cache",
1823 +// sizeof(struct crisv10_isoc_complete_data),
1824 +// 0, SLAB_HWCACHE_ALIGN, 0, 0);
1825 + isoc_compl_cache = kmem_cache_create(
1826 + "isoc_compl_cache",
1827 + sizeof(struct crisv10_isoc_complete_data),
1828 + 0,
1829 + SLAB_HWCACHE_ALIGN,
1830 + NULL
1831 + );
1832 +
1833 + if(isoc_compl_cache == NULL) {
1834 + return -ENOMEM;
1835 + }
1836 +
1837 + /* Create slab cache for speedy allocation of memory for later URB finish
1838 + struct */
1839 +// later_data_cache =
1840 +// kmem_cache_create("later_data_cache",
1841 +// sizeof(struct urb_later_data),
1842 +// 0, SLAB_HWCACHE_ALIGN, 0, 0);
1843 +
1844 + later_data_cache = kmem_cache_create(
1845 + "later_data_cache",
1846 + sizeof(struct urb_later_data),
1847 + 0,
1848 + SLAB_HWCACHE_ALIGN,
1849 + NULL
1850 + );
1851 +
1852 + if(later_data_cache == NULL) {
1853 + return -ENOMEM;
1854 + }
1855 +
1856 +
1857 + /* Initiate the bulk start timer. */
1858 + init_timer(&bulk_start_timer);
1859 + bulk_start_timer.expires = jiffies + BULK_START_TIMER_INTERVAL;
1860 + bulk_start_timer.function = tc_bulk_start_timer_func;
1861 + add_timer(&bulk_start_timer);
1862 +
1863 +
1864 + /* Initiate the bulk eot timer. */
1865 + init_timer(&bulk_eot_timer);
1866 + bulk_eot_timer.expires = jiffies + BULK_EOT_TIMER_INTERVAL;
1867 + bulk_eot_timer.function = tc_bulk_eot_timer_func;
1868 + bulk_eot_timer.data = (unsigned long)hcd;
1869 + add_timer(&bulk_eot_timer);
1870 +
1871 + return 0;
1872 +}
1873 +
1874 +/* Uninitialize all resources used by Transfer Controller */
1875 +void tc_destroy(void) {
1876 +
1877 + /* Destroy all slab cache */
1878 + kmem_cache_destroy(usb_desc_cache);
1879 + kmem_cache_destroy(isoc_compl_cache);
1880 + kmem_cache_destroy(later_data_cache);
1881 +
1882 + /* Remove timers */
1883 + del_timer(&bulk_start_timer);
1884 + del_timer(&bulk_eot_timer);
1885 +}
1886 +
1887 +static void restart_dma8_sub0(void) {
1888 + unsigned long flags;
1889 + spin_lock_irqsave(&etrax_dma8_sub0_lock, flags);
1890 + /* Verify that the dma is not running */
1891 + if ((*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd)) == 0) {
1892 + struct USB_EP_Desc *ep = (struct USB_EP_Desc *)phys_to_virt(*R_DMA_CH8_SUB0_EP);
1893 + while (DUMMY_EPID == IO_EXTRACT(USB_EP_command, epid, ep->command)) {
1894 + ep = (struct USB_EP_Desc *)phys_to_virt(ep->next);
1895 + }
1896 + /* Advance the DMA to the next EP descriptor that is not a DUMMY_EPID.
1897 + * ep->next is already a physical address. virt_to_phys is needed, see
1898 + * http://mhonarc.axis.se/dev-etrax/msg08630.html
1899 + */
1900 + //*R_DMA_CH8_SUB0_EP = ep->next;
1901 + *R_DMA_CH8_SUB0_EP = virt_to_phys(ep);
1902 + /* Restart the DMA */
1903 + *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start);
1904 + }
1905 + spin_unlock_irqrestore(&etrax_dma8_sub0_lock, flags);
1906 +}
1907 +
1908 +/* queue an URB with the transfer controller (called from hcd_driver) */
1909 +//static int tc_urb_enqueue(struct usb_hcd *hcd,
1910 +// struct usb_host_endpoint *ep,
1911 +// struct urb *urb,
1912 +// gfp_t mem_flags) {
1913 +static int tc_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1914 +{
1915 + int epid;
1916 + int retval;
1917 +// int bustime = 0;
1918 + int maxpacket;
1919 + unsigned long flags;
1920 + struct crisv10_urb_priv *urb_priv;
1921 + struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
1922 + DBFENTER;
1923 +
1924 + if(!(crisv10_hcd->running)) {
1925 + /* The USB Controller is not running, probably because no device is
1926 + attached. No idea to enqueue URBs then */
1927 + tc_warn("Rejected enqueueing of URB:0x%x because no dev attached\n",
1928 + (unsigned int)urb);
1929 + return -ENOENT;
1930 + }
1931 +
1932 + maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
1933 +
1934 + /* hinko ignore usb_pipeisoc */
1935 +#if 0
1936 + /* Special case check for In Isoc transfers. Specification states that each
1937 + In Isoc transfer consists of one packet and therefore it should fit into
1938 + the transfer-buffer of an URB.
1939 + We do the check here to be sure (an invalid scenario can be produced with
1940 + parameters to the usbtest suite) */
1941 + if(usb_pipeisoc(urb->pipe) && usb_pipein(urb->pipe) &&
1942 + (urb->transfer_buffer_length < maxpacket)) {
1943 + tc_err("Submit In Isoc URB with buffer length:%d to pipe with maxpacketlen: %d\n", urb->transfer_buffer_length, maxpacket);
1944 + return -EMSGSIZE;
1945 + }
1946 +
1947 + /* Check if there is enough bandwidth for periodic transfer */
1948 + if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe)) {
1949 + /* only check (and later claim) if not already claimed */
1950 + if (urb->bandwidth == 0) {
1951 + bustime = usb_check_bandwidth(urb->dev, urb);
1952 + if (bustime < 0) {
1953 + tc_err("Not enough periodic bandwidth\n");
1954 + return -ENOSPC;
1955 + }
1956 + }
1957 + }
1958 +#endif
1959 +
1960 + /* Check if there is a epid for URBs destination, if not this function
1961 + set up one. */
1962 + //epid = tc_setup_epid(ep, urb, mem_flags);
1963 + epid = tc_setup_epid(urb, mem_flags);
1964 + if (epid < 0) {
1965 + tc_err("Failed setup epid:%d for URB:0x%x\n", epid, (unsigned int)urb);
1966 + DBFEXIT;
1967 + return -ENOMEM;
1968 + }
1969 +
1970 + if(urb == activeUrbList[epid]) {
1971 + tc_err("Resubmition of allready active URB:0x%x\n", (unsigned int)urb);
1972 + return -ENXIO;
1973 + }
1974 +
1975 + if(urb_list_entry(urb, epid)) {
1976 + tc_err("Resubmition of allready queued URB:0x%x\n", (unsigned int)urb);
1977 + return -ENXIO;
1978 + }
1979 +
1980 + /* If we actively have flaged endpoint as disabled then refuse submition */
1981 + if(epid_state[epid].disabled) {
1982 + return -ENOENT;
1983 + }
1984 +
1985 + /* Allocate and init HC-private data for URB */
1986 + if(urb_priv_create(hcd, urb, epid, mem_flags) != 0) {
1987 + DBFEXIT;
1988 + return -ENOMEM;
1989 + }
1990 + urb_priv = urb->hcpriv;
1991 +
1992 + tc_dbg("Enqueue URB:0x%x[%d] epid:%d (%s) bufflen:%d\n",
1993 + (unsigned int)urb, urb_priv->urb_num, epid,
1994 + pipe_to_str(urb->pipe), urb->transfer_buffer_length);
1995 +
1996 + /* Create and link SBs required for this URB */
1997 + retval = create_sb_for_urb(urb, mem_flags);
1998 + if(retval != 0) {
1999 + tc_err("Failed to create SBs for URB:0x%x[%d]\n", (unsigned int)urb,
2000 + urb_priv->urb_num);
2001 + urb_priv_free(hcd, urb);
2002 + DBFEXIT;
2003 + return retval;
2004 + }
2005 +
2006 + /* Init intr EP pool if this URB is a INTR transfer. This pool is later
2007 + used when inserting EPs in the TxIntrEPList. We do the alloc here
2008 + so we can't run out of memory later */
2009 + if(usb_pipeint(urb->pipe)) {
2010 + retval = init_intr_urb(urb, mem_flags);
2011 + if(retval != 0) {
2012 + tc_warn("Failed to init Intr URB\n");
2013 + urb_priv_free(hcd, urb);
2014 + DBFEXIT;
2015 + return retval;
2016 + }
2017 + }
2018 +
2019 + /* Disable other access when inserting USB */
2020 +
2021 + /* BUG on sleeping inside int disabled if using local_irq_save/local_irq_restore
2022 + * her - because urb_list_add() and tc_dma_process_queue() save irqs again !??!
2023 + */
2024 +// local_irq_save(flags);
2025 +
2026 + /* hinko ignore usb_pipeisoc */
2027 +#if 0
2028 + /* Claim bandwidth, if needed */
2029 + if(bustime) {
2030 + usb_claim_bandwidth(urb->dev, urb, bustime, 0);
2031 + }
2032 +
2033 + /* Add URB to EP queue */
2034 + urb_list_add(urb, epid, mem_flags);
2035 +
2036 + if(usb_pipeisoc(urb->pipe)) {
2037 + /* Special processing of Isoc URBs. */
2038 + tc_dma_process_isoc_urb(urb);
2039 + } else {
2040 + /* Process EP queue for rest of the URB types (Bulk, Ctrl, Intr) */
2041 + tc_dma_process_queue(epid);
2042 + }
2043 +#endif
2044 + /* Add URB to EP queue */
2045 + urb_list_add(urb, epid, mem_flags);
2046 +
2047 + /*hinko link/unlink urb -> ep */
2048 + spin_lock_irqsave(&crisv10_hcd->lock, flags);
2049 + //spin_lock(&crisv10_hcd->lock);
2050 + retval = usb_hcd_link_urb_to_ep(hcd, urb);
2051 + if (retval) {
2052 + spin_unlock_irqrestore(&crisv10_hcd->lock, flags);
2053 + tc_warn("Failed to link urb to ep\n");
2054 + urb_priv_free(hcd, urb);
2055 + DBFEXIT;
2056 + return retval;
2057 + }
2058 + spin_unlock_irqrestore(&crisv10_hcd->lock, flags);
2059 + //spin_unlock(&crisv10_hcd->lock);
2060 +
2061 + /* Process EP queue for rest of the URB types (Bulk, Ctrl, Intr) */
2062 + tc_dma_process_queue(epid);
2063 +
2064 +// local_irq_restore(flags);
2065 +
2066 + DBFEXIT;
2067 + return 0;
2068 +}
2069 +
2070 +/* remove an URB from the transfer controller queues (called from hcd_driver)*/
2071 +//static int tc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
2072 +static int tc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
2073 +{
2074 + struct crisv10_urb_priv *urb_priv;
2075 + unsigned long flags;
2076 + int epid;
2077 +
2078 + DBFENTER;
2079 + /* Disable interrupts here since a descriptor interrupt for the isoc epid
2080 + will modify the sb list. This could possibly be done more granular, but
2081 + urb_dequeue should not be used frequently anyway.
2082 + */
2083 + local_irq_save(flags);
2084 +
2085 + urb_priv = urb->hcpriv;
2086 +
2087 + if (!urb_priv) {
2088 + /* This happens if a device driver calls unlink on an urb that
2089 + was never submitted (lazy driver) or if the urb was completed
2090 + while dequeue was being called. */
2091 + tc_warn("Dequeing of not enqueued URB:0x%x\n", (unsigned int)urb);
2092 + local_irq_restore(flags);
2093 + return 0;
2094 + }
2095 + epid = urb_priv->epid;
2096 +
2097 + tc_warn("Dequeing %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
2098 + (urb == activeUrbList[epid]) ? "active" : "queued",
2099 + (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
2100 + str_type(urb->pipe), epid, urb->status,
2101 + (urb_priv->later_data) ? "later-sched" : "");
2102 +
2103 + /* For Bulk, Ctrl and Intr are only one URB active at a time. So any URB
2104 + that isn't active can be dequeued by just removing it from the queue */
2105 + if(usb_pipebulk(urb->pipe) || usb_pipecontrol(urb->pipe) ||
2106 + usb_pipeint(urb->pipe)) {
2107 +
2108 + /* Check if URB haven't gone further than the queue */
2109 + if(urb != activeUrbList[epid]) {
2110 + ASSERT(urb_priv->later_data == NULL);
2111 + tc_warn("Dequeing URB:0x%x[%d] (%s %s epid:%d) from queue"
2112 + " (not active)\n", (unsigned int)urb, urb_priv->urb_num,
2113 + str_dir(urb->pipe), str_type(urb->pipe), epid);
2114 +
2115 + /* Finish the URB with error status from USB core */
2116 + tc_finish_urb(hcd, urb, urb->status);
2117 + local_irq_restore(flags);
2118 + return 0;
2119 + }
2120 + }
2121 +
2122 + /* Set URB status to Unlink for handling when interrupt comes. */
2123 + urb_priv->urb_state = UNLINK;
2124 +
2125 + /* Differentiate dequeing of Bulk and Ctrl from Isoc and Intr */
2126 + switch(usb_pipetype(urb->pipe)) {
2127 + case PIPE_BULK:
2128 + /* Check if EP still is enabled */
2129 + if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2130 + /* The EP was enabled, disable it. */
2131 + TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2132 + }
2133 + /* Kicking dummy list out of the party. */
2134 + TxBulkEPList[epid].next = virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
2135 + break;
2136 + case PIPE_CONTROL:
2137 + /* Check if EP still is enabled */
2138 + if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2139 + /* The EP was enabled, disable it. */
2140 + TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2141 + }
2142 + break;
2143 + case PIPE_ISOCHRONOUS:
2144 + /* Disabling, busy-wait and unlinking of Isoc SBs will be done in
2145 + finish_isoc_urb(). Because there might the case when URB is dequeued
2146 + but there are other valid URBs waiting */
2147 +
2148 + /* Check if In Isoc EP still is enabled */
2149 + if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2150 + /* The EP was enabled, disable it. */
2151 + TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2152 + }
2153 + break;
2154 + case PIPE_INTERRUPT:
2155 + /* Special care is taken for interrupt URBs. EPs are unlinked in
2156 + tc_finish_urb */
2157 + break;
2158 + default:
2159 + break;
2160 + }
2161 +
2162 + /* Asynchronous unlink, finish the URB later from scheduled or other
2163 + event (data finished, error) */
2164 + tc_finish_urb_later(hcd, urb, urb->status);
2165 +
2166 + local_irq_restore(flags);
2167 + DBFEXIT;
2168 + return 0;
2169 +}
2170 +
2171 +
2172 +static void tc_sync_finish_epid(struct usb_hcd *hcd, int epid) {
2173 + volatile int timeout = 10000;
2174 + struct urb* urb;
2175 + struct crisv10_urb_priv* urb_priv;
2176 + unsigned long flags;
2177 +
2178 + volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
2179 + volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
2180 + volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
2181 +
2182 + int type = epid_state[epid].type;
2183 +
2184 + /* Setting this flag will cause enqueue() to return -ENOENT for new
2185 + submitions on this endpoint and finish_urb() wont process queue further */
2186 + epid_state[epid].disabled = 1;
2187 +
2188 + switch(type) {
2189 + case PIPE_BULK:
2190 + /* Check if EP still is enabled */
2191 + if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2192 + /* The EP was enabled, disable it. */
2193 + TxBulkEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2194 + tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
2195 +
2196 + /* Do busy-wait until DMA not using this EP descriptor anymore */
2197 + while((*R_DMA_CH8_SUB0_EP ==
2198 + virt_to_phys(&TxBulkEPList[epid])) &&
2199 + (timeout-- > 0));
2200 + if(timeout == 0) {
2201 + warn("Timeout while waiting for DMA-TX-Bulk to leave EP for"
2202 + " epid:%d\n", epid);
2203 + }
2204 + }
2205 + break;
2206 +
2207 + case PIPE_CONTROL:
2208 + /* Check if EP still is enabled */
2209 + if (TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2210 + /* The EP was enabled, disable it. */
2211 + TxCtrlEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2212 + tc_warn("sync_finish: Disabling EP for epid:%d\n", epid);
2213 +
2214 + /* Do busy-wait until DMA not using this EP descriptor anymore */
2215 + while((*R_DMA_CH8_SUB1_EP ==
2216 + virt_to_phys(&TxCtrlEPList[epid])) &&
2217 + (timeout-- > 0));
2218 + if(timeout == 0) {
2219 + warn("Timeout while waiting for DMA-TX-Ctrl to leave EP for"
2220 + " epid:%d\n", epid);
2221 + }
2222 + }
2223 + break;
2224 +
2225 + case PIPE_INTERRUPT:
2226 + local_irq_save(flags);
2227 + /* Disable all Intr EPs belonging to epid */
2228 + first_ep = &TxIntrEPList[0];
2229 + curr_ep = first_ep;
2230 + do {
2231 + next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
2232 + if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
2233 + /* Disable EP */
2234 + next_ep->command &= ~IO_MASK(USB_EP_command, enable);
2235 + }
2236 + curr_ep = phys_to_virt(curr_ep->next);
2237 + } while (curr_ep != first_ep);
2238 +
2239 + local_irq_restore(flags);
2240 + break;
2241 +
2242 + case PIPE_ISOCHRONOUS:
2243 + /* Check if EP still is enabled */
2244 + if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2245 + tc_warn("sync_finish: Disabling Isoc EP for epid:%d\n", epid);
2246 + /* The EP was enabled, disable it. */
2247 + TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2248 +
2249 + while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
2250 + (timeout-- > 0));
2251 + if(timeout == 0) {
2252 + warn("Timeout while waiting for DMA-TX-Isoc to leave EP for"
2253 + " epid:%d\n", epid);
2254 + }
2255 + }
2256 + break;
2257 + }
2258 +
2259 + local_irq_save(flags);
2260 +
2261 + /* Finish if there is active URB for this endpoint */
2262 + if(activeUrbList[epid] != NULL) {
2263 + urb = activeUrbList[epid];
2264 + urb_priv = urb->hcpriv;
2265 + ASSERT(urb_priv);
2266 + tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
2267 + (urb == activeUrbList[epid]) ? "active" : "queued",
2268 + (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
2269 + str_type(urb->pipe), epid, urb->status,
2270 + (urb_priv->later_data) ? "later-sched" : "");
2271 +
2272 + tc_finish_urb(hcd, activeUrbList[epid], -ENOENT);
2273 + ASSERT(activeUrbList[epid] == NULL);
2274 + }
2275 +
2276 + /* Finish any queued URBs for this endpoint. There won't be any resubmitions
2277 + because epid_disabled causes enqueue() to fail for this endpoint */
2278 + while((urb = urb_list_first(epid)) != NULL) {
2279 + urb_priv = urb->hcpriv;
2280 + ASSERT(urb_priv);
2281 +
2282 + tc_warn("Sync finish %s URB:0x%x[%d] (%s %s epid:%d) status:%d %s\n",
2283 + (urb == activeUrbList[epid]) ? "active" : "queued",
2284 + (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
2285 + str_type(urb->pipe), epid, urb->status,
2286 + (urb_priv->later_data) ? "later-sched" : "");
2287 +
2288 + tc_finish_urb(hcd, urb, -ENOENT);
2289 + }
2290 + epid_state[epid].disabled = 0;
2291 + local_irq_restore(flags);
2292 +}
2293 +
2294 +/* free resources associated with an endpoint (called from hcd_driver) */
2295 +static void tc_endpoint_disable(struct usb_hcd *hcd,
2296 + struct usb_host_endpoint *ep) {
2297 + DBFENTER;
2298 + /* Only free epid if it has been allocated. We get two endpoint_disable
2299 + requests for ctrl endpoints so ignore the second one */
2300 + if(ep->hcpriv != NULL) {
2301 + struct crisv10_ep_priv *ep_priv = ep->hcpriv;
2302 + int epid = ep_priv->epid;
2303 + tc_warn("endpoint_disable ep:0x%x ep-priv:0x%x (%s) (epid:%d freed)\n",
2304 + (unsigned int)ep, (unsigned int)ep->hcpriv,
2305 + endpoint_to_str(&(ep->desc)), epid);
2306 +
2307 + tc_sync_finish_epid(hcd, epid);
2308 +
2309 + ASSERT(activeUrbList[epid] == NULL);
2310 + ASSERT(list_empty(&urb_list[epid]));
2311 +
2312 + tc_free_epid(ep);
2313 + } else {
2314 + tc_dbg("endpoint_disable ep:0x%x ep-priv:0x%x (%s)\n", (unsigned int)ep,
2315 + (unsigned int)ep->hcpriv, endpoint_to_str(&(ep->desc)));
2316 + }
2317 + DBFEXIT;
2318 +}
2319 +
2320 +//static void tc_finish_urb_later_proc(void *data) {
2321 +static void tc_finish_urb_later_proc(struct work_struct *work) {
2322 + unsigned long flags;
2323 + //struct urb_later_data* uld = (struct urb_later_data*)data;
2324 + struct urb_later_data* uld = container_of(work, struct urb_later_data, ws.work);
2325 + local_irq_save(flags);
2326 + if(uld->urb == NULL) {
2327 + late_dbg("Later finish of URB = NULL (allready finished)\n");
2328 + } else {
2329 + struct crisv10_urb_priv* urb_priv = uld->urb->hcpriv;
2330 + ASSERT(urb_priv);
2331 + if(urb_priv->urb_num == uld->urb_num) {
2332 + late_dbg("Later finish of URB:0x%x[%d]\n", (unsigned int)(uld->urb),
2333 + urb_priv->urb_num);
2334 + if(uld->status != uld->urb->status) {
2335 + errno_dbg("Later-finish URB with status:%d, later-status:%d\n",
2336 + uld->urb->status, uld->status);
2337 + }
2338 + if(uld != urb_priv->later_data) {
2339 + panic("Scheduled uld not same as URBs uld\n");
2340 + }
2341 + tc_finish_urb(uld->hcd, uld->urb, uld->status);
2342 + } else {
2343 + late_warn("Ignoring later finish of URB:0x%x[%d]"
2344 + ", urb_num doesn't match current URB:0x%x[%d]",
2345 + (unsigned int)(uld->urb), uld->urb_num,
2346 + (unsigned int)(uld->urb), urb_priv->urb_num);
2347 + }
2348 + }
2349 + local_irq_restore(flags);
2350 + kmem_cache_free(later_data_cache, uld);
2351 +}
2352 +
2353 +static void tc_finish_urb_later(struct usb_hcd *hcd, struct urb *urb,
2354 + int status) {
2355 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
2356 + struct urb_later_data* uld;
2357 +
2358 + ASSERT(urb_priv);
2359 +
2360 + if(urb_priv->later_data != NULL) {
2361 + /* Later-finish allready scheduled for this URB, just update status to
2362 + return when finishing later */
2363 + errno_dbg("Later-finish schedule change URB status:%d with new"
2364 + " status:%d\n", urb_priv->later_data->status, status);
2365 +
2366 + urb_priv->later_data->status = status;
2367 + return;
2368 + }
2369 +
2370 + uld = kmem_cache_alloc(later_data_cache, GFP_ATOMIC);
2371 + ASSERT(uld);
2372 +
2373 + uld->hcd = hcd;
2374 + uld->urb = urb;
2375 + uld->urb_num = urb_priv->urb_num;
2376 + uld->status = status;
2377 +
2378 + //INIT_WORK(&uld->ws, tc_finish_urb_later_proc, uld);
2379 + INIT_DELAYED_WORK(&uld->ws, tc_finish_urb_later_proc);
2380 + urb_priv->later_data = uld;
2381 +
2382 + /* Schedule the finishing of the URB to happen later */
2383 + schedule_delayed_work(&uld->ws, LATER_TIMER_DELAY);
2384 +}
2385 +
2386 + /* hinko ignore usb_pipeisoc */
2387 +#if 0
2388 +static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
2389 + int status);
2390 +#endif
2391 +
2392 +static void tc_finish_urb(struct usb_hcd *hcd, struct urb *urb, int status) {
2393 + struct crisv10_hcd* crisv10_hcd = hcd_to_crisv10_hcd(hcd);
2394 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
2395 + int epid;
2396 + char toggle;
2397 + int urb_num;
2398 +
2399 + DBFENTER;
2400 + ASSERT(urb_priv != NULL);
2401 + epid = urb_priv->epid;
2402 + urb_num = urb_priv->urb_num;
2403 +
2404 + if(urb != activeUrbList[epid]) {
2405 + if(urb_list_entry(urb, epid)) {
2406 + /* Remove this URB from the list. Only happens when URB are finished
2407 + before having been processed (dequeing) */
2408 + urb_list_del(urb, epid);
2409 + } else {
2410 + tc_warn("Finishing of URB:0x%x[%d] neither active or in queue for"
2411 + " epid:%d\n", (unsigned int)urb, urb_num, epid);
2412 + }
2413 + }
2414 +
2415 + /* Cancel any pending later-finish of this URB */
2416 + if(urb_priv->later_data) {
2417 + urb_priv->later_data->urb = NULL;
2418 + }
2419 +
2420 + /* For an IN pipe, we always set the actual length, regardless of whether
2421 + there was an error or not (which means the device driver can use the data
2422 + if it wants to). */
2423 + if(usb_pipein(urb->pipe)) {
2424 + urb->actual_length = urb_priv->rx_offset;
2425 + } else {
2426 + /* Set actual_length for OUT urbs also; the USB mass storage driver seems
2427 + to want that. */
2428 + if (status == 0 && urb->status == -EINPROGRESS) {
2429 + urb->actual_length = urb->transfer_buffer_length;
2430 + } else {
2431 + /* We wouldn't know of any partial writes if there was an error. */
2432 + urb->actual_length = 0;
2433 + }
2434 + }
2435 +
2436 +
2437 + /* URB status mangling */
2438 + if(urb->status == -EINPROGRESS) {
2439 + /* The USB core hasn't changed the status, let's set our finish status */
2440 + urb->status = status;
2441 +
2442 + if ((status == 0) && (urb->transfer_flags & URB_SHORT_NOT_OK) &&
2443 + usb_pipein(urb->pipe) &&
2444 + (urb->actual_length != urb->transfer_buffer_length)) {
2445 + /* URB_SHORT_NOT_OK means that short reads (shorter than the endpoint's
2446 + max length) is to be treated as an error. */
2447 + errno_dbg("Finishing URB:0x%x[%d] with SHORT_NOT_OK flag and short"
2448 + " data:%d\n", (unsigned int)urb, urb_num,
2449 + urb->actual_length);
2450 + urb->status = -EREMOTEIO;
2451 + }
2452 +
2453 + if(urb_priv->urb_state == UNLINK) {
2454 + /* URB has been requested to be unlinked asynchronously */
2455 + urb->status = -ECONNRESET;
2456 + errno_dbg("Fixing unlink status of URB:0x%x[%d] to:%d\n",
2457 + (unsigned int)urb, urb_num, urb->status);
2458 + }
2459 + } else {
2460 + /* The USB Core wants to signal some error via the URB, pass it through */
2461 + }
2462 +
2463 + /* hinko ignore usb_pipeisoc */
2464 +#if 0
2465 + /* use completely different finish function for Isoc URBs */
2466 + if(usb_pipeisoc(urb->pipe)) {
2467 + tc_finish_isoc_urb(hcd, urb, status);
2468 + return;
2469 + }
2470 +#endif
2471 +
2472 + /* Do special unlinking of EPs for Intr traffic */
2473 + if(usb_pipeint(urb->pipe)) {
2474 + tc_dma_unlink_intr_urb(urb);
2475 + }
2476 +
2477 + /* hinko ignore usb_pipeisoc */
2478 +#if 0
2479 + /* Release allocated bandwidth for periodic transfers */
2480 + if(usb_pipeint(urb->pipe) || usb_pipeisoc(urb->pipe))
2481 + usb_release_bandwidth(urb->dev, urb, 0);
2482 +#endif
2483 +
2484 + /* This URB is active on EP */
2485 + if(urb == activeUrbList[epid]) {
2486 + /* We need to fiddle with the toggle bits because the hardware doesn't do
2487 + it for us. */
2488 + toggle = etrax_epid_get_toggle(epid, usb_pipeout(urb->pipe));
2489 + usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
2490 + usb_pipeout(urb->pipe), toggle);
2491 +
2492 + /* Checks for Ctrl and Bulk EPs */
2493 + switch(usb_pipetype(urb->pipe)) {
2494 + case PIPE_BULK:
2495 + /* Check so Bulk EP realy is disabled before finishing active URB */
2496 + ASSERT((TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
2497 + IO_STATE(USB_EP_command, enable, no));
2498 + /* Disable sub-pointer for EP to avoid next tx_interrupt() to
2499 + process Bulk EP. */
2500 + TxBulkEPList[epid].sub = 0;
2501 + /* No need to wait for the DMA before changing the next pointer.
2502 + The modulo NBR_OF_EPIDS isn't actually necessary, since we will never use
2503 + the last one (INVALID_EPID) for actual traffic. */
2504 + TxBulkEPList[epid].next =
2505 + virt_to_phys(&TxBulkEPList[(epid + 1) % NBR_OF_EPIDS]);
2506 + break;
2507 + case PIPE_CONTROL:
2508 + /* Check so Ctrl EP realy is disabled before finishing active URB */
2509 + ASSERT((TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) ==
2510 + IO_STATE(USB_EP_command, enable, no));
2511 + /* Disable sub-pointer for EP to avoid next tx_interrupt() to
2512 + process Ctrl EP. */
2513 + TxCtrlEPList[epid].sub = 0;
2514 + break;
2515 + }
2516 + }
2517 +
2518 + /* Free HC-private URB data*/
2519 + urb_priv_free(hcd, urb);
2520 +
2521 + if(urb->status) {
2522 + errno_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
2523 + (unsigned int)urb, urb_num, str_dir(urb->pipe),
2524 + str_type(urb->pipe), urb->actual_length, urb->status);
2525 + } else {
2526 + tc_dbg("finish_urb (URB:0x%x[%d] %s %s) (data:%d) status:%d\n",
2527 + (unsigned int)urb, urb_num, str_dir(urb->pipe),
2528 + str_type(urb->pipe), urb->actual_length, urb->status);
2529 + }
2530 +
2531 + /* If we just finished an active URB, clear active pointer. */
2532 + if (urb == activeUrbList[epid]) {
2533 + /* Make URB not active on EP anymore */
2534 + activeUrbList[epid] = NULL;
2535 +
2536 + if(urb->status == 0) {
2537 + /* URB finished sucessfully, process queue to see if there are any more
2538 + URBs waiting before we call completion function.*/
2539 + if(crisv10_hcd->running) {
2540 + /* Only process queue if USB controller is running */
2541 + tc_dma_process_queue(epid);
2542 + } else {
2543 + tc_warn("No processing of queue for epid:%d, USB Controller not"
2544 + " running\n", epid);
2545 + }
2546 + }
2547 + }
2548 +
2549 + /* Hand the URB from HCD to its USB device driver, using its completion
2550 + functions */
2551 +// usb_hcd_giveback_urb (hcd, urb);
2552 + /**
2553 + * usb_hcd_unlink_urb_from_ep - remove an URB from its endpoint queue
2554 + * @hcd: host controller to which @urb was submitted
2555 + * @urb: URB being unlinked
2556 + *
2557 + * Host controller drivers should call this routine before calling
2558 + * usb_hcd_giveback_urb(). The HCD's private spinlock must be held and
2559 + * interrupts must be disabled. The actions carried out here are required
2560 + * for URB completion.
2561 + */
2562 +
2563 + /*hinko link/unlink urb -> ep */
2564 + //spin_lock(&crisv10_hcd->lock);
2565 + unsigned long flags;
2566 + spin_lock_irqsave(&crisv10_hcd->lock, flags);
2567 + usb_hcd_unlink_urb_from_ep(hcd, urb);
2568 + usb_hcd_giveback_urb(hcd, urb, status);
2569 + //spin_unlock(&crisv10_hcd->lock);
2570 + spin_unlock_irqrestore(&crisv10_hcd->lock, flags);
2571 +
2572 + /* Check the queue once more if the URB returned with error, because we
2573 + didn't do it before the completion function because the specification
2574 + states that the queue should not restart until all it's unlinked
2575 + URBs have been fully retired, with the completion functions run */
2576 + if(crisv10_hcd->running) {
2577 + /* Only process queue if USB controller is running */
2578 + tc_dma_process_queue(epid);
2579 + } else {
2580 + tc_warn("No processing of queue for epid:%d, USB Controller not running\n",
2581 + epid);
2582 + }
2583 +
2584 + DBFEXIT;
2585 +}
2586 +
2587 + /* hinko ignore usb_pipeisoc */
2588 +#if 0
2589 +static void tc_finish_isoc_urb(struct usb_hcd *hcd, struct urb *urb,
2590 + int status) {
2591 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
2592 + int epid, i;
2593 + volatile int timeout = 10000;
2594 +
2595 + ASSERT(urb_priv);
2596 + epid = urb_priv->epid;
2597 +
2598 + ASSERT(usb_pipeisoc(urb->pipe));
2599 +
2600 + /* Set that all isoc packets have status and length set before
2601 + completing the urb. */
2602 + for (i = urb_priv->isoc_packet_counter; i < urb->number_of_packets; i++){
2603 + urb->iso_frame_desc[i].actual_length = 0;
2604 + urb->iso_frame_desc[i].status = -EPROTO;
2605 + }
2606 +
2607 + /* Check if the URB is currently active (done or error) */
2608 + if(urb == activeUrbList[epid]) {
2609 + /* Check if there are another In Isoc URB queued for this epid */
2610 + if (!list_empty(&urb_list[epid])&& !epid_state[epid].disabled) {
2611 + /* Move it from queue to active and mark it started so Isoc transfers
2612 + won't be interrupted.
2613 + All Isoc URBs data transfers are already added to DMA lists so we
2614 + don't have to insert anything in DMA lists here. */
2615 + activeUrbList[epid] = urb_list_first(epid);
2616 + ((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_state =
2617 + STARTED;
2618 + urb_list_del(activeUrbList[epid], epid);
2619 +
2620 + if(urb->status) {
2621 + errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
2622 + " status:%d, new waiting URB:0x%x[%d]\n",
2623 + (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
2624 + str_type(urb->pipe), urb_priv->isoc_packet_counter,
2625 + urb->number_of_packets, urb->status,
2626 + (unsigned int)activeUrbList[epid],
2627 + ((struct crisv10_urb_priv *)(activeUrbList[epid]->hcpriv))->urb_num);
2628 + }
2629 +
2630 + } else { /* No other URB queued for this epid */
2631 + if(urb->status) {
2632 + errno_dbg("finish_isoc_urb (URB:0x%x[%d] %s %s) (%d of %d packets)"
2633 + " status:%d, no new URB waiting\n",
2634 + (unsigned int)urb, urb_priv->urb_num, str_dir(urb->pipe),
2635 + str_type(urb->pipe), urb_priv->isoc_packet_counter,
2636 + urb->number_of_packets, urb->status);
2637 + }
2638 +
2639 + /* Check if EP is still enabled, then shut it down. */
2640 + if (TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
2641 + isoc_dbg("Isoc EP enabled for epid:%d, disabling it\n", epid);
2642 +
2643 + /* Should only occur for In Isoc EPs where SB isn't consumed. */
2644 + ASSERT(usb_pipein(urb->pipe));
2645 +
2646 + /* Disable it and wait for it to stop */
2647 + TxIsocEPList[epid].command &= ~IO_MASK(USB_EP_command, enable);
2648 +
2649 + /* Ah, the luxury of busy-wait. */
2650 + while((*R_DMA_CH8_SUB3_EP == virt_to_phys(&TxIsocEPList[epid])) &&
2651 + (timeout-- > 0));
2652 + if(timeout == 0) {
2653 + warn("Timeout while waiting for DMA-TX-Isoc to leave EP for epid:%d\n", epid);
2654 + }
2655 + }
2656 +
2657 + /* Unlink SB to say that epid is finished. */
2658 + TxIsocEPList[epid].sub = 0;
2659 + TxIsocEPList[epid].hw_len = 0;
2660 +
2661 + /* No URB active for EP anymore */
2662 + activeUrbList[epid] = NULL;
2663 + }
2664 + } else { /* Finishing of not active URB (queued up with SBs thought) */
2665 + isoc_warn("finish_isoc_urb (URB:0x%x %s) (%d of %d packets) status:%d,"
2666 + " SB queued but not active\n",
2667 + (unsigned int)urb, str_dir(urb->pipe),
2668 + urb_priv->isoc_packet_counter, urb->number_of_packets,
2669 + urb->status);
2670 + if(usb_pipeout(urb->pipe)) {
2671 + /* Finishing of not yet active Out Isoc URB needs unlinking of SBs. */
2672 + struct USB_SB_Desc *iter_sb, *prev_sb, *next_sb;
2673 +
2674 + iter_sb = TxIsocEPList[epid].sub ?
2675 + phys_to_virt(TxIsocEPList[epid].sub) : 0;
2676 + prev_sb = 0;
2677 +
2678 + /* SB that is linked before this URBs first SB */
2679 + while (iter_sb && (iter_sb != urb_priv->first_sb)) {
2680 + prev_sb = iter_sb;
2681 + iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
2682 + }
2683 +
2684 + if (iter_sb == 0) {
2685 + /* Unlink of the URB currently being transmitted. */
2686 + prev_sb = 0;
2687 + iter_sb = TxIsocEPList[epid].sub ? phys_to_virt(TxIsocEPList[epid].sub) : 0;
2688 + }
2689 +
2690 + while (iter_sb && (iter_sb != urb_priv->last_sb)) {
2691 + iter_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
2692 + }
2693 +
2694 + if (iter_sb) {
2695 + next_sb = iter_sb->next ? phys_to_virt(iter_sb->next) : 0;
2696 + } else {
2697 + /* This should only happen if the DMA has completed
2698 + processing the SB list for this EP while interrupts
2699 + are disabled. */
2700 + isoc_dbg("Isoc urb not found, already sent?\n");
2701 + next_sb = 0;
2702 + }
2703 + if (prev_sb) {
2704 + prev_sb->next = next_sb ? virt_to_phys(next_sb) : 0;
2705 + } else {
2706 + TxIsocEPList[epid].sub = next_sb ? virt_to_phys(next_sb) : 0;
2707 + }
2708 + }
2709 + }
2710 +
2711 + /* Free HC-private URB data*/
2712 + urb_priv_free(hcd, urb);
2713 +
2714 + usb_release_bandwidth(urb->dev, urb, 0);
2715 +
2716 + /* Hand the URB from HCD to its USB device driver, using its completion
2717 + functions */
2718 + usb_hcd_giveback_urb (hcd, urb);
2719 +}
2720 +#endif
2721 +
2722 +static __u32 urb_num = 0;
2723 +
2724 +/* allocate and initialize URB private data */
2725 +static int urb_priv_create(struct usb_hcd *hcd, struct urb *urb, int epid,
2726 + int mem_flags) {
2727 + struct crisv10_urb_priv *urb_priv;
2728 +
2729 + urb_priv = kmalloc(sizeof *urb_priv, mem_flags);
2730 + if (!urb_priv)
2731 + return -ENOMEM;
2732 + memset(urb_priv, 0, sizeof *urb_priv);
2733 +
2734 + urb_priv->epid = epid;
2735 + urb_priv->urb_state = NOT_STARTED;
2736 +
2737 + urb->hcpriv = urb_priv;
2738 + /* Assign URB a sequence number, and increment counter */
2739 + urb_priv->urb_num = urb_num;
2740 + urb_num++;
2741 + return 0;
2742 +}
2743 +
2744 +/* free URB private data */
2745 +static void urb_priv_free(struct usb_hcd *hcd, struct urb *urb) {
2746 + int i;
2747 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
2748 + ASSERT(urb_priv != 0);
2749 +
2750 + /* Check it has any SBs linked that needs to be freed*/
2751 + if(urb_priv->first_sb != NULL) {
2752 + struct USB_SB_Desc *next_sb, *first_sb, *last_sb;
2753 + int i = 0;
2754 + first_sb = urb_priv->first_sb;
2755 + last_sb = urb_priv->last_sb;
2756 + ASSERT(last_sb);
2757 + while(first_sb != last_sb) {
2758 + next_sb = (struct USB_SB_Desc *)phys_to_virt(first_sb->next);
2759 + kmem_cache_free(usb_desc_cache, first_sb);
2760 + first_sb = next_sb;
2761 + i++;
2762 + }
2763 + kmem_cache_free(usb_desc_cache, last_sb);
2764 + i++;
2765 + }
2766 +
2767 + /* Check if it has any EPs in its Intr pool that also needs to be freed */
2768 + if(urb_priv->intr_ep_pool_length > 0) {
2769 + for(i = 0; i < urb_priv->intr_ep_pool_length; i++) {
2770 + kfree(urb_priv->intr_ep_pool[i]);
2771 + }
2772 + /*
2773 + tc_dbg("Freed %d EPs from URB:0x%x EP pool\n",
2774 + urb_priv->intr_ep_pool_length, (unsigned int)urb);
2775 + */
2776 + }
2777 +
2778 + kfree(urb_priv);
2779 + urb->hcpriv = NULL;
2780 +}
2781 +
2782 +static int ep_priv_create(struct usb_host_endpoint *ep, int mem_flags) {
2783 + struct crisv10_ep_priv *ep_priv;
2784 +
2785 + ep_priv = kmalloc(sizeof *ep_priv, mem_flags);
2786 + if (!ep_priv)
2787 + return -ENOMEM;
2788 + memset(ep_priv, 0, sizeof *ep_priv);
2789 +
2790 + ep->hcpriv = ep_priv;
2791 + return 0;
2792 +}
2793 +
2794 +static void ep_priv_free(struct usb_host_endpoint *ep) {
2795 + struct crisv10_ep_priv *ep_priv = ep->hcpriv;
2796 + ASSERT(ep_priv);
2797 + kfree(ep_priv);
2798 + ep->hcpriv = NULL;
2799 +}
2800 +
2801 +/* EPID handling functions, managing EP-list in Etrax through wrappers */
2802 +/* ------------------------------------------------------------------- */
2803 +
2804 +/* Sets up a new EPID for an endpoint or returns existing if found */
2805 +//static int tc_setup_epid(struct usb_host_endpoint *ep, struct urb *urb,
2806 +// int mem_flags) {
2807 +static int tc_setup_epid(struct urb *urb, int mem_flags)
2808 +{
2809 + int epid;
2810 + char devnum, endpoint, out_traffic, slow;
2811 + int maxlen;
2812 + __u32 epid_data;
2813 + struct usb_host_endpoint *ep = urb->ep;
2814 + struct crisv10_ep_priv *ep_priv = ep->hcpriv;
2815 +
2816 + DBFENTER;
2817 +
2818 + /* Check if a valid epid already is setup for this endpoint */
2819 + if(ep_priv != NULL) {
2820 + return ep_priv->epid;
2821 + }
2822 +
2823 + /* We must find and initiate a new epid for this urb. */
2824 + epid = tc_allocate_epid();
2825 +
2826 + if (epid == -1) {
2827 + /* Failed to allocate a new epid. */
2828 + DBFEXIT;
2829 + return epid;
2830 + }
2831 +
2832 + /* We now have a new epid to use. Claim it. */
2833 + epid_state[epid].inuse = 1;
2834 +
2835 + /* Init private data for new endpoint */
2836 + if(ep_priv_create(ep, mem_flags) != 0) {
2837 + return -ENOMEM;
2838 + }
2839 + ep_priv = ep->hcpriv;
2840 + ep_priv->epid = epid;
2841 +
2842 + devnum = usb_pipedevice(urb->pipe);
2843 + endpoint = usb_pipeendpoint(urb->pipe);
2844 + slow = (urb->dev->speed == USB_SPEED_LOW);
2845 + maxlen = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
2846 +
2847 + if (usb_pipetype(urb->pipe) == PIPE_CONTROL) {
2848 + /* We want both IN and OUT control traffic to be put on the same
2849 + EP/SB list. */
2850 + out_traffic = 1;
2851 + } else {
2852 + out_traffic = usb_pipeout(urb->pipe);
2853 + }
2854 +
2855 + if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
2856 + epid_data = IO_STATE(R_USB_EPT_DATA_ISO, valid, yes) |
2857 + /* FIXME: Change any to the actual port? */
2858 + IO_STATE(R_USB_EPT_DATA_ISO, port, any) |
2859 + IO_FIELD(R_USB_EPT_DATA_ISO, max_len, maxlen) |
2860 + IO_FIELD(R_USB_EPT_DATA_ISO, ep, endpoint) |
2861 + IO_FIELD(R_USB_EPT_DATA_ISO, dev, devnum);
2862 + etrax_epid_iso_set(epid, epid_data);
2863 + } else {
2864 + epid_data = IO_STATE(R_USB_EPT_DATA, valid, yes) |
2865 + IO_FIELD(R_USB_EPT_DATA, low_speed, slow) |
2866 + /* FIXME: Change any to the actual port? */
2867 + IO_STATE(R_USB_EPT_DATA, port, any) |
2868 + IO_FIELD(R_USB_EPT_DATA, max_len, maxlen) |
2869 + IO_FIELD(R_USB_EPT_DATA, ep, endpoint) |
2870 + IO_FIELD(R_USB_EPT_DATA, dev, devnum);
2871 + etrax_epid_set(epid, epid_data);
2872 + }
2873 +
2874 + epid_state[epid].out_traffic = out_traffic;
2875 + epid_state[epid].type = usb_pipetype(urb->pipe);
2876 +
2877 + tc_warn("Setting up ep:0x%x epid:%d (addr:%d endp:%d max_len:%d %s %s %s)\n",
2878 + (unsigned int)ep, epid, devnum, endpoint, maxlen,
2879 + str_type(urb->pipe), out_traffic ? "out" : "in",
2880 + slow ? "low" : "full");
2881 +
2882 + /* Enable Isoc eof interrupt if we set up the first Isoc epid */
2883 + if(usb_pipeisoc(urb->pipe)) {
2884 + isoc_epid_counter++;
2885 + if(isoc_epid_counter == 1) {
2886 + isoc_warn("Enabled Isoc eof interrupt\n");
2887 + *R_USB_IRQ_MASK_SET |= IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set);
2888 + }
2889 + }
2890 +
2891 + DBFEXIT;
2892 + return epid;
2893 +}
2894 +
2895 +static void tc_free_epid(struct usb_host_endpoint *ep) {
2896 + unsigned long flags;
2897 + struct crisv10_ep_priv *ep_priv = ep->hcpriv;
2898 + int epid;
2899 + volatile int timeout = 10000;
2900 +
2901 + DBFENTER;
2902 +
2903 + if (ep_priv == NULL) {
2904 + tc_warn("Trying to free unused epid on ep:0x%x\n", (unsigned int)ep);
2905 + DBFEXIT;
2906 + return;
2907 + }
2908 +
2909 + epid = ep_priv->epid;
2910 +
2911 + /* Disable Isoc eof interrupt if we free the last Isoc epid */
2912 + if(epid_isoc(epid)) {
2913 + ASSERT(isoc_epid_counter > 0);
2914 + isoc_epid_counter--;
2915 + if(isoc_epid_counter == 0) {
2916 + *R_USB_IRQ_MASK_SET &= ~IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set);
2917 + isoc_warn("Disabled Isoc eof interrupt\n");
2918 + }
2919 + }
2920 +
2921 + /* Take lock manualy instead of in epid_x_x wrappers,
2922 + because we need to be polling here */
2923 + spin_lock_irqsave(&etrax_epid_lock, flags);
2924 +
2925 + *R_USB_EPT_INDEX = IO_FIELD(R_USB_EPT_INDEX, value, epid);
2926 + nop();
2927 + while((*R_USB_EPT_DATA & IO_MASK(R_USB_EPT_DATA, hold)) &&
2928 + (timeout-- > 0));
2929 + if(timeout == 0) {
2930 + warn("Timeout while waiting for epid:%d to drop hold\n", epid);
2931 + }
2932 + /* This will, among other things, set the valid field to 0. */
2933 + *R_USB_EPT_DATA = 0;
2934 + spin_unlock_irqrestore(&etrax_epid_lock, flags);
2935 +
2936 + /* Free resource in software state info list */
2937 + epid_state[epid].inuse = 0;
2938 +
2939 + /* Free private endpoint data */
2940 + ep_priv_free(ep);
2941 +
2942 + DBFEXIT;
2943 +}
2944 +
2945 +static int tc_allocate_epid(void) {
2946 + int i;
2947 + DBFENTER;
2948 + for (i = 0; i < NBR_OF_EPIDS; i++) {
2949 + if (!epid_inuse(i)) {
2950 + DBFEXIT;
2951 + return i;
2952 + }
2953 + }
2954 +
2955 + tc_warn("Found no free epids\n");
2956 + DBFEXIT;
2957 + return -1;
2958 +}
2959 +
2960 +
2961 +/* Wrappers around the list functions (include/linux/list.h). */
2962 +/* ---------------------------------------------------------- */
2963 +static inline int __urb_list_empty(int epid) {
2964 + int retval;
2965 + retval = list_empty(&urb_list[epid]);
2966 + return retval;
2967 +}
2968 +
2969 +/* Returns first urb for this epid, or NULL if list is empty. */
2970 +static inline struct urb *urb_list_first(int epid) {
2971 + unsigned long flags;
2972 + struct urb *first_urb = 0;
2973 + spin_lock_irqsave(&urb_list_lock, flags);
2974 + if (!__urb_list_empty(epid)) {
2975 + /* Get the first urb (i.e. head->next). */
2976 + urb_entry_t *urb_entry = list_entry((&urb_list[epid])->next, urb_entry_t, list);
2977 + first_urb = urb_entry->urb;
2978 + }
2979 + spin_unlock_irqrestore(&urb_list_lock, flags);
2980 + return first_urb;
2981 +}
2982 +
2983 +/* Adds an urb_entry last in the list for this epid. */
2984 +static inline void urb_list_add(struct urb *urb, int epid, int mem_flags) {
2985 + unsigned long flags;
2986 + urb_entry_t *urb_entry = (urb_entry_t *)kmalloc(sizeof(urb_entry_t), mem_flags);
2987 + ASSERT(urb_entry);
2988 +
2989 + urb_entry->urb = urb;
2990 + spin_lock_irqsave(&urb_list_lock, flags);
2991 + list_add_tail(&urb_entry->list, &urb_list[epid]);
2992 + spin_unlock_irqrestore(&urb_list_lock, flags);
2993 +}
2994 +
2995 +/* Search through the list for an element that contains this urb. (The list
2996 + is expected to be short and the one we are about to delete will often be
2997 + the first in the list.)
2998 + Should be protected by spin_locks in calling function */
2999 +static inline urb_entry_t *__urb_list_entry(struct urb *urb, int epid) {
3000 + struct list_head *entry;
3001 + struct list_head *tmp;
3002 + urb_entry_t *urb_entry;
3003 +
3004 + list_for_each_safe(entry, tmp, &urb_list[epid]) {
3005 + urb_entry = list_entry(entry, urb_entry_t, list);
3006 + ASSERT(urb_entry);
3007 + ASSERT(urb_entry->urb);
3008 +
3009 + if (urb_entry->urb == urb) {
3010 + return urb_entry;
3011 + }
3012 + }
3013 + return 0;
3014 +}
3015 +
3016 +/* Same function as above but for global use. Protects list by spinlock */
3017 +static inline urb_entry_t *urb_list_entry(struct urb *urb, int epid) {
3018 + unsigned long flags;
3019 + urb_entry_t *urb_entry;
3020 + spin_lock_irqsave(&urb_list_lock, flags);
3021 + urb_entry = __urb_list_entry(urb, epid);
3022 + spin_unlock_irqrestore(&urb_list_lock, flags);
3023 + return (urb_entry);
3024 +}
3025 +
3026 +/* Delete an urb from the list. */
3027 +static inline void urb_list_del(struct urb *urb, int epid) {
3028 + unsigned long flags;
3029 + urb_entry_t *urb_entry;
3030 +
3031 + /* Delete entry and free. */
3032 + spin_lock_irqsave(&urb_list_lock, flags);
3033 + urb_entry = __urb_list_entry(urb, epid);
3034 + ASSERT(urb_entry);
3035 +
3036 + list_del(&urb_entry->list);
3037 + spin_unlock_irqrestore(&urb_list_lock, flags);
3038 + kfree(urb_entry);
3039 +}
3040 +
3041 +/* Move an urb to the end of the list. */
3042 +static inline void urb_list_move_last(struct urb *urb, int epid) {
3043 + unsigned long flags;
3044 + urb_entry_t *urb_entry;
3045 +
3046 + spin_lock_irqsave(&urb_list_lock, flags);
3047 + urb_entry = __urb_list_entry(urb, epid);
3048 + ASSERT(urb_entry);
3049 +
3050 + list_del(&urb_entry->list);
3051 + list_add_tail(&urb_entry->list, &urb_list[epid]);
3052 + spin_unlock_irqrestore(&urb_list_lock, flags);
3053 +}
3054 +
3055 +/* Get the next urb in the list. */
3056 +static inline struct urb *urb_list_next(struct urb *urb, int epid) {
3057 + unsigned long flags;
3058 + urb_entry_t *urb_entry;
3059 +
3060 + spin_lock_irqsave(&urb_list_lock, flags);
3061 + urb_entry = __urb_list_entry(urb, epid);
3062 + ASSERT(urb_entry);
3063 +
3064 + if (urb_entry->list.next != &urb_list[epid]) {
3065 + struct list_head *elem = urb_entry->list.next;
3066 + urb_entry = list_entry(elem, urb_entry_t, list);
3067 + spin_unlock_irqrestore(&urb_list_lock, flags);
3068 + return urb_entry->urb;
3069 + } else {
3070 + spin_unlock_irqrestore(&urb_list_lock, flags);
3071 + return NULL;
3072 + }
3073 +}
3074 +
3075 +struct USB_EP_Desc* create_ep(int epid, struct USB_SB_Desc* sb_desc,
3076 + int mem_flags) {
3077 + struct USB_EP_Desc *ep_desc;
3078 + ep_desc = (struct USB_EP_Desc *) kmem_cache_alloc(usb_desc_cache, mem_flags);
3079 + if(ep_desc == NULL)
3080 + return NULL;
3081 + memset(ep_desc, 0, sizeof(struct USB_EP_Desc));
3082 +
3083 + ep_desc->hw_len = 0;
3084 + ep_desc->command = (IO_FIELD(USB_EP_command, epid, epid) |
3085 + IO_STATE(USB_EP_command, enable, yes));
3086 + if(sb_desc == NULL) {
3087 + ep_desc->sub = 0;
3088 + } else {
3089 + ep_desc->sub = virt_to_phys(sb_desc);
3090 + }
3091 + return ep_desc;
3092 +}
3093 +
3094 +#define TT_ZOUT 0
3095 +#define TT_IN 1
3096 +#define TT_OUT 2
3097 +#define TT_SETUP 3
3098 +
3099 +#define CMD_EOL IO_STATE(USB_SB_command, eol, yes)
3100 +#define CMD_INTR IO_STATE(USB_SB_command, intr, yes)
3101 +#define CMD_FULL IO_STATE(USB_SB_command, full, yes)
3102 +
3103 +/* Allocation and setup of a generic SB. Used to create SETUP, OUT and ZOUT
3104 + SBs. Also used by create_sb_in() to avoid same allocation procedure at two
3105 + places */
3106 +struct USB_SB_Desc* create_sb(struct USB_SB_Desc* sb_prev, int tt, void* data,
3107 + int datalen, int mem_flags) {
3108 + struct USB_SB_Desc *sb_desc;
3109 + sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
3110 + if(sb_desc == NULL)
3111 + return NULL;
3112 + memset(sb_desc, 0, sizeof(struct USB_SB_Desc));
3113 +
3114 + sb_desc->command = IO_FIELD(USB_SB_command, tt, tt) |
3115 + IO_STATE(USB_SB_command, eot, yes);
3116 +
3117 + sb_desc->sw_len = datalen;
3118 + if(data != NULL) {
3119 + sb_desc->buf = virt_to_phys(data);
3120 + } else {
3121 + sb_desc->buf = 0;
3122 + }
3123 + if(sb_prev != NULL) {
3124 + sb_prev->next = virt_to_phys(sb_desc);
3125 + }
3126 + return sb_desc;
3127 +}
3128 +
3129 +/* Creates a copy of an existing SB by allocation space for it and copy
3130 + settings */
3131 +struct USB_SB_Desc* create_sb_copy(struct USB_SB_Desc* sb_orig, int mem_flags) {
3132 + struct USB_SB_Desc *sb_desc;
3133 + sb_desc = (struct USB_SB_Desc*)kmem_cache_alloc(usb_desc_cache, mem_flags);
3134 + if(sb_desc == NULL)
3135 + return NULL;
3136 +
3137 + memcpy(sb_desc, sb_orig, sizeof(struct USB_SB_Desc));
3138 + return sb_desc;
3139 +}
3140 +
3141 +/* A specific create_sb function for creation of in SBs. This is due to
3142 + that datalen in In SBs shows how many packets we are expecting. It also
3143 + sets up the rem field to show if how many bytes we expect in last packet
3144 + if it's not a full one */
3145 +struct USB_SB_Desc* create_sb_in(struct USB_SB_Desc* sb_prev, int datalen,
3146 + int maxlen, int mem_flags) {
3147 + struct USB_SB_Desc *sb_desc;
3148 + sb_desc = create_sb(sb_prev, TT_IN, NULL,
3149 + datalen ? (datalen - 1) / maxlen + 1 : 0, mem_flags);
3150 + if(sb_desc == NULL)
3151 + return NULL;
3152 + sb_desc->command |= IO_FIELD(USB_SB_command, rem, datalen % maxlen);
3153 + return sb_desc;
3154 +}
3155 +
3156 +void set_sb_cmds(struct USB_SB_Desc *sb_desc, __u16 flags) {
3157 + sb_desc->command |= flags;
3158 +}
3159 +
3160 +int create_sb_for_urb(struct urb *urb, int mem_flags) {
3161 + int is_out = !usb_pipein(urb->pipe);
3162 + int type = usb_pipetype(urb->pipe);
3163 + int maxlen = usb_maxpacket(urb->dev, urb->pipe, is_out);
3164 + int buf_len = urb->transfer_buffer_length;
3165 + void *buf = buf_len > 0 ? urb->transfer_buffer : NULL;
3166 + struct USB_SB_Desc *sb_desc = NULL;
3167 +
3168 + struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
3169 + ASSERT(urb_priv != NULL);
3170 +
3171 + switch(type) {
3172 + case PIPE_CONTROL:
3173 + /* Setup stage */
3174 + sb_desc = create_sb(NULL, TT_SETUP, urb->setup_packet, 8, mem_flags);
3175 + if(sb_desc == NULL)
3176 + return -ENOMEM;
3177 + set_sb_cmds(sb_desc, CMD_FULL);
3178 +
3179 + /* Attach first SB to URB */
3180 + urb_priv->first_sb = sb_desc;
3181 +
3182 + if (is_out) { /* Out Control URB */
3183 + /* If this Control OUT transfer has an optional data stage we add
3184 + an OUT token before the mandatory IN (status) token */
3185 + if ((buf_len > 0) && buf) {
3186 + sb_desc = create_sb(sb_desc, TT_OUT, buf, buf_len, mem_flags);
3187 + if(sb_desc == NULL)
3188 + return -ENOMEM;
3189 + set_sb_cmds(sb_desc, CMD_FULL);
3190 + }
3191 +
3192 + /* Status stage */
3193 + /* The data length has to be exactly 1. This is due to a requirement
3194 + of the USB specification that a host must be prepared to receive
3195 + data in the status phase */
3196 + sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
3197 + if(sb_desc == NULL)
3198 + return -ENOMEM;
3199 + } else { /* In control URB */
3200 + /* Data stage */
3201 + sb_desc = create_sb_in(sb_desc, buf_len, maxlen, mem_flags);
3202 + if(sb_desc == NULL)
3203 + return -ENOMEM;
3204 +
3205 + /* Status stage */
3206 + /* Read comment at zout_buffer declaration for an explanation to this. */
3207 + sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
3208 + if(sb_desc == NULL)
3209 + return -ENOMEM;
3210 + /* Set descriptor interrupt flag for in URBs so we can finish URB after
3211 + zout-packet has been sent */
3212 + set_sb_cmds(sb_desc, CMD_INTR | CMD_FULL);
3213 + }
3214 + /* Set end-of-list flag in last SB */
3215 + set_sb_cmds(sb_desc, CMD_EOL);
3216 + /* Attach last SB to URB */
3217 + urb_priv->last_sb = sb_desc;
3218 + break;
3219 +
3220 + case PIPE_BULK:
3221 + if (is_out) { /* Out Bulk URB */
3222 + sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
3223 + if(sb_desc == NULL)
3224 + return -ENOMEM;
3225 + /* The full field is set to yes, even if we don't actually check that
3226 + this is a full-length transfer (i.e., that transfer_buffer_length %
3227 + maxlen = 0).
3228 + Setting full prevents the USB controller from sending an empty packet
3229 + in that case. However, if URB_ZERO_PACKET was set we want that. */
3230 + if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
3231 + set_sb_cmds(sb_desc, CMD_FULL);
3232 + }
3233 + } else { /* In Bulk URB */
3234 + sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
3235 + if(sb_desc == NULL)
3236 + return -ENOMEM;
3237 + }
3238 + /* Set end-of-list flag for last SB */
3239 + set_sb_cmds(sb_desc, CMD_EOL);
3240 +
3241 + /* Attach SB to URB */
3242 + urb_priv->first_sb = sb_desc;
3243 + urb_priv->last_sb = sb_desc;
3244 + break;
3245 +
3246 + case PIPE_INTERRUPT:
3247 + if(is_out) { /* Out Intr URB */
3248 + sb_desc = create_sb(NULL, TT_OUT, buf, buf_len, mem_flags);
3249 + if(sb_desc == NULL)
3250 + return -ENOMEM;
3251 +
3252 + /* The full field is set to yes, even if we don't actually check that
3253 + this is a full-length transfer (i.e., that transfer_buffer_length %
3254 + maxlen = 0).
3255 + Setting full prevents the USB controller from sending an empty packet
3256 + in that case. However, if URB_ZERO_PACKET was set we want that. */
3257 + if (!(urb->transfer_flags & URB_ZERO_PACKET)) {
3258 + set_sb_cmds(sb_desc, CMD_FULL);
3259 + }
3260 + /* Only generate TX interrupt if it's a Out URB*/
3261 + set_sb_cmds(sb_desc, CMD_INTR);
3262 +
3263 + } else { /* In Intr URB */
3264 + sb_desc = create_sb_in(NULL, buf_len, maxlen, mem_flags);
3265 + if(sb_desc == NULL)
3266 + return -ENOMEM;
3267 + }
3268 + /* Set end-of-list flag for last SB */
3269 + set_sb_cmds(sb_desc, CMD_EOL);
3270 +
3271 + /* Attach SB to URB */
3272 + urb_priv->first_sb = sb_desc;
3273 + urb_priv->last_sb = sb_desc;
3274 +
3275 + break;
3276 + case PIPE_ISOCHRONOUS:
3277 + if(is_out) { /* Out Isoc URB */
3278 + int i;
3279 + if(urb->number_of_packets == 0) {
3280 + tc_err("Can't create SBs for Isoc URB with zero packets\n");
3281 + return -EPIPE;
3282 + }
3283 + /* Create one SB descriptor for each packet and link them together. */
3284 + for(i = 0; i < urb->number_of_packets; i++) {
3285 + if (urb->iso_frame_desc[i].length > 0) {
3286 +
3287 + sb_desc = create_sb(sb_desc, TT_OUT, urb->transfer_buffer +
3288 + urb->iso_frame_desc[i].offset,
3289 + urb->iso_frame_desc[i].length, mem_flags);
3290 + if(sb_desc == NULL)
3291 + return -ENOMEM;
3292 +
3293 + /* Check if it's a full length packet */
3294 + if (urb->iso_frame_desc[i].length ==
3295 + usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe))) {
3296 + set_sb_cmds(sb_desc, CMD_FULL);
3297 + }
3298 +
3299 + } else { /* zero length packet */
3300 + sb_desc = create_sb(sb_desc, TT_ZOUT, &zout_buffer[0], 1, mem_flags);
3301 + if(sb_desc == NULL)
3302 + return -ENOMEM;
3303 + set_sb_cmds(sb_desc, CMD_FULL);
3304 + }
3305 + /* Attach first SB descriptor to URB */
3306 + if (i == 0) {
3307 + urb_priv->first_sb = sb_desc;
3308 + }
3309 + }
3310 + /* Set interrupt and end-of-list flags in last SB */
3311 + set_sb_cmds(sb_desc, CMD_INTR | CMD_EOL);
3312 + /* Attach last SB descriptor to URB */
3313 + urb_priv->last_sb = sb_desc;
3314 + tc_dbg("Created %d out SBs for Isoc URB:0x%x\n",
3315 + urb->number_of_packets, (unsigned int)urb);
3316 + } else { /* In Isoc URB */
3317 + /* Actual number of packets is not relevant for periodic in traffic as
3318 + long as it is more than zero. Set to 1 always. */
3319 + sb_desc = create_sb(sb_desc, TT_IN, NULL, 1, mem_flags);
3320 + if(sb_desc == NULL)
3321 + return -ENOMEM;
3322 + /* Set end-of-list flags for SB */
3323 + set_sb_cmds(sb_desc, CMD_EOL);
3324 +
3325 + /* Attach SB to URB */
3326 + urb_priv->first_sb = sb_desc;
3327 + urb_priv->last_sb = sb_desc;
3328 + }
3329 + break;
3330 + default:
3331 + tc_err("Unknown pipe-type\n");
3332 + return -EPIPE;
3333 + break;
3334 + }
3335 + return 0;
3336 +}
3337 +
3338 +int init_intr_urb(struct urb *urb, int mem_flags) {
3339 + struct crisv10_urb_priv *urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
3340 + struct USB_EP_Desc* ep_desc;
3341 + int interval;
3342 + int i;
3343 + int ep_count;
3344 +
3345 + ASSERT(urb_priv != NULL);
3346 + ASSERT(usb_pipeint(urb->pipe));
3347 + /* We can't support interval longer than amount of eof descriptors in
3348 + TxIntrEPList */
3349 + if(urb->interval > MAX_INTR_INTERVAL) {
3350 + tc_err("Interrupt interval %dms too big (max: %dms)\n", urb->interval,
3351 + MAX_INTR_INTERVAL);
3352 + return -EINVAL;
3353 + }
3354 +
3355 + /* We assume that the SB descriptors already have been setup */
3356 + ASSERT(urb_priv->first_sb != NULL);
3357 +
3358 + /* Round of the interval to 2^n, it is obvious that this code favours
3359 + smaller numbers, but that is actually a good thing */
3360 + /* FIXME: The "rounding error" for larger intervals will be quite
3361 + large. For in traffic this shouldn't be a problem since it will only
3362 + mean that we "poll" more often. */
3363 + interval = urb->interval;
3364 + for (i = 0; interval; i++) {
3365 + interval = interval >> 1;
3366 + }
3367 + urb_priv->interval = 1 << (i - 1);
3368 +
3369 + /* We can only have max interval for Out Interrupt due to that we can only
3370 + handle one linked in EP for a certain epid in the Intr descr array at the
3371 + time. The USB Controller in the Etrax 100LX continues to process Intr EPs
3372 + so we have no way of knowing which one that caused the actual transfer if
3373 + we have several linked in. */
3374 + if(usb_pipeout(urb->pipe)) {
3375 + urb_priv->interval = MAX_INTR_INTERVAL;
3376 + }
3377 +
3378 + /* Calculate amount of EPs needed */
3379 + ep_count = MAX_INTR_INTERVAL / urb_priv->interval;
3380 +
3381 + for(i = 0; i < ep_count; i++) {
3382 + ep_desc = create_ep(urb_priv->epid, urb_priv->first_sb, mem_flags);
3383 + if(ep_desc == NULL) {
3384 + /* Free any descriptors that we may have allocated before failure */
3385 + while(i > 0) {
3386 + i--;
3387 + kfree(urb_priv->intr_ep_pool[i]);
3388 + }
3389 + return -ENOMEM;
3390 + }
3391 + urb_priv->intr_ep_pool[i] = ep_desc;
3392 + }
3393 + urb_priv->intr_ep_pool_length = ep_count;
3394 + return 0;
3395 +}
3396 +
3397 +/* DMA RX/TX functions */
3398 +/* ----------------------- */
3399 +
3400 +static void tc_dma_init_rx_list(void) {
3401 + int i;
3402 +
3403 + /* Setup descriptor list except last one */
3404 + for (i = 0; i < (NBR_OF_RX_DESC - 1); i++) {
3405 + RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
3406 + RxDescList[i].command = 0;
3407 + RxDescList[i].next = virt_to_phys(&RxDescList[i + 1]);
3408 + RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
3409 + RxDescList[i].hw_len = 0;
3410 + RxDescList[i].status = 0;
3411 +
3412 + /* DMA IN cache bug. (struct etrax_dma_descr has the same layout as
3413 + USB_IN_Desc for the relevant fields.) */
3414 + prepare_rx_descriptor((struct etrax_dma_descr*)&RxDescList[i]);
3415 +
3416 + }
3417 + /* Special handling of last descriptor */
3418 + RxDescList[i].sw_len = RX_DESC_BUF_SIZE;
3419 + RxDescList[i].command = IO_STATE(USB_IN_command, eol, yes);
3420 + RxDescList[i].next = virt_to_phys(&RxDescList[0]);
3421 + RxDescList[i].buf = virt_to_phys(RxBuf + (i * RX_DESC_BUF_SIZE));
3422 + RxDescList[i].hw_len = 0;
3423 + RxDescList[i].status = 0;
3424 +
3425 + /* Setup list pointers that show progress in list */
3426 + myNextRxDesc = &RxDescList[0];
3427 + myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
3428 +
3429 + flush_etrax_cache();
3430 + /* Point DMA to first descriptor in list and start it */
3431 + *R_DMA_CH9_FIRST = virt_to_phys(myNextRxDesc);
3432 + *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, start);
3433 +}
3434 +
3435 +
3436 +static void tc_dma_init_tx_bulk_list(void) {
3437 + int i;
3438 + volatile struct USB_EP_Desc *epDescr;
3439 +
3440 + for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
3441 + epDescr = &(TxBulkEPList[i]);
3442 + CHECK_ALIGN(epDescr);
3443 + epDescr->hw_len = 0;
3444 + epDescr->command = IO_FIELD(USB_EP_command, epid, i);
3445 + epDescr->sub = 0;
3446 + epDescr->next = virt_to_phys(&TxBulkEPList[i + 1]);
3447 +
3448 + /* Initiate two EPs, disabled and with the eol flag set. No need for any
3449 + preserved epid. */
3450 +
3451 + /* The first one has the intr flag set so we get an interrupt when the DMA
3452 + channel is about to become disabled. */
3453 + CHECK_ALIGN(&TxBulkDummyEPList[i][0]);
3454 + TxBulkDummyEPList[i][0].hw_len = 0;
3455 + TxBulkDummyEPList[i][0].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
3456 + IO_STATE(USB_EP_command, eol, yes) |
3457 + IO_STATE(USB_EP_command, intr, yes));
3458 + TxBulkDummyEPList[i][0].sub = 0;
3459 + TxBulkDummyEPList[i][0].next = virt_to_phys(&TxBulkDummyEPList[i][1]);
3460 +
3461 + /* The second one. */
3462 + CHECK_ALIGN(&TxBulkDummyEPList[i][1]);
3463 + TxBulkDummyEPList[i][1].hw_len = 0;
3464 + TxBulkDummyEPList[i][1].command = (IO_FIELD(USB_EP_command, epid, DUMMY_EPID) |
3465 + IO_STATE(USB_EP_command, eol, yes));
3466 + TxBulkDummyEPList[i][1].sub = 0;
3467 + /* The last dummy's next pointer is the same as the current EP's next pointer. */
3468 + TxBulkDummyEPList[i][1].next = virt_to_phys(&TxBulkEPList[i + 1]);
3469 + }
3470 +
3471 + /* Special handling of last descr in list, make list circular */
3472 + epDescr = &TxBulkEPList[i];
3473 + CHECK_ALIGN(epDescr);
3474 + epDescr->hw_len = 0;
3475 + epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
3476 + IO_FIELD(USB_EP_command, epid, i);
3477 + epDescr->sub = 0;
3478 + epDescr->next = virt_to_phys(&TxBulkEPList[0]);
3479 +
3480 + /* Init DMA sub-channel pointers to last item in each list */
3481 + *R_DMA_CH8_SUB0_EP = virt_to_phys(&TxBulkEPList[i]);
3482 + /* No point in starting the bulk channel yet.
3483 + *R_DMA_CH8_SUB0_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
3484 +}
3485 +
3486 +static void tc_dma_init_tx_ctrl_list(void) {
3487 + int i;
3488 + volatile struct USB_EP_Desc *epDescr;
3489 +
3490 + for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
3491 + epDescr = &(TxCtrlEPList[i]);
3492 + CHECK_ALIGN(epDescr);
3493 + epDescr->hw_len = 0;
3494 + epDescr->command = IO_FIELD(USB_EP_command, epid, i);
3495 + epDescr->sub = 0;
3496 + epDescr->next = virt_to_phys(&TxCtrlEPList[i + 1]);
3497 + }
3498 + /* Special handling of last descr in list, make list circular */
3499 + epDescr = &TxCtrlEPList[i];
3500 + CHECK_ALIGN(epDescr);
3501 + epDescr->hw_len = 0;
3502 + epDescr->command = IO_STATE(USB_EP_command, eol, yes) |
3503 + IO_FIELD(USB_EP_command, epid, i);
3504 + epDescr->sub = 0;
3505 + epDescr->next = virt_to_phys(&TxCtrlEPList[0]);
3506 +
3507 + /* Init DMA sub-channel pointers to last item in each list */
3508 + *R_DMA_CH8_SUB1_EP = virt_to_phys(&TxCtrlEPList[i]);
3509 + /* No point in starting the ctrl channel yet.
3510 + *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB0_CMD, cmd, start); */
3511 +}
3512 +
3513 +
3514 +static void tc_dma_init_tx_intr_list(void) {
3515 + int i;
3516 +
3517 + TxIntrSB_zout.sw_len = 1;
3518 + TxIntrSB_zout.next = 0;
3519 + TxIntrSB_zout.buf = virt_to_phys(&zout_buffer[0]);
3520 + TxIntrSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
3521 + IO_STATE(USB_SB_command, tt, zout) |
3522 + IO_STATE(USB_SB_command, full, yes) |
3523 + IO_STATE(USB_SB_command, eot, yes) |
3524 + IO_STATE(USB_SB_command, eol, yes));
3525 +
3526 + for (i = 0; i < (MAX_INTR_INTERVAL - 1); i++) {
3527 + CHECK_ALIGN(&TxIntrEPList[i]);
3528 + TxIntrEPList[i].hw_len = 0;
3529 + TxIntrEPList[i].command =
3530 + (IO_STATE(USB_EP_command, eof, yes) |
3531 + IO_STATE(USB_EP_command, enable, yes) |
3532 + IO_FIELD(USB_EP_command, epid, INVALID_EPID));
3533 + TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
3534 + TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[i + 1]);
3535 + }
3536 +
3537 + /* Special handling of last descr in list, make list circular */
3538 + CHECK_ALIGN(&TxIntrEPList[i]);
3539 + TxIntrEPList[i].hw_len = 0;
3540 + TxIntrEPList[i].command =
3541 + (IO_STATE(USB_EP_command, eof, yes) |
3542 + IO_STATE(USB_EP_command, eol, yes) |
3543 + IO_STATE(USB_EP_command, enable, yes) |
3544 + IO_FIELD(USB_EP_command, epid, INVALID_EPID));
3545 + TxIntrEPList[i].sub = virt_to_phys(&TxIntrSB_zout);
3546 + TxIntrEPList[i].next = virt_to_phys(&TxIntrEPList[0]);
3547 +
3548 + intr_dbg("Initiated Intr EP descriptor list\n");
3549 +
3550 +
3551 + /* Connect DMA 8 sub-channel 2 to first in list */
3552 + *R_DMA_CH8_SUB2_EP = virt_to_phys(&TxIntrEPList[0]);
3553 +}
3554 +
3555 +static void tc_dma_init_tx_isoc_list(void) {
3556 + int i;
3557 +
3558 + DBFENTER;
3559 +
3560 + /* Read comment at zout_buffer declaration for an explanation to this. */
3561 + TxIsocSB_zout.sw_len = 1;
3562 + TxIsocSB_zout.next = 0;
3563 + TxIsocSB_zout.buf = virt_to_phys(&zout_buffer[0]);
3564 + TxIsocSB_zout.command = (IO_FIELD(USB_SB_command, rem, 0) |
3565 + IO_STATE(USB_SB_command, tt, zout) |
3566 + IO_STATE(USB_SB_command, full, yes) |
3567 + IO_STATE(USB_SB_command, eot, yes) |
3568 + IO_STATE(USB_SB_command, eol, yes));
3569 +
3570 + /* The last isochronous EP descriptor is a dummy. */
3571 + for (i = 0; i < (NBR_OF_EPIDS - 1); i++) {
3572 + CHECK_ALIGN(&TxIsocEPList[i]);
3573 + TxIsocEPList[i].hw_len = 0;
3574 + TxIsocEPList[i].command = IO_FIELD(USB_EP_command, epid, i);
3575 + TxIsocEPList[i].sub = 0;
3576 + TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[i + 1]);
3577 + }
3578 +
3579 + CHECK_ALIGN(&TxIsocEPList[i]);
3580 + TxIsocEPList[i].hw_len = 0;
3581 +
3582 + /* Must enable the last EP descr to get eof interrupt. */
3583 + TxIsocEPList[i].command = (IO_STATE(USB_EP_command, enable, yes) |
3584 + IO_STATE(USB_EP_command, eof, yes) |
3585 + IO_STATE(USB_EP_command, eol, yes) |
3586 + IO_FIELD(USB_EP_command, epid, INVALID_EPID));
3587 + TxIsocEPList[i].sub = virt_to_phys(&TxIsocSB_zout);
3588 + TxIsocEPList[i].next = virt_to_phys(&TxIsocEPList[0]);
3589 +
3590 + *R_DMA_CH8_SUB3_EP = virt_to_phys(&TxIsocEPList[0]);
3591 + *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
3592 +}
3593 +
3594 +static int tc_dma_init(struct usb_hcd *hcd) {
3595 + tc_dma_init_rx_list();
3596 + tc_dma_init_tx_bulk_list();
3597 + tc_dma_init_tx_ctrl_list();
3598 + tc_dma_init_tx_intr_list();
3599 + tc_dma_init_tx_isoc_list();
3600 +
3601 + if (cris_request_dma(USB_TX_DMA_NBR,
3602 + "ETRAX 100LX built-in USB (Tx)",
3603 + DMA_VERBOSE_ON_ERROR,
3604 + dma_usb)) {
3605 + err("Could not allocate DMA ch 8 for USB");
3606 + return -EBUSY;
3607 + }
3608 +
3609 + if (cris_request_dma(USB_RX_DMA_NBR,
3610 + "ETRAX 100LX built-in USB (Rx)",
3611 + DMA_VERBOSE_ON_ERROR,
3612 + dma_usb)) {
3613 + err("Could not allocate DMA ch 9 for USB");
3614 + return -EBUSY;
3615 + }
3616 +
3617 + *R_IRQ_MASK2_SET =
3618 + /* Note that these interrupts are not used. */
3619 + IO_STATE(R_IRQ_MASK2_SET, dma8_sub0_descr, set) |
3620 + /* Sub channel 1 (ctrl) descr. interrupts are used. */
3621 + IO_STATE(R_IRQ_MASK2_SET, dma8_sub1_descr, set) |
3622 + IO_STATE(R_IRQ_MASK2_SET, dma8_sub2_descr, set) |
3623 + /* Sub channel 3 (isoc) descr. interrupts are used. */
3624 + IO_STATE(R_IRQ_MASK2_SET, dma8_sub3_descr, set);
3625 +
3626 + /* Note that the dma9_descr interrupt is not used. */
3627 + *R_IRQ_MASK2_SET =
3628 + IO_STATE(R_IRQ_MASK2_SET, dma9_eop, set) |
3629 + IO_STATE(R_IRQ_MASK2_SET, dma9_descr, set);
3630 +
3631 + if (request_irq(ETRAX_USB_RX_IRQ, tc_dma_rx_interrupt, 0,
3632 + "ETRAX 100LX built-in USB (Rx)", hcd)) {
3633 + err("Could not allocate IRQ %d for USB", ETRAX_USB_RX_IRQ);
3634 + return -EBUSY;
3635 + }
3636 +
3637 + if (request_irq(ETRAX_USB_TX_IRQ, tc_dma_tx_interrupt, 0,
3638 + "ETRAX 100LX built-in USB (Tx)", hcd)) {
3639 + err("Could not allocate IRQ %d for USB", ETRAX_USB_TX_IRQ);
3640 + return -EBUSY;
3641 + }
3642 +
3643 + return 0;
3644 +}
3645 +
3646 +static void tc_dma_destroy(void) {
3647 + free_irq(ETRAX_USB_RX_IRQ, NULL);
3648 + free_irq(ETRAX_USB_TX_IRQ, NULL);
3649 +
3650 + cris_free_dma(USB_TX_DMA_NBR, "ETRAX 100LX built-in USB (Tx)");
3651 + cris_free_dma(USB_RX_DMA_NBR, "ETRAX 100LX built-in USB (Rx)");
3652 +
3653 +}
3654 +
3655 +static void tc_dma_link_intr_urb(struct urb *urb);
3656 +
3657 +/* Handle processing of Bulk, Ctrl and Intr queues */
3658 +static void tc_dma_process_queue(int epid) {
3659 + struct urb *urb;
3660 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
3661 + unsigned long flags;
3662 + char toggle;
3663 +
3664 + if(epid_state[epid].disabled) {
3665 + /* Don't process any URBs on a disabled endpoint */
3666 + return;
3667 + }
3668 +
3669 + /* Do not disturb us while fiddling with EPs and epids */
3670 + local_irq_save(flags);
3671 +
3672 + /* For bulk, Ctrl and Intr can we only have one URB active at a time for
3673 + a specific EP. */
3674 + if(activeUrbList[epid] != NULL) {
3675 + /* An URB is already active on EP, skip checking queue */
3676 + local_irq_restore(flags);
3677 + return;
3678 + }
3679 +
3680 + urb = urb_list_first(epid);
3681 + if(urb == NULL) {
3682 + /* No URB waiting in EP queue. Nothing do to */
3683 + local_irq_restore(flags);
3684 + return;
3685 + }
3686 +
3687 + urb_priv = urb->hcpriv;
3688 + ASSERT(urb_priv != NULL);
3689 + ASSERT(urb_priv->urb_state == NOT_STARTED);
3690 + ASSERT(!usb_pipeisoc(urb->pipe));
3691 +
3692 + /* Remove this URB from the queue and move it to active */
3693 + activeUrbList[epid] = urb;
3694 + urb_list_del(urb, epid);
3695 +
3696 + urb_priv->urb_state = STARTED;
3697 +
3698 + /* Reset error counters (regardless of which direction this traffic is). */
3699 + etrax_epid_clear_error(epid);
3700 +
3701 + /* Special handling of Intr EP lists */
3702 + if(usb_pipeint(urb->pipe)) {
3703 + tc_dma_link_intr_urb(urb);
3704 + local_irq_restore(flags);
3705 + return;
3706 + }
3707 +
3708 + /* Software must preset the toggle bits for Bulk and Ctrl */
3709 + if(usb_pipecontrol(urb->pipe)) {
3710 + /* Toggle bits are initialized only during setup transaction in a
3711 + CTRL transfer */
3712 + etrax_epid_set_toggle(epid, 0, 0);
3713 + etrax_epid_set_toggle(epid, 1, 0);
3714 + } else {
3715 + toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
3716 + usb_pipeout(urb->pipe));
3717 + etrax_epid_set_toggle(epid, usb_pipeout(urb->pipe), toggle);
3718 + }
3719 +
3720 + tc_dbg("Added SBs from (URB:0x%x %s %s) to epid %d: %s\n",
3721 + (unsigned int)urb, str_dir(urb->pipe), str_type(urb->pipe), epid,
3722 + sblist_to_str(urb_priv->first_sb));
3723 +
3724 + /* We start the DMA sub channel without checking if it's running or not,
3725 + because:
3726 + 1) If it's already running, issuing the start command is a nop.
3727 + 2) We avoid a test-and-set race condition. */
3728 + switch(usb_pipetype(urb->pipe)) {
3729 + case PIPE_BULK:
3730 + /* Assert that the EP descriptor is disabled. */
3731 + ASSERT(!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)));
3732 +
3733 + /* Set up and enable the EP descriptor. */
3734 + TxBulkEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
3735 + TxBulkEPList[epid].hw_len = 0;
3736 + TxBulkEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
3737 +
3738 + /* Check if the dummy list is already with us (if several urbs were queued). */
3739 + if (usb_pipein(urb->pipe) && (TxBulkEPList[epid].next != virt_to_phys(&TxBulkDummyEPList[epid][0]))) {
3740 + tc_dbg("Inviting dummy list to the party for urb 0x%lx, epid %d",
3741 + (unsigned long)urb, epid);
3742 +
3743 + /* We don't need to check if the DMA is at this EP or not before changing the
3744 + next pointer, since we will do it in one 32-bit write (EP descriptors are
3745 + 32-bit aligned). */
3746 + TxBulkEPList[epid].next = virt_to_phys(&TxBulkDummyEPList[epid][0]);
3747 + }
3748 +
3749 + restart_dma8_sub0();
3750 +
3751 + /* Update/restart the bulk start timer since we just started the channel.*/
3752 + mod_timer(&bulk_start_timer, jiffies + BULK_START_TIMER_INTERVAL);
3753 + /* Update/restart the bulk eot timer since we just inserted traffic. */
3754 + mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
3755 + break;
3756 + case PIPE_CONTROL:
3757 + /* Assert that the EP descriptor is disabled. */
3758 + ASSERT(!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)));
3759 +
3760 + /* Set up and enable the EP descriptor. */
3761 + TxCtrlEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
3762 + TxCtrlEPList[epid].hw_len = 0;
3763 + TxCtrlEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
3764 +
3765 + *R_DMA_CH8_SUB1_CMD = IO_STATE(R_DMA_CH8_SUB1_CMD, cmd, start);
3766 + break;
3767 + }
3768 + local_irq_restore(flags);
3769 +}
3770 +
3771 +static void tc_dma_link_intr_urb(struct urb *urb) {
3772 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
3773 + volatile struct USB_EP_Desc *tmp_ep;
3774 + struct USB_EP_Desc *ep_desc;
3775 + int i = 0, epid;
3776 + int pool_idx = 0;
3777 +
3778 + ASSERT(urb_priv != NULL);
3779 + epid = urb_priv->epid;
3780 + ASSERT(urb_priv->interval > 0);
3781 + ASSERT(urb_priv->intr_ep_pool_length > 0);
3782 +
3783 + tmp_ep = &TxIntrEPList[0];
3784 +
3785 + /* Only insert one EP descriptor in list for Out Intr URBs.
3786 + We can only handle Out Intr with interval of 128ms because
3787 + it's not possible to insert several Out Intr EPs because they
3788 + are not consumed by the DMA. */
3789 + if(usb_pipeout(urb->pipe)) {
3790 + ep_desc = urb_priv->intr_ep_pool[0];
3791 + ASSERT(ep_desc);
3792 + ep_desc->next = tmp_ep->next;
3793 + tmp_ep->next = virt_to_phys(ep_desc);
3794 + i++;
3795 + } else {
3796 + /* Loop through Intr EP descriptor list and insert EP for URB at
3797 + specified interval */
3798 + do {
3799 + /* Each EP descriptor with eof flag sat signals a new frame */
3800 + if (tmp_ep->command & IO_MASK(USB_EP_command, eof)) {
3801 + /* Insert a EP from URBs EP pool at correct interval */
3802 + if ((i % urb_priv->interval) == 0) {
3803 + ep_desc = urb_priv->intr_ep_pool[pool_idx];
3804 + ASSERT(ep_desc);
3805 + ep_desc->next = tmp_ep->next;
3806 + tmp_ep->next = virt_to_phys(ep_desc);
3807 + pool_idx++;
3808 + ASSERT(pool_idx <= urb_priv->intr_ep_pool_length);
3809 + }
3810 + i++;
3811 + }
3812 + tmp_ep = (struct USB_EP_Desc *)phys_to_virt(tmp_ep->next);
3813 + } while(tmp_ep != &TxIntrEPList[0]);
3814 + }
3815 +
3816 + intr_dbg("Added SBs to intr epid %d: %s interval:%d (%d EP)\n", epid,
3817 + sblist_to_str(urb_priv->first_sb), urb_priv->interval, pool_idx);
3818 +
3819 + /* We start the DMA sub channel without checking if it's running or not,
3820 + because:
3821 + 1) If it's already running, issuing the start command is a nop.
3822 + 2) We avoid a test-and-set race condition. */
3823 + *R_DMA_CH8_SUB2_CMD = IO_STATE(R_DMA_CH8_SUB2_CMD, cmd, start);
3824 +}
3825 +
3826 + /* hinko ignore usb_pipeisoc */
3827 +#if 0
3828 +static void tc_dma_process_isoc_urb(struct urb *urb) {
3829 + unsigned long flags;
3830 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
3831 + int epid;
3832 +
3833 + /* Do not disturb us while fiddling with EPs and epids */
3834 + local_irq_save(flags);
3835 +
3836 + ASSERT(urb_priv);
3837 + ASSERT(urb_priv->first_sb);
3838 + epid = urb_priv->epid;
3839 +
3840 + if(activeUrbList[epid] == NULL) {
3841 + /* EP is idle, so make this URB active */
3842 + activeUrbList[epid] = urb;
3843 + urb_list_del(urb, epid);
3844 + ASSERT(TxIsocEPList[epid].sub == 0);
3845 + ASSERT(!(TxIsocEPList[epid].command &
3846 + IO_STATE(USB_EP_command, enable, yes)));
3847 +
3848 + /* Differentiate between In and Out Isoc. Because In SBs are not consumed*/
3849 + if(usb_pipein(urb->pipe)) {
3850 + /* Each EP for In Isoc will have only one SB descriptor, setup when
3851 + submitting the first active urb. We do it here by copying from URBs
3852 + pre-allocated SB. */
3853 + memcpy((void *)&(TxIsocSBList[epid]), urb_priv->first_sb,
3854 + sizeof(TxIsocSBList[epid]));
3855 + TxIsocEPList[epid].hw_len = 0;
3856 + TxIsocEPList[epid].sub = virt_to_phys(&(TxIsocSBList[epid]));
3857 + } else {
3858 + /* For Out Isoc we attach the pre-allocated list of SBs for the URB */
3859 + TxIsocEPList[epid].hw_len = 0;
3860 + TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
3861 +
3862 + isoc_dbg("Attached first URB:0x%x[%d] to epid:%d first_sb:0x%x"
3863 + " last_sb::0x%x\n",
3864 + (unsigned int)urb, urb_priv->urb_num, epid,
3865 + (unsigned int)(urb_priv->first_sb),
3866 + (unsigned int)(urb_priv->last_sb));
3867 + }
3868 +
3869 + if (urb->transfer_flags & URB_ISO_ASAP) {
3870 + /* The isoc transfer should be started as soon as possible. The
3871 + start_frame field is a return value if URB_ISO_ASAP was set. Comparing
3872 + R_USB_FM_NUMBER with a USB Chief trace shows that the first isoc IN
3873 + token is sent 2 frames later. I'm not sure how this affects usage of
3874 + the start_frame field by the device driver, or how it affects things
3875 + when USB_ISO_ASAP is not set, so therefore there's no compensation for
3876 + the 2 frame "lag" here. */
3877 + urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
3878 + TxIsocEPList[epid].command |= IO_STATE(USB_EP_command, enable, yes);
3879 + urb_priv->urb_state = STARTED;
3880 + isoc_dbg("URB_ISO_ASAP set, urb->start_frame set to %d\n",
3881 + urb->start_frame);
3882 + } else {
3883 + /* Not started yet. */
3884 + urb_priv->urb_state = NOT_STARTED;
3885 + isoc_warn("urb_priv->urb_state set to NOT_STARTED for URB:0x%x\n",
3886 + (unsigned int)urb);
3887 + }
3888 +
3889 + } else {
3890 + /* An URB is already active on the EP. Leave URB in queue and let
3891 + finish_isoc_urb process it after current active URB */
3892 + ASSERT(TxIsocEPList[epid].sub != 0);
3893 +
3894 + if(usb_pipein(urb->pipe)) {
3895 + /* Because there already is a active In URB on this epid we do nothing
3896 + and the finish_isoc_urb() function will handle switching to next URB*/
3897 +
3898 + } else { /* For Out Isoc, insert new URBs traffic last in SB-list. */
3899 + struct USB_SB_Desc *temp_sb_desc;
3900 +
3901 + /* Set state STARTED to all Out Isoc URBs added to SB list because we
3902 + don't know how many of them that are finished before descr interrupt*/
3903 + urb_priv->urb_state = STARTED;
3904 +
3905 + /* Find end of current SB list by looking for SB with eol flag sat */
3906 + temp_sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
3907 + while ((temp_sb_desc->command & IO_MASK(USB_SB_command, eol)) !=
3908 + IO_STATE(USB_SB_command, eol, yes)) {
3909 + ASSERT(temp_sb_desc->next);
3910 + temp_sb_desc = phys_to_virt(temp_sb_desc->next);
3911 + }
3912 +
3913 + isoc_dbg("Appended URB:0x%x[%d] (first:0x%x last:0x%x) to epid:%d"
3914 + " sub:0x%x eol:0x%x\n",
3915 + (unsigned int)urb, urb_priv->urb_num,
3916 + (unsigned int)(urb_priv->first_sb),
3917 + (unsigned int)(urb_priv->last_sb), epid,
3918 + (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
3919 + (unsigned int)temp_sb_desc);
3920 +
3921 + /* Next pointer must be set before eol is removed. */
3922 + temp_sb_desc->next = virt_to_phys(urb_priv->first_sb);
3923 + /* Clear the previous end of list flag since there is a new in the
3924 + added SB descriptor list. */
3925 + temp_sb_desc->command &= ~IO_MASK(USB_SB_command, eol);
3926 +
3927 + if (!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
3928 + __u32 epid_data;
3929 + /* 8.8.5 in Designer's Reference says we should check for and correct
3930 + any errors in the EP here. That should not be necessary if
3931 + epid_attn is handled correctly, so we assume all is ok. */
3932 + epid_data = etrax_epid_iso_get(epid);
3933 + if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) !=
3934 + IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
3935 + isoc_err("Disabled Isoc EP with error:%d on epid:%d when appending"
3936 + " URB:0x%x[%d]\n",
3937 + IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data), epid,
3938 + (unsigned int)urb, urb_priv->urb_num);
3939 + }
3940 +
3941 + /* The SB list was exhausted. */
3942 + if (virt_to_phys(urb_priv->last_sb) != TxIsocEPList[epid].sub) {
3943 + /* The new sublist did not get processed before the EP was
3944 + disabled. Setup the EP again. */
3945 +
3946 + if(virt_to_phys(temp_sb_desc) == TxIsocEPList[epid].sub) {
3947 + isoc_dbg("EP for epid:%d stoped at SB:0x%x before newly inserted"
3948 + ", restarting from this URBs SB:0x%x\n",
3949 + epid, (unsigned int)temp_sb_desc,
3950 + (unsigned int)(urb_priv->first_sb));
3951 + TxIsocEPList[epid].hw_len = 0;
3952 + TxIsocEPList[epid].sub = virt_to_phys(urb_priv->first_sb);
3953 + urb->start_frame = (*R_USB_FM_NUMBER & 0x7ff);
3954 + /* Enable the EP again so data gets processed this time */
3955 + TxIsocEPList[epid].command |=
3956 + IO_STATE(USB_EP_command, enable, yes);
3957 +
3958 + } else {
3959 + /* The EP has been disabled but not at end this URB (god knows
3960 + where). This should generate an epid_attn so we should not be
3961 + here */
3962 + isoc_warn("EP was disabled on sb:0x%x before SB list for"
3963 + " URB:0x%x[%d] got processed\n",
3964 + (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
3965 + (unsigned int)urb, urb_priv->urb_num);
3966 + }
3967 + } else {
3968 + /* This might happend if we are slow on this function and isn't
3969 + an error. */
3970 + isoc_dbg("EP was disabled and finished with SBs from appended"
3971 + " URB:0x%x[%d]\n", (unsigned int)urb, urb_priv->urb_num);
3972 + }
3973 + }
3974 + }
3975 + }
3976 +
3977 + /* Start the DMA sub channel */
3978 + *R_DMA_CH8_SUB3_CMD = IO_STATE(R_DMA_CH8_SUB3_CMD, cmd, start);
3979 +
3980 + local_irq_restore(flags);
3981 +}
3982 +#endif
3983 +
3984 +static void tc_dma_unlink_intr_urb(struct urb *urb) {
3985 + struct crisv10_urb_priv *urb_priv = urb->hcpriv;
3986 + volatile struct USB_EP_Desc *first_ep; /* First EP in the list. */
3987 + volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
3988 + volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
3989 + volatile struct USB_EP_Desc *unlink_ep; /* The one we should remove from
3990 + the list. */
3991 + int count = 0;
3992 + volatile int timeout = 10000;
3993 + int epid;
3994 +
3995 + /* Read 8.8.4 in Designer's Reference, "Removing an EP Descriptor from the
3996 + List". */
3997 + ASSERT(urb_priv);
3998 + ASSERT(urb_priv->intr_ep_pool_length > 0);
3999 + epid = urb_priv->epid;
4000 +
4001 + /* First disable all Intr EPs belonging to epid for this URB */
4002 + first_ep = &TxIntrEPList[0];
4003 + curr_ep = first_ep;
4004 + do {
4005 + next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
4006 + if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
4007 + /* Disable EP */
4008 + next_ep->command &= ~IO_MASK(USB_EP_command, enable);
4009 + }
4010 + curr_ep = phys_to_virt(curr_ep->next);
4011 + } while (curr_ep != first_ep);
4012 +
4013 +
4014 + /* Now unlink all EPs belonging to this epid from Descr list */
4015 + first_ep = &TxIntrEPList[0];
4016 + curr_ep = first_ep;
4017 + do {
4018 + next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
4019 + if (IO_EXTRACT(USB_EP_command, epid, next_ep->command) == epid) {
4020 + /* This is the one we should unlink. */
4021 + unlink_ep = next_ep;
4022 +
4023 + /* Actually unlink the EP from the DMA list. */
4024 + curr_ep->next = unlink_ep->next;
4025 +
4026 + /* Wait until the DMA is no longer at this descriptor. */
4027 + while((*R_DMA_CH8_SUB2_EP == virt_to_phys(unlink_ep)) &&
4028 + (timeout-- > 0));
4029 + if(timeout == 0) {
4030 + warn("Timeout while waiting for DMA-TX-Intr to leave unlink EP\n");
4031 + }
4032 +
4033 + count++;
4034 + }
4035 + curr_ep = phys_to_virt(curr_ep->next);
4036 + } while (curr_ep != first_ep);
4037 +
4038 + if(count != urb_priv->intr_ep_pool_length) {
4039 + intr_warn("Unlinked %d of %d Intr EPs for URB:0x%x[%d]\n", count,
4040 + urb_priv->intr_ep_pool_length, (unsigned int)urb,
4041 + urb_priv->urb_num);
4042 + } else {
4043 + intr_dbg("Unlinked %d of %d interrupt EPs for URB:0x%x\n", count,
4044 + urb_priv->intr_ep_pool_length, (unsigned int)urb);
4045 + }
4046 +}
4047 +
4048 +static void check_finished_bulk_tx_epids(struct usb_hcd *hcd,
4049 + int timer) {
4050 + unsigned long flags;
4051 + int epid;
4052 + struct urb *urb;
4053 + struct crisv10_urb_priv * urb_priv;
4054 + __u32 epid_data;
4055 +
4056 + /* Protect TxEPList */
4057 + local_irq_save(flags);
4058 +
4059 + for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
4060 + /* A finished EP descriptor is disabled and has a valid sub pointer */
4061 + if (!(TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
4062 + (TxBulkEPList[epid].sub != 0)) {
4063 +
4064 + /* Get the active URB for this epid */
4065 + urb = activeUrbList[epid];
4066 + /* Sanity checks */
4067 + ASSERT(urb);
4068 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
4069 + ASSERT(urb_priv);
4070 +
4071 + /* Only handle finished out Bulk EPs here,
4072 + and let RX interrupt take care of the rest */
4073 + if(!epid_out_traffic(epid)) {
4074 + continue;
4075 + }
4076 +
4077 + if(timer) {
4078 + tc_warn("Found finished %s Bulk epid:%d URB:0x%x[%d] from timeout\n",
4079 + epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
4080 + urb_priv->urb_num);
4081 + } else {
4082 + tc_dbg("Found finished %s Bulk epid:%d URB:0x%x[%d] from interrupt\n",
4083 + epid_out_traffic(epid) ? "Out" : "In", epid, (unsigned int)urb,
4084 + urb_priv->urb_num);
4085 + }
4086 +
4087 + if(urb_priv->urb_state == UNLINK) {
4088 + /* This Bulk URB is requested to be unlinked, that means that the EP
4089 + has been disabled and we might not have sent all data */
4090 + tc_finish_urb(hcd, urb, urb->status);
4091 + continue;
4092 + }
4093 +
4094 + ASSERT(urb_priv->urb_state == STARTED);
4095 + if (phys_to_virt(TxBulkEPList[epid].sub) != urb_priv->last_sb) {
4096 + tc_err("Endpoint got disabled before reaching last sb\n");
4097 + }
4098 +
4099 + epid_data = etrax_epid_get(epid);
4100 + if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
4101 + IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
4102 + /* This means that the endpoint has no error, is disabled
4103 + and had inserted traffic, i.e. transfer successfully completed. */
4104 + tc_finish_urb(hcd, urb, 0);
4105 + } else {
4106 + /* Shouldn't happen. We expect errors to be caught by epid
4107 + attention. */
4108 + tc_err("Found disabled bulk EP desc (epid:%d error:%d)\n",
4109 + epid, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
4110 + }
4111 + } else {
4112 + tc_dbg("Ignoring In Bulk epid:%d, let RX interrupt handle it\n", epid);
4113 + }
4114 + }
4115 +
4116 + local_irq_restore(flags);
4117 +}
4118 +
4119 +static void check_finished_ctrl_tx_epids(struct usb_hcd *hcd) {
4120 + unsigned long flags;
4121 + int epid;
4122 + struct urb *urb;
4123 + struct crisv10_urb_priv * urb_priv;
4124 + __u32 epid_data;
4125 +
4126 + /* Protect TxEPList */
4127 + local_irq_save(flags);
4128 +
4129 + for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
4130 + if(epid == DUMMY_EPID)
4131 + continue;
4132 +
4133 + /* A finished EP descriptor is disabled and has a valid sub pointer */
4134 + if (!(TxCtrlEPList[epid].command & IO_MASK(USB_EP_command, enable)) &&
4135 + (TxCtrlEPList[epid].sub != 0)) {
4136 +
4137 + /* Get the active URB for this epid */
4138 + urb = activeUrbList[epid];
4139 +
4140 + if(urb == NULL) {
4141 + tc_warn("Found finished Ctrl epid:%d with no active URB\n", epid);
4142 + continue;
4143 + }
4144 +
4145 + /* Sanity checks */
4146 + ASSERT(usb_pipein(urb->pipe));
4147 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
4148 + ASSERT(urb_priv);
4149 + if (phys_to_virt(TxCtrlEPList[epid].sub) != urb_priv->last_sb) {
4150 + tc_err("Endpoint got disabled before reaching last sb\n");
4151 + }
4152 +
4153 + epid_data = etrax_epid_get(epid);
4154 + if (IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data) ==
4155 + IO_STATE_VALUE(R_USB_EPT_DATA, error_code, no_error)) {
4156 + /* This means that the endpoint has no error, is disabled
4157 + and had inserted traffic, i.e. transfer successfully completed. */
4158 +
4159 + /* Check if RX-interrupt for In Ctrl has been processed before
4160 + finishing the URB */
4161 + if(urb_priv->ctrl_rx_done) {
4162 + tc_dbg("Finishing In Ctrl URB:0x%x[%d] in tx_interrupt\n",
4163 + (unsigned int)urb, urb_priv->urb_num);
4164 + tc_finish_urb(hcd, urb, 0);
4165 + } else {
4166 + /* If we get zout descriptor interrupt before RX was done for a
4167 + In Ctrl transfer, then we flag that and it will be finished
4168 + in the RX-Interrupt */
4169 + urb_priv->ctrl_zout_done = 1;
4170 + tc_dbg("Got zout descr interrupt before RX interrupt\n");
4171 + }
4172 + } else {
4173 + /* Shouldn't happen. We expect errors to be caught by epid
4174 + attention. */
4175 + tc_err("Found disabled Ctrl EP desc (epid:%d URB:0x%x[%d]) error_code:%d\n", epid, (unsigned int)urb, urb_priv->urb_num, IO_EXTRACT(R_USB_EPT_DATA, error_code, epid_data));
4176 + __dump_ep_desc(&(TxCtrlEPList[epid]));
4177 + __dump_ept_data(epid);
4178 + }
4179 + }
4180 + }
4181 + local_irq_restore(flags);
4182 +}
4183 +
4184 + /* hinko ignore usb_pipeisoc */
4185 +#if 0
4186 +/* This function goes through all epids that are setup for Out Isoc transfers
4187 + and marks (isoc_out_done) all queued URBs that the DMA has finished
4188 + transfer for.
4189 + No URB completetion is done here to make interrupt routine return quickly.
4190 + URBs are completed later with help of complete_isoc_bottom_half() that
4191 + becomes schedules when this functions is finished. */
4192 +static void check_finished_isoc_tx_epids(void) {
4193 + unsigned long flags;
4194 + int epid;
4195 + struct urb *urb;
4196 + struct crisv10_urb_priv * urb_priv;
4197 + struct USB_SB_Desc* sb_desc;
4198 + int epid_done;
4199 +
4200 + /* Protect TxIsocEPList */
4201 + local_irq_save(flags);
4202 +
4203 + for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
4204 + if (TxIsocEPList[epid].sub == 0 || epid == INVALID_EPID ||
4205 + !epid_out_traffic(epid)) {
4206 + /* Nothing here to see. */
4207 + continue;
4208 + }
4209 + ASSERT(epid_inuse(epid));
4210 + ASSERT(epid_isoc(epid));
4211 +
4212 + sb_desc = phys_to_virt(TxIsocEPList[epid].sub);
4213 + /* Find the last descriptor of the currently active URB for this ep.
4214 + This is the first descriptor in the sub list marked for a descriptor
4215 + interrupt. */
4216 + while (sb_desc && !IO_EXTRACT(USB_SB_command, intr, sb_desc->command)) {
4217 + sb_desc = sb_desc->next ? phys_to_virt(sb_desc->next) : 0;
4218 + }
4219 + ASSERT(sb_desc);
4220 +
4221 + isoc_dbg("Descr IRQ checking epid:%d sub:0x%x intr:0x%x\n",
4222 + epid, (unsigned int)phys_to_virt(TxIsocEPList[epid].sub),
4223 + (unsigned int)sb_desc);
4224 +
4225 + urb = activeUrbList[epid];
4226 + if(urb == NULL) {
4227 + isoc_err("Isoc Descr irq on epid:%d with no active URB\n", epid);
4228 + continue;
4229 + }
4230 +
4231 + epid_done = 0;
4232 + while(urb && !epid_done) {
4233 + /* Sanity check. */
4234 + ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
4235 + ASSERT(usb_pipeout(urb->pipe));
4236 +
4237 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
4238 + ASSERT(urb_priv);
4239 + ASSERT(urb_priv->urb_state == STARTED ||
4240 + urb_priv->urb_state == UNLINK);
4241 +
4242 + if (sb_desc != urb_priv->last_sb) {
4243 + /* This urb has been sent. */
4244 + urb_priv->isoc_out_done = 1;
4245 +
4246 + } else { /* Found URB that has last_sb as the interrupt reason */
4247 +
4248 + /* Check if EP has been disabled, meaning that all transfers are done*/
4249 + if(!(TxIsocEPList[epid].command & IO_MASK(USB_EP_command, enable))) {
4250 + ASSERT((sb_desc->command & IO_MASK(USB_SB_command, eol)) ==
4251 + IO_STATE(USB_SB_command, eol, yes));
4252 + ASSERT(sb_desc->next == 0);
4253 + urb_priv->isoc_out_done = 1;
4254 + } else {
4255 + isoc_dbg("Skipping URB:0x%x[%d] because EP not disabled yet\n",
4256 + (unsigned int)urb, urb_priv->urb_num);
4257 + }
4258 + /* Stop looking any further in queue */
4259 + epid_done = 1;
4260 + }
4261 +
4262 + if (!epid_done) {
4263 + if(urb == activeUrbList[epid]) {
4264 + urb = urb_list_first(epid);
4265 + } else {
4266 + urb = urb_list_next(urb, epid);
4267 + }
4268 + }
4269 + } /* END: while(urb && !epid_done) */
4270 + }
4271 +
4272 + local_irq_restore(flags);
4273 +}
4274 +
4275 +
4276 +/* This is where the Out Isoc URBs are realy completed. This function is
4277 + scheduled from tc_dma_tx_interrupt() when one or more Out Isoc transfers
4278 + are done. This functions completes all URBs earlier marked with
4279 + isoc_out_done by fast interrupt routine check_finished_isoc_tx_epids() */
4280 +
4281 +static void complete_isoc_bottom_half(void *data) {
4282 + struct crisv10_isoc_complete_data *comp_data;
4283 + struct usb_iso_packet_descriptor *packet;
4284 + struct crisv10_urb_priv * urb_priv;
4285 + unsigned long flags;
4286 + struct urb* urb;
4287 + int epid_done;
4288 + int epid;
4289 + int i;
4290 +
4291 + comp_data = (struct crisv10_isoc_complete_data*)data;
4292 +
4293 + local_irq_save(flags);
4294 +
4295 + for (epid = 0; epid < NBR_OF_EPIDS - 1; epid++) {
4296 + if(!epid_inuse(epid) || !epid_isoc(epid) || !epid_out_traffic(epid) || epid == DUMMY_EPID) {
4297 + /* Only check valid Out Isoc epids */
4298 + continue;
4299 + }
4300 +
4301 + isoc_dbg("Isoc bottom-half checking epid:%d, sub:0x%x\n", epid,
4302 + (unsigned int)phys_to_virt(TxIsocEPList[epid].sub));
4303 +
4304 + /* The descriptor interrupt handler has marked all transmitted Out Isoc
4305 + URBs with isoc_out_done. Now we traverse all epids and for all that
4306 + have out Isoc traffic we traverse its URB list and complete the
4307 + transmitted URBs. */
4308 + epid_done = 0;
4309 + while (!epid_done) {
4310 +
4311 + /* Get the active urb (if any) */
4312 + urb = activeUrbList[epid];
4313 + if (urb == 0) {
4314 + isoc_dbg("No active URB on epid:%d anymore\n", epid);
4315 + epid_done = 1;
4316 + continue;
4317 + }
4318 +
4319 + /* Sanity check. */
4320 + ASSERT(usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS);
4321 + ASSERT(usb_pipeout(urb->pipe));
4322 +
4323 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
4324 + ASSERT(urb_priv);
4325 +
4326 + if (!(urb_priv->isoc_out_done)) {
4327 + /* We have reached URB that isn't flaged done yet, stop traversing. */
4328 + isoc_dbg("Stoped traversing Out Isoc URBs on epid:%d"
4329 + " before not yet flaged URB:0x%x[%d]\n",
4330 + epid, (unsigned int)urb, urb_priv->urb_num);
4331 + epid_done = 1;
4332 + continue;
4333 + }
4334 +
4335 + /* This urb has been sent. */
4336 + isoc_dbg("Found URB:0x%x[%d] that is flaged isoc_out_done\n",
4337 + (unsigned int)urb, urb_priv->urb_num);
4338 +
4339 + /* Set ok on transfered packets for this URB and finish it */
4340 + for (i = 0; i < urb->number_of_packets; i++) {
4341 + packet = &urb->iso_frame_desc[i];
4342 + packet->status = 0;
4343 + packet->actual_length = packet->length;
4344 + }
4345 + urb_priv->isoc_packet_counter = urb->number_of_packets;
4346 + tc_finish_urb(comp_data->hcd, urb, 0);
4347 +
4348 + } /* END: while(!epid_done) */
4349 + } /* END: for(epid...) */
4350 +
4351 + local_irq_restore(flags);
4352 + kmem_cache_free(isoc_compl_cache, comp_data);
4353 +}
4354 +#endif
4355 +
4356 +static void check_finished_intr_tx_epids(struct usb_hcd *hcd) {
4357 + unsigned long flags;
4358 + int epid;
4359 + struct urb *urb;
4360 + struct crisv10_urb_priv * urb_priv;
4361 + volatile struct USB_EP_Desc *curr_ep; /* Current EP, the iterator. */
4362 + volatile struct USB_EP_Desc *next_ep; /* The EP after current. */
4363 +
4364 + /* Protect TxintrEPList */
4365 + local_irq_save(flags);
4366 +
4367 + for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
4368 + if(!epid_inuse(epid) || !epid_intr(epid) || !epid_out_traffic(epid)) {
4369 + /* Nothing to see on this epid. Only check valid Out Intr epids */
4370 + continue;
4371 + }
4372 +
4373 + urb = activeUrbList[epid];
4374 + if(urb == 0) {
4375 + intr_warn("Found Out Intr epid:%d with no active URB\n", epid);
4376 + continue;
4377 + }
4378 +
4379 + /* Sanity check. */
4380 + ASSERT(usb_pipetype(urb->pipe) == PIPE_INTERRUPT);
4381 + ASSERT(usb_pipeout(urb->pipe));
4382 +
4383 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
4384 + ASSERT(urb_priv);
4385 +
4386 + /* Go through EPs between first and second sof-EP. It's here Out Intr EPs
4387 + are inserted.*/
4388 + curr_ep = &TxIntrEPList[0];
4389 + do {
4390 + next_ep = (struct USB_EP_Desc *)phys_to_virt(curr_ep->next);
4391 + if(next_ep == urb_priv->intr_ep_pool[0]) {
4392 + /* We found the Out Intr EP for this epid */
4393 +
4394 + /* Disable it so it doesn't get processed again */
4395 + next_ep->command &= ~IO_MASK(USB_EP_command, enable);
4396 +
4397 + /* Finish the active Out Intr URB with status OK */
4398 + tc_finish_urb(hcd, urb, 0);
4399 + }
4400 + curr_ep = phys_to_virt(curr_ep->next);
4401 + } while (curr_ep != &TxIntrEPList[1]);
4402 +
4403 + }
4404 + local_irq_restore(flags);
4405 +}
4406 +
4407 +/* Interrupt handler for DMA8/IRQ24 with subchannels (called from hardware intr) */
4408 +static irqreturn_t tc_dma_tx_interrupt(int irq, void *vhc) {
4409 + struct usb_hcd *hcd = (struct usb_hcd*)vhc;
4410 + ASSERT(hcd);
4411 +
4412 + if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub0_descr)) {
4413 + /* Clear this interrupt */
4414 + *R_DMA_CH8_SUB0_CLR_INTR = IO_STATE(R_DMA_CH8_SUB0_CLR_INTR, clr_descr, do);
4415 + restart_dma8_sub0();
4416 + }
4417 +
4418 + if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub1_descr)) {
4419 + /* Clear this interrupt */
4420 + *R_DMA_CH8_SUB1_CLR_INTR = IO_STATE(R_DMA_CH8_SUB1_CLR_INTR, clr_descr, do);
4421 + check_finished_ctrl_tx_epids(hcd);
4422 + }
4423 +
4424 + if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub2_descr)) {
4425 + /* Clear this interrupt */
4426 + *R_DMA_CH8_SUB2_CLR_INTR = IO_STATE(R_DMA_CH8_SUB2_CLR_INTR, clr_descr, do);
4427 + check_finished_intr_tx_epids(hcd);
4428 + }
4429 +
4430 + /* hinko ignore usb_pipeisoc */
4431 +#if 0
4432 + if (*R_IRQ_READ2 & IO_MASK(R_IRQ_READ2, dma8_sub3_descr)) {
4433 + struct crisv10_isoc_complete_data* comp_data;
4434 +
4435 + /* Flag done Out Isoc for later completion */
4436 + check_finished_isoc_tx_epids();
4437 +
4438 + /* Clear this interrupt */
4439 + *R_DMA_CH8_SUB3_CLR_INTR = IO_STATE(R_DMA_CH8_SUB3_CLR_INTR, clr_descr, do);
4440 + /* Schedule bottom half of Out Isoc completion function. This function
4441 + finishes the URBs marked with isoc_out_done */
4442 + comp_data = (struct crisv10_isoc_complete_data*)
4443 + kmem_cache_alloc(isoc_compl_cache, GFP_ATOMIC);
4444 + ASSERT(comp_data != NULL);
4445 + comp_data ->hcd = hcd;
4446 +
4447 + //INIT_WORK(&comp_data->usb_bh, complete_isoc_bottom_half, comp_data);
4448 + INIT_WORK(&comp_data->usb_bh, complete_isoc_bottom_half);
4449 + schedule_work(&comp_data->usb_bh);
4450 + }
4451 +#endif
4452 +
4453 + return IRQ_HANDLED;
4454 +}
4455 +
4456 +/* Interrupt handler for DMA9/IRQ25 (called from hardware intr) */
4457 +static irqreturn_t tc_dma_rx_interrupt(int irq, void *vhc) {
4458 + unsigned long flags;
4459 + struct urb *urb;
4460 + struct usb_hcd *hcd = (struct usb_hcd*)vhc;
4461 + struct crisv10_urb_priv *urb_priv;
4462 + int epid = 0;
4463 + int real_error;
4464 +
4465 + ASSERT(hcd);
4466 +
4467 + /* Clear this interrupt. */
4468 + *R_DMA_CH9_CLR_INTR = IO_STATE(R_DMA_CH9_CLR_INTR, clr_eop, do);
4469 +
4470 + /* Custom clear interrupt for this interrupt */
4471 + /* The reason we cli here is that we call the driver's callback functions. */
4472 + local_irq_save(flags);
4473 +
4474 + /* Note that this while loop assumes that all packets span only
4475 + one rx descriptor. */
4476 + while(myNextRxDesc->status & IO_MASK(USB_IN_status, eop)) {
4477 + epid = IO_EXTRACT(USB_IN_status, epid, myNextRxDesc->status);
4478 + /* Get the active URB for this epid */
4479 + urb = activeUrbList[epid];
4480 +
4481 + ASSERT(epid_inuse(epid));
4482 + if (!urb) {
4483 + dma_err("No urb for epid %d in rx interrupt\n", epid);
4484 + goto skip_out;
4485 + }
4486 +
4487 + /* Check if any errors on epid */
4488 + real_error = 0;
4489 + if (myNextRxDesc->status & IO_MASK(USB_IN_status, error)) {
4490 + __u32 r_usb_ept_data;
4491 +
4492 + if (usb_pipeisoc(urb->pipe)) {
4493 + r_usb_ept_data = etrax_epid_iso_get(epid);
4494 + if((r_usb_ept_data & IO_MASK(R_USB_EPT_DATA_ISO, valid)) &&
4495 + (IO_EXTRACT(R_USB_EPT_DATA_ISO, error_code, r_usb_ept_data) == 0) &&
4496 + (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata))) {
4497 + /* Not an error, just a failure to receive an expected iso
4498 + in packet in this frame. This is not documented
4499 + in the designers reference. Continue processing.
4500 + */
4501 + } else real_error = 1;
4502 + } else real_error = 1;
4503 + }
4504 +
4505 + if(real_error) {
4506 + dma_err("Error in RX descr on epid:%d for URB 0x%x",
4507 + epid, (unsigned int)urb);
4508 + dump_ept_data(epid);
4509 + dump_in_desc(myNextRxDesc);
4510 + goto skip_out;
4511 + }
4512 +
4513 + urb_priv = (struct crisv10_urb_priv *)urb->hcpriv;
4514 + ASSERT(urb_priv);
4515 + ASSERT(urb_priv->urb_state == STARTED ||
4516 + urb_priv->urb_state == UNLINK);
4517 +
4518 + if ((usb_pipetype(urb->pipe) == PIPE_BULK) ||
4519 + (usb_pipetype(urb->pipe) == PIPE_CONTROL) ||
4520 + (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) {
4521 +
4522 + /* We get nodata for empty data transactions, and the rx descriptor's
4523 + hw_len field is not valid in that case. No data to copy in other
4524 + words. */
4525 + if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
4526 + /* No data to copy */
4527 + } else {
4528 + /*
4529 + dma_dbg("Processing RX for URB:0x%x epid:%d (data:%d ofs:%d)\n",
4530 + (unsigned int)urb, epid, myNextRxDesc->hw_len,
4531 + urb_priv->rx_offset);
4532 + */
4533 + /* Only copy data if URB isn't flaged to be unlinked*/
4534 + if(urb_priv->urb_state != UNLINK) {
4535 + /* Make sure the data fits in the buffer. */
4536 + if(urb_priv->rx_offset + myNextRxDesc->hw_len
4537 + <= urb->transfer_buffer_length) {
4538 +
4539 + /* Copy the data to URBs buffer */
4540 + memcpy(urb->transfer_buffer + urb_priv->rx_offset,
4541 + phys_to_virt(myNextRxDesc->buf), myNextRxDesc->hw_len);
4542 + urb_priv->rx_offset += myNextRxDesc->hw_len;
4543 + } else {
4544 + /* Signal overflow when returning URB */
4545 + urb->status = -EOVERFLOW;
4546 + tc_finish_urb_later(hcd, urb, urb->status);
4547 + }
4548 + }
4549 + }
4550 +
4551 + /* Check if it was the last packet in the transfer */
4552 + if (myNextRxDesc->status & IO_MASK(USB_IN_status, eot)) {
4553 + /* Special handling for In Ctrl URBs. */
4554 + if(usb_pipecontrol(urb->pipe) && usb_pipein(urb->pipe) &&
4555 + !(urb_priv->ctrl_zout_done)) {
4556 + /* Flag that RX part of Ctrl transfer is done. Because zout descr
4557 + interrupt hasn't happend yet will the URB be finished in the
4558 + TX-Interrupt. */
4559 + urb_priv->ctrl_rx_done = 1;
4560 + tc_dbg("Not finishing In Ctrl URB:0x%x from rx_interrupt, waiting"
4561 + " for zout\n", (unsigned int)urb);
4562 + } else {
4563 + tc_finish_urb(hcd, urb, 0);
4564 + }
4565 + }
4566 + } else { /* ISOC RX */
4567 + /*
4568 + isoc_dbg("Processing RX for epid:%d (URB:0x%x) ISOC pipe\n",
4569 + epid, (unsigned int)urb);
4570 + */
4571 +
4572 + struct usb_iso_packet_descriptor *packet;
4573 +
4574 + if (urb_priv->urb_state == UNLINK) {
4575 + isoc_warn("Ignoring Isoc Rx data for urb being unlinked.\n");
4576 + goto skip_out;
4577 + } else if (urb_priv->urb_state == NOT_STARTED) {
4578 + isoc_err("What? Got Rx data for Isoc urb that isn't started?\n");
4579 + goto skip_out;
4580 + }
4581 +
4582 + packet = &urb->iso_frame_desc[urb_priv->isoc_packet_counter];
4583 + ASSERT(packet);
4584 + packet->status = 0;
4585 +
4586 + if (myNextRxDesc->status & IO_MASK(USB_IN_status, nodata)) {
4587 + /* We get nodata for empty data transactions, and the rx descriptor's
4588 + hw_len field is not valid in that case. We copy 0 bytes however to
4589 + stay in synch. */
4590 + packet->actual_length = 0;
4591 + } else {
4592 + packet->actual_length = myNextRxDesc->hw_len;
4593 + /* Make sure the data fits in the buffer. */
4594 + ASSERT(packet->actual_length <= packet->length);
4595 + memcpy(urb->transfer_buffer + packet->offset,
4596 + phys_to_virt(myNextRxDesc->buf), packet->actual_length);
4597 + if(packet->actual_length > 0)
4598 + isoc_dbg("Copied %d bytes, packet %d for URB:0x%x[%d]\n",
4599 + packet->actual_length, urb_priv->isoc_packet_counter,
4600 + (unsigned int)urb, urb_priv->urb_num);
4601 + }
4602 +
4603 + /* Increment the packet counter. */
4604 + urb_priv->isoc_packet_counter++;
4605 +
4606 + /* Note that we don't care about the eot field in the rx descriptor's
4607 + status. It will always be set for isoc traffic. */
4608 + if (urb->number_of_packets == urb_priv->isoc_packet_counter) {
4609 + /* Complete the urb with status OK. */
4610 + tc_finish_urb(hcd, urb, 0);
4611 + }
4612 + }
4613 +
4614 + skip_out:
4615 + myNextRxDesc->status = 0;
4616 + myNextRxDesc->command |= IO_MASK(USB_IN_command, eol);
4617 + myLastRxDesc->command &= ~IO_MASK(USB_IN_command, eol);
4618 + myLastRxDesc = myNextRxDesc;
4619 + myNextRxDesc = phys_to_virt(myNextRxDesc->next);
4620 + flush_etrax_cache();
4621 + *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, restart);
4622 + }
4623 +
4624 + local_irq_restore(flags);
4625 +
4626 + return IRQ_HANDLED;
4627 +}
4628 +
4629 +static void tc_bulk_start_timer_func(unsigned long dummy) {
4630 + /* We might enable an EP descriptor behind the current DMA position when
4631 + it's about to decide that there are no more bulk traffic and it should
4632 + stop the bulk channel.
4633 + Therefore we periodically check if the bulk channel is stopped and there
4634 + is an enabled bulk EP descriptor, in which case we start the bulk
4635 + channel. */
4636 +
4637 + if (!(*R_DMA_CH8_SUB0_CMD & IO_MASK(R_DMA_CH8_SUB0_CMD, cmd))) {
4638 + int epid;
4639 +
4640 + timer_dbg("bulk_start_timer: Bulk DMA channel not running.\n");
4641 +
4642 + for (epid = 0; epid < NBR_OF_EPIDS; epid++) {
4643 + if (TxBulkEPList[epid].command & IO_MASK(USB_EP_command, enable)) {
4644 + timer_warn("Found enabled EP for epid %d, starting bulk channel.\n",
4645 + epid);
4646 + restart_dma8_sub0();
4647 +
4648 + /* Restart the bulk eot timer since we just started the bulk channel.*/
4649 + mod_timer(&bulk_eot_timer, jiffies + BULK_EOT_TIMER_INTERVAL);
4650 +
4651 + /* No need to search any further. */
4652 + break;
4653 + }
4654 + }
4655 + } else {
4656 + timer_dbg("bulk_start_timer: Bulk DMA channel running.\n");
4657 + }
4658 +}
4659 +
4660 +static void tc_bulk_eot_timer_func(unsigned long dummy) {
4661 + struct usb_hcd *hcd = (struct usb_hcd*)dummy;
4662 + ASSERT(hcd);
4663 + /* Because of a race condition in the top half, we might miss a bulk eot.
4664 + This timer "simulates" a bulk eot if we don't get one for a while,
4665 + hopefully correcting the situation. */
4666 + timer_dbg("bulk_eot_timer timed out.\n");
4667 + check_finished_bulk_tx_epids(hcd, 1);
4668 +}
4669 +
4670 +
4671 +/*************************************************************/
4672 +/*************************************************************/
4673 +/* Device driver block */
4674 +/*************************************************************/
4675 +/*************************************************************/
4676 +
4677 +/* Forward declarations for device driver functions */
4678 +static int devdrv_hcd_probe(struct device *);
4679 +static int devdrv_hcd_remove(struct device *);
4680 +#ifdef CONFIG_PM
4681 +static int devdrv_hcd_suspend(struct device *, u32, u32);
4682 +static int devdrv_hcd_resume(struct device *, u32);
4683 +#endif /* CONFIG_PM */
4684 +
4685 +/* the device */
4686 +static struct platform_device *devdrv_hc_platform_device;
4687 +
4688 +/* device driver interface */
4689 +static struct device_driver devdrv_hc_device_driver = {
4690 + .name = (char *) hc_name,
4691 + .bus = &platform_bus_type,
4692 +
4693 + .probe = devdrv_hcd_probe,
4694 + .remove = devdrv_hcd_remove,
4695 +
4696 +#ifdef CONFIG_PM
4697 + .suspend = devdrv_hcd_suspend,
4698 + .resume = devdrv_hcd_resume,
4699 +#endif /* CONFIG_PM */
4700 +};
4701 +
4702 +/* initialize the host controller and driver */
4703 +static int __init_or_module devdrv_hcd_probe(struct device *dev)
4704 +{
4705 + struct usb_hcd *hcd;
4706 + struct crisv10_hcd *crisv10_hcd;
4707 + int retval;
4708 +
4709 + /* Check DMA burst length */
4710 + if(IO_EXTRACT(R_BUS_CONFIG, dma_burst, *R_BUS_CONFIG) !=
4711 + IO_STATE(R_BUS_CONFIG, dma_burst, burst32)) {
4712 + devdrv_err("Invalid DMA burst length in Etrax 100LX,"
4713 + " needs to be 32\n");
4714 + return -EPERM;
4715 + }
4716 +
4717 + hcd = usb_create_hcd(&crisv10_hc_driver, dev, dev->bus_id);
4718 + if (!hcd)
4719 + return -ENOMEM;
4720 +
4721 + crisv10_hcd = hcd_to_crisv10_hcd(hcd);
4722 + spin_lock_init(&crisv10_hcd->lock);
4723 + crisv10_hcd->num_ports = num_ports();
4724 + crisv10_hcd->running = 0;
4725 +
4726 + dev_set_drvdata(dev, crisv10_hcd);
4727 +
4728 + devdrv_dbg("ETRAX USB IRQs HC:%d RX:%d TX:%d\n", ETRAX_USB_HC_IRQ,
4729 + ETRAX_USB_RX_IRQ, ETRAX_USB_TX_IRQ);
4730 +
4731 + /* Print out chip version read from registers */
4732 + int rev_maj = *R_USB_REVISION & IO_MASK(R_USB_REVISION, major);
4733 + int rev_min = *R_USB_REVISION & IO_MASK(R_USB_REVISION, minor);
4734 + if(rev_min == 0) {
4735 + devdrv_info("Etrax 100LX USB Revision %d v1,2\n", rev_maj);
4736 + } else {
4737 + devdrv_info("Etrax 100LX USB Revision %d v%d\n", rev_maj, rev_min);
4738 + }
4739 +
4740 + devdrv_info("Bulk timer interval, start:%d eot:%d\n",
4741 + BULK_START_TIMER_INTERVAL,
4742 + BULK_EOT_TIMER_INTERVAL);
4743 +
4744 +
4745 + /* Init root hub data structures */
4746 + if(rh_init()) {
4747 + devdrv_err("Failed init data for Root Hub\n");
4748 + retval = -ENOMEM;
4749 + }
4750 +
4751 + if(port_in_use(0)) {
4752 + if (cris_request_io_interface(if_usb_1, "ETRAX100LX USB-HCD")) {
4753 + printk(KERN_CRIT "usb-host: request IO interface usb1 failed");
4754 + retval = -EBUSY;
4755 + goto out;
4756 + }
4757 + devdrv_info("Claimed interface for USB physical port 1\n");
4758 + }
4759 + if(port_in_use(1)) {
4760 + if (cris_request_io_interface(if_usb_2, "ETRAX100LX USB-HCD")) {
4761 + /* Free first interface if second failed to be claimed */
4762 + if(port_in_use(0)) {
4763 + cris_free_io_interface(if_usb_1);
4764 + }
4765 + printk(KERN_CRIT "usb-host: request IO interface usb2 failed");
4766 + retval = -EBUSY;
4767 + goto out;
4768 + }
4769 + devdrv_info("Claimed interface for USB physical port 2\n");
4770 + }
4771 +
4772 + /* Init transfer controller structs and locks */
4773 + if((retval = tc_init(hcd)) != 0) {
4774 + goto out;
4775 + }
4776 +
4777 + /* Attach interrupt functions for DMA and init DMA controller */
4778 + if((retval = tc_dma_init(hcd)) != 0) {
4779 + goto out;
4780 + }
4781 +
4782 + /* Attach the top IRQ handler for USB controller interrupts */
4783 + if (request_irq(ETRAX_USB_HC_IRQ, crisv10_hcd_top_irq, 0,
4784 + "ETRAX 100LX built-in USB (HC)", hcd)) {
4785 + err("Could not allocate IRQ %d for USB", ETRAX_USB_HC_IRQ);
4786 + retval = -EBUSY;
4787 + goto out;
4788 + }
4789 +
4790 + /* iso_eof is only enabled when isoc traffic is running. */
4791 + *R_USB_IRQ_MASK_SET =
4792 + /* IO_STATE(R_USB_IRQ_MASK_SET, iso_eof, set) | */
4793 + IO_STATE(R_USB_IRQ_MASK_SET, bulk_eot, set) |
4794 + IO_STATE(R_USB_IRQ_MASK_SET, epid_attn, set) |
4795 + IO_STATE(R_USB_IRQ_MASK_SET, port_status, set) |
4796 + IO_STATE(R_USB_IRQ_MASK_SET, ctl_status, set);
4797 +
4798 +
4799 + crisv10_ready_wait();
4800 + /* Reset the USB interface. */
4801 + *R_USB_COMMAND =
4802 + IO_STATE(R_USB_COMMAND, port_sel, nop) |
4803 + IO_STATE(R_USB_COMMAND, port_cmd, reset) |
4804 + IO_STATE(R_USB_COMMAND, ctrl_cmd, reset);
4805 +
4806 + /* Designer's Reference, p. 8 - 10 says we should Initate R_USB_FM_PSTART to
4807 + 0x2A30 (10800), to guarantee that control traffic gets 10% of the
4808 + bandwidth, and periodic transfer may allocate the rest (90%).
4809 + This doesn't work though.
4810 + The value 11960 is chosen to be just after the SOF token, with a couple
4811 + of bit times extra for possible bit stuffing. */
4812 + *R_USB_FM_PSTART = IO_FIELD(R_USB_FM_PSTART, value, 11960);
4813 +
4814 + crisv10_ready_wait();
4815 + /* Configure the USB interface as a host controller. */
4816 + *R_USB_COMMAND =
4817 + IO_STATE(R_USB_COMMAND, port_sel, nop) |
4818 + IO_STATE(R_USB_COMMAND, port_cmd, reset) |
4819 + IO_STATE(R_USB_COMMAND, ctrl_cmd, host_config);
4820 +
4821 +
4822 + /* Check so controller not busy before enabling ports */
4823 + crisv10_ready_wait();
4824 +
4825 + /* Enable selected USB ports */
4826 + if(port_in_use(0)) {
4827 + *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, no);
4828 + } else {
4829 + *R_USB_PORT1_DISABLE = IO_STATE(R_USB_PORT1_DISABLE, disable, yes);
4830 + }
4831 + if(port_in_use(1)) {
4832 + *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, no);
4833 + } else {
4834 + *R_USB_PORT2_DISABLE = IO_STATE(R_USB_PORT2_DISABLE, disable, yes);
4835 + }
4836 +
4837 + crisv10_ready_wait();
4838 + /* Start processing of USB traffic. */
4839 + *R_USB_COMMAND =
4840 + IO_STATE(R_USB_COMMAND, port_sel, nop) |
4841 + IO_STATE(R_USB_COMMAND, port_cmd, reset) |
4842 + IO_STATE(R_USB_COMMAND, ctrl_cmd, host_run);
4843 +
4844 + /* Do not continue probing initialization before USB interface is done */
4845 + crisv10_ready_wait();
4846 +
4847 + /* Register our Host Controller to USB Core
4848 + * Finish the remaining parts of generic HCD initialization: allocate the
4849 + * buffers of consistent memory, register the bus
4850 + * and call the driver's reset() and start() routines. */
4851 + retval = usb_add_hcd(hcd, ETRAX_USB_HC_IRQ, IRQF_DISABLED);
4852 + if (retval != 0) {
4853 + devdrv_err("Failed registering HCD driver\n");
4854 + goto out;
4855 + }
4856 +
4857 + return 0;
4858 +
4859 + out:
4860 + devdrv_hcd_remove(dev);
4861 + return retval;
4862 +}
4863 +
4864 +
4865 +/* cleanup after the host controller and driver */
4866 +static int __init_or_module devdrv_hcd_remove(struct device *dev)
4867 +{
4868 + struct crisv10_hcd *crisv10_hcd = dev_get_drvdata(dev);
4869 + struct usb_hcd *hcd;
4870 +
4871 + if (!crisv10_hcd)
4872 + return 0;
4873 + hcd = crisv10_hcd_to_hcd(crisv10_hcd);
4874 +
4875 +
4876 + /* Stop USB Controller in Etrax 100LX */
4877 + crisv10_hcd_reset(hcd);
4878 +
4879 + usb_remove_hcd(hcd);
4880 + devdrv_dbg("Removed HCD from USB Core\n");
4881 +
4882 + /* Free USB Controller IRQ */
4883 + free_irq(ETRAX_USB_HC_IRQ, NULL);
4884 +
4885 + /* Free resources */
4886 + tc_dma_destroy();
4887 + tc_destroy();
4888 +
4889 +
4890 + if(port_in_use(0)) {
4891 + cris_free_io_interface(if_usb_1);
4892 + }
4893 + if(port_in_use(1)) {
4894 + cris_free_io_interface(if_usb_2);
4895 + }
4896 +
4897 + devdrv_dbg("Freed all claimed resources\n");
4898 +
4899 + return 0;
4900 +}
4901 +
4902 +
4903 +#ifdef CONFIG_PM
4904 +
4905 +static int devdrv_hcd_suspend(struct usb_hcd *hcd, u32 state, u32 level)
4906 +{
4907 + return 0; /* no-op for now */
4908 +}
4909 +
4910 +static int devdrv_hcd_resume(struct usb_hcd *hcd, u32 level)
4911 +{
4912 + return 0; /* no-op for now */
4913 +}
4914 +
4915 +#endif /* CONFIG_PM */
4916 +
4917 +
4918 +
4919 +/*************************************************************/
4920 +/*************************************************************/
4921 +/* Module block */
4922 +/*************************************************************/
4923 +/*************************************************************/
4924 +
4925 +/* register driver */
4926 +static int __init module_hcd_init(void)
4927 +{
4928 +
4929 + if (usb_disabled())
4930 + return -ENODEV;
4931 +
4932 + /* Here we select enabled ports by following defines created from
4933 + menuconfig */
4934 +#ifndef CONFIG_ETRAX_USB_HOST_PORT1
4935 + ports &= ~(1<<0);
4936 +#endif
4937 +#ifndef CONFIG_ETRAX_USB_HOST_PORT2
4938 + ports &= ~(1<<1);
4939 +#endif
4940 +
4941 + printk(KERN_INFO "%s version "VERSION" "COPYRIGHT"\n", product_desc);
4942 +
4943 + devdrv_hc_platform_device =
4944 + platform_device_register_simple((char *) hc_name, 0, NULL, 0);
4945 +
4946 + if (IS_ERR(devdrv_hc_platform_device))
4947 + return PTR_ERR(devdrv_hc_platform_device);
4948 + return driver_register(&devdrv_hc_device_driver);
4949 + /*
4950 + * Note that we do not set the DMA mask for the device,
4951 + * i.e. we pretend that we will use PIO, since no specific
4952 + * allocation routines are needed for DMA buffers. This will
4953 + * cause the HCD buffer allocation routines to fall back to
4954 + * kmalloc().
4955 + */
4956 +}
4957 +
4958 +/* unregister driver */
4959 +static void __exit module_hcd_exit(void)
4960 +{
4961 + driver_unregister(&devdrv_hc_device_driver);
4962 +}
4963 +
4964 +
4965 +/* Module hooks */
4966 +module_init(module_hcd_init);
4967 +module_exit(module_hcd_exit);
4968 --- /dev/null
4969 +++ b/drivers/usb/host/hc-crisv10.h
4970 @@ -0,0 +1,331 @@
4971 +#ifndef __LINUX_ETRAX_USB_H
4972 +#define __LINUX_ETRAX_USB_H
4973 +
4974 +#include <linux/types.h>
4975 +#include <linux/list.h>
4976 +
4977 +struct USB_IN_Desc {
4978 + volatile __u16 sw_len;
4979 + volatile __u16 command;
4980 + volatile unsigned long next;
4981 + volatile unsigned long buf;
4982 + volatile __u16 hw_len;
4983 + volatile __u16 status;
4984 +};
4985 +
4986 +struct USB_SB_Desc {
4987 + volatile __u16 sw_len;
4988 + volatile __u16 command;
4989 + volatile unsigned long next;
4990 + volatile unsigned long buf;
4991 +};
4992 +
4993 +struct USB_EP_Desc {
4994 + volatile __u16 hw_len;
4995 + volatile __u16 command;
4996 + volatile unsigned long sub;
4997 + volatile unsigned long next;
4998 +};
4999 +
5000 +
5001 +/* Root Hub port status struct */
5002 +struct crisv10_rh {
5003 + volatile __u16 wPortChange[2];
5004 + volatile __u16 wPortStatusPrev[2];
5005 +};
5006 +
5007 +/* HCD description */
5008 +struct crisv10_hcd {
5009 + spinlock_t lock;
5010 + __u8 num_ports;
5011 + __u8 running;
5012 +};
5013 +
5014 +
5015 +/* Endpoint HC private data description */
5016 +struct crisv10_ep_priv {
5017 + int epid;
5018 +};
5019 +
5020 +/* Additional software state info for a USB Controller epid */
5021 +struct etrax_epid {
5022 + __u8 inuse; /* !0 = setup in Etrax and used for a endpoint */
5023 + __u8 disabled; /* !0 = Temporarly disabled to avoid resubmission */
5024 + __u8 type; /* Setup as: PIPE_BULK, PIPE_CONTROL ... */
5025 + __u8 out_traffic; /* !0 = This epid is for out traffic */
5026 +};
5027 +
5028 +/* Struct to hold information of scheduled later URB completion */
5029 +struct urb_later_data {
5030 +// struct work_struct ws;
5031 + struct delayed_work ws;
5032 + struct usb_hcd *hcd;
5033 + struct urb *urb;
5034 + int urb_num;
5035 + int status;
5036 +};
5037 +
5038 +
5039 +typedef enum {
5040 + STARTED,
5041 + NOT_STARTED,
5042 + UNLINK,
5043 +} crisv10_urb_state_t;
5044 +
5045 +
5046 +struct crisv10_urb_priv {
5047 + /* Sequence number for this URB. Every new submited URB gets this from
5048 + a incrementing counter. Used when a URB is scheduled for later finish to
5049 + be sure that the intended URB hasn't already been completed (device
5050 + drivers has a tendency to reuse URBs once they are completed, causing us
5051 + to not be able to single old ones out only based on the URB pointer.) */
5052 + __u32 urb_num;
5053 +
5054 + /* The first_sb field is used for freeing all SB descriptors belonging
5055 + to an urb. The corresponding ep descriptor's sub pointer cannot be
5056 + used for this since the DMA advances the sub pointer as it processes
5057 + the sb list. */
5058 + struct USB_SB_Desc *first_sb;
5059 +
5060 + /* The last_sb field referes to the last SB descriptor that belongs to
5061 + this urb. This is important to know so we can free the SB descriptors
5062 + that ranges between first_sb and last_sb. */
5063 + struct USB_SB_Desc *last_sb;
5064 +
5065 + /* The rx_offset field is used in ctrl and bulk traffic to keep track
5066 + of the offset in the urb's transfer_buffer where incoming data should be
5067 + copied to. */
5068 + __u32 rx_offset;
5069 +
5070 + /* Counter used in isochronous transfers to keep track of the
5071 + number of packets received/transmitted. */
5072 + __u32 isoc_packet_counter;
5073 +
5074 + /* Flag that marks if this Isoc Out URB has finished it's transfer. Used
5075 + because several URBs can be finished before list is processed */
5076 + __u8 isoc_out_done;
5077 +
5078 + /* This field is used to pass information about the urb's current state
5079 + between the various interrupt handlers (thus marked volatile). */
5080 + volatile crisv10_urb_state_t urb_state;
5081 +
5082 + /* In Ctrl transfers consist of (at least) 3 packets: SETUP, IN and ZOUT.
5083 + When DMA8 sub-channel 2 has processed the SB list for this sequence we
5084 + get a interrupt. We also get a interrupt for In transfers and which
5085 + one of these interrupts that comes first depends of data size and device.
5086 + To be sure that we have got both interrupts before we complete the URB
5087 + we have these to flags that shows which part that has completed.
5088 + We can then check when we get one of the interrupts that if the other has
5089 + occured it's safe for us to complete the URB, otherwise we set appropriate
5090 + flag and do the completion when we get the other interrupt. */
5091 + volatile unsigned char ctrl_zout_done;
5092 + volatile unsigned char ctrl_rx_done;
5093 +
5094 + /* Connection between the submitted urb and ETRAX epid number */
5095 + __u8 epid;
5096 +
5097 + /* The rx_data_list field is used for periodic traffic, to hold
5098 + received data for later processing in the the complete_urb functions,
5099 + where the data us copied to the urb's transfer_buffer. Basically, we
5100 + use this intermediate storage because we don't know when it's safe to
5101 + reuse the transfer_buffer (FIXME?). */
5102 + struct list_head rx_data_list;
5103 +
5104 +
5105 + /* The interval time rounded up to closest 2^N */
5106 + int interval;
5107 +
5108 + /* Pool of EP descriptors needed if it's a INTR transfer.
5109 + Amount of EPs in pool correspons to how many INTR that should
5110 + be inserted in TxIntrEPList (max 128, defined by MAX_INTR_INTERVAL) */
5111 + struct USB_EP_Desc* intr_ep_pool[128];
5112 +
5113 + /* The mount of EPs allocated for this INTR URB */
5114 + int intr_ep_pool_length;
5115 +
5116 + /* Pointer to info struct if URB is scheduled to be finished later */
5117 + struct urb_later_data* later_data;
5118 +};
5119 +
5120 +
5121 +/* This struct is for passing data from the top half to the bottom half irq
5122 + handlers */
5123 +struct crisv10_irq_reg {
5124 + struct usb_hcd* hcd;
5125 + __u32 r_usb_epid_attn;
5126 + __u8 r_usb_status;
5127 + __u16 r_usb_rh_port_status_1;
5128 + __u16 r_usb_rh_port_status_2;
5129 + __u32 r_usb_irq_mask_read;
5130 + __u32 r_usb_fm_number;
5131 + struct work_struct usb_bh;
5132 +};
5133 +
5134 +
5135 +/* This struct is for passing data from the isoc top half to the isoc bottom
5136 + half. */
5137 +struct crisv10_isoc_complete_data {
5138 + struct usb_hcd *hcd;
5139 + struct urb *urb;
5140 + struct work_struct usb_bh;
5141 +};
5142 +
5143 +/* Entry item for URB lists for each endpint */
5144 +typedef struct urb_entry
5145 +{
5146 + struct urb *urb;
5147 + struct list_head list;
5148 +} urb_entry_t;
5149 +
5150 +/* ---------------------------------------------------------------------------
5151 + Virtual Root HUB
5152 + ------------------------------------------------------------------------- */
5153 +/* destination of request */
5154 +#define RH_INTERFACE 0x01
5155 +#define RH_ENDPOINT 0x02
5156 +#define RH_OTHER 0x03
5157 +
5158 +#define RH_CLASS 0x20
5159 +#define RH_VENDOR 0x40
5160 +
5161 +/* Requests: bRequest << 8 | bmRequestType */
5162 +#define RH_GET_STATUS 0x0080
5163 +#define RH_CLEAR_FEATURE 0x0100
5164 +#define RH_SET_FEATURE 0x0300
5165 +#define RH_SET_ADDRESS 0x0500
5166 +#define RH_GET_DESCRIPTOR 0x0680
5167 +#define RH_SET_DESCRIPTOR 0x0700
5168 +#define RH_GET_CONFIGURATION 0x0880
5169 +#define RH_SET_CONFIGURATION 0x0900
5170 +#define RH_GET_STATE 0x0280
5171 +#define RH_GET_INTERFACE 0x0A80
5172 +#define RH_SET_INTERFACE 0x0B00
5173 +#define RH_SYNC_FRAME 0x0C80
5174 +/* Our Vendor Specific Request */
5175 +#define RH_SET_EP 0x2000
5176 +
5177 +
5178 +/* Hub port features */
5179 +#define RH_PORT_CONNECTION 0x00
5180 +#define RH_PORT_ENABLE 0x01
5181 +#define RH_PORT_SUSPEND 0x02
5182 +#define RH_PORT_OVER_CURRENT 0x03
5183 +#define RH_PORT_RESET 0x04
5184 +#define RH_PORT_POWER 0x08
5185 +#define RH_PORT_LOW_SPEED 0x09
5186 +#define RH_C_PORT_CONNECTION 0x10
5187 +#define RH_C_PORT_ENABLE 0x11
5188 +#define RH_C_PORT_SUSPEND 0x12
5189 +#define RH_C_PORT_OVER_CURRENT 0x13
5190 +#define RH_C_PORT_RESET 0x14
5191 +
5192 +/* Hub features */
5193 +#define RH_C_HUB_LOCAL_POWER 0x00
5194 +#define RH_C_HUB_OVER_CURRENT 0x01
5195 +
5196 +#define RH_DEVICE_REMOTE_WAKEUP 0x00
5197 +#define RH_ENDPOINT_STALL 0x01
5198 +
5199 +/* Our Vendor Specific feature */
5200 +#define RH_REMOVE_EP 0x00
5201 +
5202 +
5203 +#define RH_ACK 0x01
5204 +#define RH_REQ_ERR -1
5205 +#define RH_NACK 0x00
5206 +
5207 +/* Field definitions for */
5208 +
5209 +#define USB_IN_command__eol__BITNR 0 /* command macros */
5210 +#define USB_IN_command__eol__WIDTH 1
5211 +#define USB_IN_command__eol__no 0
5212 +#define USB_IN_command__eol__yes 1
5213 +
5214 +#define USB_IN_command__intr__BITNR 3
5215 +#define USB_IN_command__intr__WIDTH 1
5216 +#define USB_IN_command__intr__no 0
5217 +#define USB_IN_command__intr__yes 1
5218 +
5219 +#define USB_IN_status__eop__BITNR 1 /* status macros. */
5220 +#define USB_IN_status__eop__WIDTH 1
5221 +#define USB_IN_status__eop__no 0
5222 +#define USB_IN_status__eop__yes 1
5223 +
5224 +#define USB_IN_status__eot__BITNR 5
5225 +#define USB_IN_status__eot__WIDTH 1
5226 +#define USB_IN_status__eot__no 0
5227 +#define USB_IN_status__eot__yes 1
5228 +
5229 +#define USB_IN_status__error__BITNR 6
5230 +#define USB_IN_status__error__WIDTH 1
5231 +#define USB_IN_status__error__no 0
5232 +#define USB_IN_status__error__yes 1
5233 +
5234 +#define USB_IN_status__nodata__BITNR 7
5235 +#define USB_IN_status__nodata__WIDTH 1
5236 +#define USB_IN_status__nodata__no 0
5237 +#define USB_IN_status__nodata__yes 1
5238 +
5239 +#define USB_IN_status__epid__BITNR 8
5240 +#define USB_IN_status__epid__WIDTH 5
5241 +
5242 +#define USB_EP_command__eol__BITNR 0
5243 +#define USB_EP_command__eol__WIDTH 1
5244 +#define USB_EP_command__eol__no 0
5245 +#define USB_EP_command__eol__yes 1
5246 +
5247 +#define USB_EP_command__eof__BITNR 1
5248 +#define USB_EP_command__eof__WIDTH 1
5249 +#define USB_EP_command__eof__no 0
5250 +#define USB_EP_command__eof__yes 1
5251 +
5252 +#define USB_EP_command__intr__BITNR 3
5253 +#define USB_EP_command__intr__WIDTH 1
5254 +#define USB_EP_command__intr__no 0
5255 +#define USB_EP_command__intr__yes 1
5256 +
5257 +#define USB_EP_command__enable__BITNR 4
5258 +#define USB_EP_command__enable__WIDTH 1
5259 +#define USB_EP_command__enable__no 0
5260 +#define USB_EP_command__enable__yes 1
5261 +
5262 +#define USB_EP_command__hw_valid__BITNR 5
5263 +#define USB_EP_command__hw_valid__WIDTH 1
5264 +#define USB_EP_command__hw_valid__no 0
5265 +#define USB_EP_command__hw_valid__yes 1
5266 +
5267 +#define USB_EP_command__epid__BITNR 8
5268 +#define USB_EP_command__epid__WIDTH 5
5269 +
5270 +#define USB_SB_command__eol__BITNR 0 /* command macros. */
5271 +#define USB_SB_command__eol__WIDTH 1
5272 +#define USB_SB_command__eol__no 0
5273 +#define USB_SB_command__eol__yes 1
5274 +
5275 +#define USB_SB_command__eot__BITNR 1
5276 +#define USB_SB_command__eot__WIDTH 1
5277 +#define USB_SB_command__eot__no 0
5278 +#define USB_SB_command__eot__yes 1
5279 +
5280 +#define USB_SB_command__intr__BITNR 3
5281 +#define USB_SB_command__intr__WIDTH 1
5282 +#define USB_SB_command__intr__no 0
5283 +#define USB_SB_command__intr__yes 1
5284 +
5285 +#define USB_SB_command__tt__BITNR 4
5286 +#define USB_SB_command__tt__WIDTH 2
5287 +#define USB_SB_command__tt__zout 0
5288 +#define USB_SB_command__tt__in 1
5289 +#define USB_SB_command__tt__out 2
5290 +#define USB_SB_command__tt__setup 3
5291 +
5292 +
5293 +#define USB_SB_command__rem__BITNR 8
5294 +#define USB_SB_command__rem__WIDTH 6
5295 +
5296 +#define USB_SB_command__full__BITNR 6
5297 +#define USB_SB_command__full__WIDTH 1
5298 +#define USB_SB_command__full__no 0
5299 +#define USB_SB_command__full__yes 1
5300 +
5301 +#endif
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