1 From 4264350acb75430d5021a1d7de56a33faf69a097 Mon Sep 17 00:00:00 2001
2 From: Ansuel Smith <ansuelsmth@gmail.com>
3 Date: Wed, 2 Feb 2022 01:03:32 +0100
4 Subject: [PATCH 13/16] net: dsa: qca8k: move page cache to driver priv
6 There can be multiple qca8k switch on the same system. Move the static
7 qca8k_current_page to qca8k_priv and make it specific for each switch.
9 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
10 Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
11 Signed-off-by: David S. Miller <davem@davemloft.net>
13 drivers/net/dsa/qca8k.c | 42 ++++++++++++++++++++---------------------
14 drivers/net/dsa/qca8k.h | 9 +++++++++
15 2 files changed, 29 insertions(+), 22 deletions(-)
17 diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
18 index 0ce5b7ca0b7f..86d3742b1038 100644
19 --- a/drivers/net/dsa/qca8k.c
20 +++ b/drivers/net/dsa/qca8k.c
21 @@ -75,12 +75,6 @@ static const struct qca8k_mib_desc ar8327_mib[] = {
22 MIB_DESC(1, 0xac, "TXUnicast"),
25 -/* The 32bit switch registers are accessed indirectly. To achieve this we need
26 - * to set the page of the register. Track the last page that was set to reduce
29 -static u16 qca8k_current_page = 0xffff;
32 qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
34 @@ -134,11 +128,13 @@ qca8k_mii_write32(struct mii_bus *bus, int phy_id, u32 regnum, u32 val)
38 -qca8k_set_page(struct mii_bus *bus, u16 page)
39 +qca8k_set_page(struct qca8k_priv *priv, u16 page)
41 + u16 *cached_page = &priv->mdio_cache.page;
42 + struct mii_bus *bus = priv->bus;
45 - if (page == qca8k_current_page)
46 + if (page == *cached_page)
49 ret = bus->write(bus, 0x18, 0, page);
50 @@ -148,7 +144,7 @@ qca8k_set_page(struct mii_bus *bus, u16 page)
54 - qca8k_current_page = page;
55 + *cached_page = page;
56 usleep_range(1000, 2000);
59 @@ -374,7 +370,7 @@ qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val)
61 mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
63 - ret = qca8k_set_page(bus, page);
64 + ret = qca8k_set_page(priv, page);
68 @@ -400,7 +396,7 @@ qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t val)
70 mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
72 - ret = qca8k_set_page(bus, page);
73 + ret = qca8k_set_page(priv, page);
77 @@ -427,7 +423,7 @@ qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_
79 mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
81 - ret = qca8k_set_page(bus, page);
82 + ret = qca8k_set_page(priv, page);
86 @@ -1098,8 +1094,9 @@ qca8k_mdio_busy_wait(struct mii_bus *bus, u32 reg, u32 mask)
90 -qca8k_mdio_write(struct mii_bus *bus, int phy, int regnum, u16 data)
91 +qca8k_mdio_write(struct qca8k_priv *priv, int phy, int regnum, u16 data)
93 + struct mii_bus *bus = priv->bus;
97 @@ -1116,7 +1113,7 @@ qca8k_mdio_write(struct mii_bus *bus, int phy, int regnum, u16 data)
99 mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
101 - ret = qca8k_set_page(bus, page);
102 + ret = qca8k_set_page(priv, page);
106 @@ -1135,8 +1132,9 @@ qca8k_mdio_write(struct mii_bus *bus, int phy, int regnum, u16 data)
110 -qca8k_mdio_read(struct mii_bus *bus, int phy, int regnum)
111 +qca8k_mdio_read(struct qca8k_priv *priv, int phy, int regnum)
113 + struct mii_bus *bus = priv->bus;
117 @@ -1152,7 +1150,7 @@ qca8k_mdio_read(struct mii_bus *bus, int phy, int regnum)
119 mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED);
121 - ret = qca8k_set_page(bus, page);
122 + ret = qca8k_set_page(priv, page);
126 @@ -1181,7 +1179,6 @@ static int
127 qca8k_internal_mdio_write(struct mii_bus *slave_bus, int phy, int regnum, u16 data)
129 struct qca8k_priv *priv = slave_bus->priv;
130 - struct mii_bus *bus = priv->bus;
133 /* Use mdio Ethernet when available, fallback to legacy one on error */
134 @@ -1189,14 +1186,13 @@ qca8k_internal_mdio_write(struct mii_bus *slave_bus, int phy, int regnum, u16 da
138 - return qca8k_mdio_write(bus, phy, regnum, data);
139 + return qca8k_mdio_write(priv, phy, regnum, data);
143 qca8k_internal_mdio_read(struct mii_bus *slave_bus, int phy, int regnum)
145 struct qca8k_priv *priv = slave_bus->priv;
146 - struct mii_bus *bus = priv->bus;
149 /* Use mdio Ethernet when available, fallback to legacy one on error */
150 @@ -1204,7 +1200,7 @@ qca8k_internal_mdio_read(struct mii_bus *slave_bus, int phy, int regnum)
154 - return qca8k_mdio_read(bus, phy, regnum);
155 + return qca8k_mdio_read(priv, phy, regnum);
159 @@ -1225,7 +1221,7 @@ qca8k_phy_write(struct dsa_switch *ds, int port, int regnum, u16 data)
163 - return qca8k_mdio_write(priv->bus, port, regnum, data);
164 + return qca8k_mdio_write(priv, port, regnum, data);
168 @@ -1246,7 +1242,7 @@ qca8k_phy_read(struct dsa_switch *ds, int port, int regnum)
172 - ret = qca8k_mdio_read(priv->bus, port, regnum);
173 + ret = qca8k_mdio_read(priv, port, regnum);
177 @@ -3042,6 +3038,8 @@ qca8k_sw_probe(struct mdio_device *mdiodev)
178 return PTR_ERR(priv->regmap);
181 + priv->mdio_cache.page = 0xffff;
183 /* Check the detected switch id */
184 ret = qca8k_read_switch_id(priv);
186 diff --git a/drivers/net/dsa/qca8k.h b/drivers/net/dsa/qca8k.h
187 index c6f6abd2108e..57368acae41b 100644
188 --- a/drivers/net/dsa/qca8k.h
189 +++ b/drivers/net/dsa/qca8k.h
190 @@ -363,6 +363,14 @@ struct qca8k_ports_config {
191 u8 rgmii_tx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */
194 +struct qca8k_mdio_cache {
195 +/* The 32bit switch registers are accessed indirectly. To achieve this we need
196 + * to set the page of the register. Track the last page that was set to reduce
205 @@ -383,6 +391,7 @@ struct qca8k_priv {
206 struct net_device *mgmt_master; /* Track if mdio/mib Ethernet is available */
207 struct qca8k_mgmt_eth_data mgmt_eth_data;
208 struct qca8k_mib_eth_data mib_eth_data;
209 + struct qca8k_mdio_cache mdio_cache;
212 struct qca8k_mib_desc {