kernel: add a ssb backport required for a new mac80211 update
[openwrt/staging/wigyori.git] / target / linux / generic / patches-3.13 / 020-ssb_update.patch
1 --- a/drivers/ssb/Kconfig
2 +++ b/drivers/ssb/Kconfig
3 @@ -168,6 +168,7 @@ config SSB_DRIVER_GIGE
4 config SSB_DRIVER_GPIO
5 bool "SSB GPIO driver"
6 depends on SSB && GPIOLIB
7 + select IRQ_DOMAIN if SSB_EMBEDDED
8 help
9 Driver to provide access to the GPIO pins on the bus.
10
11 --- a/drivers/ssb/driver_chipcommon_sflash.c
12 +++ b/drivers/ssb/driver_chipcommon_sflash.c
13 @@ -37,7 +37,7 @@ static const struct ssb_sflash_tbl_e ssb
14 { "M25P32", 0x15, 0x10000, 64, },
15 { "M25P64", 0x16, 0x10000, 128, },
16 { "M25FL128", 0x17, 0x10000, 256, },
17 - { 0 },
18 + { NULL },
19 };
20
21 static const struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
22 @@ -55,7 +55,7 @@ static const struct ssb_sflash_tbl_e ssb
23 { "SST25VF016", 0x41, 0x1000, 512, },
24 { "SST25VF032", 0x4a, 0x1000, 1024, },
25 { "SST25VF064", 0x4b, 0x1000, 2048, },
26 - { 0 },
27 + { NULL },
28 };
29
30 static const struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
31 @@ -66,7 +66,7 @@ static const struct ssb_sflash_tbl_e ssb
32 { "AT45DB161", 0x2c, 512, 4096, },
33 { "AT45DB321", 0x34, 512, 8192, },
34 { "AT45DB642", 0x3c, 1024, 8192, },
35 - { 0 },
36 + { NULL },
37 };
38
39 static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode)
40 --- a/drivers/ssb/driver_gpio.c
41 +++ b/drivers/ssb/driver_gpio.c
42 @@ -9,16 +9,40 @@
43 */
44
45 #include <linux/gpio.h>
46 +#include <linux/irq.h>
47 +#include <linux/interrupt.h>
48 +#include <linux/irqdomain.h>
49 #include <linux/export.h>
50 #include <linux/ssb/ssb.h>
51
52 #include "ssb_private.h"
53
54 +
55 +/**************************************************
56 + * Shared
57 + **************************************************/
58 +
59 static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip)
60 {
61 return container_of(chip, struct ssb_bus, gpio);
62 }
63
64 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
65 +static int ssb_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
66 +{
67 + struct ssb_bus *bus = ssb_gpio_get_bus(chip);
68 +
69 + if (bus->bustype == SSB_BUSTYPE_SSB)
70 + return irq_find_mapping(bus->irq_domain, gpio);
71 + else
72 + return -EINVAL;
73 +}
74 +#endif
75 +
76 +/**************************************************
77 + * ChipCommon
78 + **************************************************/
79 +
80 static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
81 {
82 struct ssb_bus *bus = ssb_gpio_get_bus(chip);
83 @@ -74,19 +98,129 @@ static void ssb_gpio_chipco_free(struct
84 ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
85 }
86
87 -static int ssb_gpio_chipco_to_irq(struct gpio_chip *chip, unsigned gpio)
88 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
89 +static void ssb_gpio_irq_chipco_mask(struct irq_data *d)
90 {
91 - struct ssb_bus *bus = ssb_gpio_get_bus(chip);
92 + struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
93 + int gpio = irqd_to_hwirq(d);
94
95 - if (bus->bustype == SSB_BUSTYPE_SSB)
96 - return ssb_mips_irq(bus->chipco.dev) + 2;
97 - else
98 - return -EINVAL;
99 + ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), 0);
100 +}
101 +
102 +static void ssb_gpio_irq_chipco_unmask(struct irq_data *d)
103 +{
104 + struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
105 + int gpio = irqd_to_hwirq(d);
106 + u32 val = ssb_chipco_gpio_in(&bus->chipco, BIT(gpio));
107 +
108 + ssb_chipco_gpio_polarity(&bus->chipco, BIT(gpio), val);
109 + ssb_chipco_gpio_intmask(&bus->chipco, BIT(gpio), BIT(gpio));
110 +}
111 +
112 +static struct irq_chip ssb_gpio_irq_chipco_chip = {
113 + .name = "SSB-GPIO-CC",
114 + .irq_mask = ssb_gpio_irq_chipco_mask,
115 + .irq_unmask = ssb_gpio_irq_chipco_unmask,
116 +};
117 +
118 +static irqreturn_t ssb_gpio_irq_chipco_handler(int irq, void *dev_id)
119 +{
120 + struct ssb_bus *bus = dev_id;
121 + struct ssb_chipcommon *chipco = &bus->chipco;
122 + u32 val = chipco_read32(chipco, SSB_CHIPCO_GPIOIN);
123 + u32 mask = chipco_read32(chipco, SSB_CHIPCO_GPIOIRQ);
124 + u32 pol = chipco_read32(chipco, SSB_CHIPCO_GPIOPOL);
125 + unsigned long irqs = (val ^ pol) & mask;
126 + int gpio;
127 +
128 + if (!irqs)
129 + return IRQ_NONE;
130 +
131 + for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
132 + generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
133 + ssb_chipco_gpio_polarity(chipco, irqs, val & irqs);
134 +
135 + return IRQ_HANDLED;
136 +}
137 +
138 +static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
139 +{
140 + struct ssb_chipcommon *chipco = &bus->chipco;
141 + struct gpio_chip *chip = &bus->gpio;
142 + int gpio, hwirq, err;
143 +
144 + if (bus->bustype != SSB_BUSTYPE_SSB)
145 + return 0;
146 +
147 + bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
148 + &irq_domain_simple_ops, chipco);
149 + if (!bus->irq_domain) {
150 + err = -ENODEV;
151 + goto err_irq_domain;
152 + }
153 + for (gpio = 0; gpio < chip->ngpio; gpio++) {
154 + int irq = irq_create_mapping(bus->irq_domain, gpio);
155 +
156 + irq_set_chip_data(irq, bus);
157 + irq_set_chip_and_handler(irq, &ssb_gpio_irq_chipco_chip,
158 + handle_simple_irq);
159 + }
160 +
161 + hwirq = ssb_mips_irq(bus->chipco.dev) + 2;
162 + err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED,
163 + "gpio", bus);
164 + if (err)
165 + goto err_req_irq;
166 +
167 + ssb_chipco_gpio_intmask(&bus->chipco, ~0, 0);
168 + chipco_set32(chipco, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO);
169 +
170 + return 0;
171 +
172 +err_req_irq:
173 + for (gpio = 0; gpio < chip->ngpio; gpio++) {
174 + int irq = irq_find_mapping(bus->irq_domain, gpio);
175 +
176 + irq_dispose_mapping(irq);
177 + }
178 + irq_domain_remove(bus->irq_domain);
179 +err_irq_domain:
180 + return err;
181 +}
182 +
183 +static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
184 +{
185 + struct ssb_chipcommon *chipco = &bus->chipco;
186 + struct gpio_chip *chip = &bus->gpio;
187 + int gpio;
188 +
189 + if (bus->bustype != SSB_BUSTYPE_SSB)
190 + return;
191 +
192 + chipco_mask32(chipco, SSB_CHIPCO_IRQMASK, ~SSB_CHIPCO_IRQ_GPIO);
193 + free_irq(ssb_mips_irq(bus->chipco.dev) + 2, chipco);
194 + for (gpio = 0; gpio < chip->ngpio; gpio++) {
195 + int irq = irq_find_mapping(bus->irq_domain, gpio);
196 +
197 + irq_dispose_mapping(irq);
198 + }
199 + irq_domain_remove(bus->irq_domain);
200 +}
201 +#else
202 +static int ssb_gpio_irq_chipco_domain_init(struct ssb_bus *bus)
203 +{
204 + return 0;
205 +}
206 +
207 +static void ssb_gpio_irq_chipco_domain_exit(struct ssb_bus *bus)
208 +{
209 }
210 +#endif
211
212 static int ssb_gpio_chipco_init(struct ssb_bus *bus)
213 {
214 struct gpio_chip *chip = &bus->gpio;
215 + int err;
216
217 chip->label = "ssb_chipco_gpio";
218 chip->owner = THIS_MODULE;
219 @@ -96,7 +230,9 @@ static int ssb_gpio_chipco_init(struct s
220 chip->set = ssb_gpio_chipco_set_value;
221 chip->direction_input = ssb_gpio_chipco_direction_input;
222 chip->direction_output = ssb_gpio_chipco_direction_output;
223 - chip->to_irq = ssb_gpio_chipco_to_irq;
224 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
225 + chip->to_irq = ssb_gpio_to_irq;
226 +#endif
227 chip->ngpio = 16;
228 /* There is just one SoC in one device and its GPIO addresses should be
229 * deterministic to address them more easily. The other buses could get
230 @@ -106,9 +242,23 @@ static int ssb_gpio_chipco_init(struct s
231 else
232 chip->base = -1;
233
234 - return gpiochip_add(chip);
235 + err = ssb_gpio_irq_chipco_domain_init(bus);
236 + if (err)
237 + return err;
238 +
239 + err = gpiochip_add(chip);
240 + if (err) {
241 + ssb_gpio_irq_chipco_domain_exit(bus);
242 + return err;
243 + }
244 +
245 + return 0;
246 }
247
248 +/**************************************************
249 + * EXTIF
250 + **************************************************/
251 +
252 #ifdef CONFIG_SSB_DRIVER_EXTIF
253
254 static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
255 @@ -145,19 +295,127 @@ static int ssb_gpio_extif_direction_outp
256 return 0;
257 }
258
259 -static int ssb_gpio_extif_to_irq(struct gpio_chip *chip, unsigned gpio)
260 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
261 +static void ssb_gpio_irq_extif_mask(struct irq_data *d)
262 {
263 - struct ssb_bus *bus = ssb_gpio_get_bus(chip);
264 + struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
265 + int gpio = irqd_to_hwirq(d);
266
267 - if (bus->bustype == SSB_BUSTYPE_SSB)
268 - return ssb_mips_irq(bus->extif.dev) + 2;
269 - else
270 - return -EINVAL;
271 + ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), 0);
272 +}
273 +
274 +static void ssb_gpio_irq_extif_unmask(struct irq_data *d)
275 +{
276 + struct ssb_bus *bus = irq_data_get_irq_chip_data(d);
277 + int gpio = irqd_to_hwirq(d);
278 + u32 val = ssb_extif_gpio_in(&bus->extif, BIT(gpio));
279 +
280 + ssb_extif_gpio_polarity(&bus->extif, BIT(gpio), val);
281 + ssb_extif_gpio_intmask(&bus->extif, BIT(gpio), BIT(gpio));
282 +}
283 +
284 +static struct irq_chip ssb_gpio_irq_extif_chip = {
285 + .name = "SSB-GPIO-EXTIF",
286 + .irq_mask = ssb_gpio_irq_extif_mask,
287 + .irq_unmask = ssb_gpio_irq_extif_unmask,
288 +};
289 +
290 +static irqreturn_t ssb_gpio_irq_extif_handler(int irq, void *dev_id)
291 +{
292 + struct ssb_bus *bus = dev_id;
293 + struct ssb_extif *extif = &bus->extif;
294 + u32 val = ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN);
295 + u32 mask = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTMASK);
296 + u32 pol = ssb_read32(extif->dev, SSB_EXTIF_GPIO_INTPOL);
297 + unsigned long irqs = (val ^ pol) & mask;
298 + int gpio;
299 +
300 + if (!irqs)
301 + return IRQ_NONE;
302 +
303 + for_each_set_bit(gpio, &irqs, bus->gpio.ngpio)
304 + generic_handle_irq(ssb_gpio_to_irq(&bus->gpio, gpio));
305 + ssb_extif_gpio_polarity(extif, irqs, val & irqs);
306 +
307 + return IRQ_HANDLED;
308 +}
309 +
310 +static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
311 +{
312 + struct ssb_extif *extif = &bus->extif;
313 + struct gpio_chip *chip = &bus->gpio;
314 + int gpio, hwirq, err;
315 +
316 + if (bus->bustype != SSB_BUSTYPE_SSB)
317 + return 0;
318 +
319 + bus->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
320 + &irq_domain_simple_ops, extif);
321 + if (!bus->irq_domain) {
322 + err = -ENODEV;
323 + goto err_irq_domain;
324 + }
325 + for (gpio = 0; gpio < chip->ngpio; gpio++) {
326 + int irq = irq_create_mapping(bus->irq_domain, gpio);
327 +
328 + irq_set_chip_data(irq, bus);
329 + irq_set_chip_and_handler(irq, &ssb_gpio_irq_extif_chip,
330 + handle_simple_irq);
331 + }
332 +
333 + hwirq = ssb_mips_irq(bus->extif.dev) + 2;
334 + err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED,
335 + "gpio", bus);
336 + if (err)
337 + goto err_req_irq;
338 +
339 + ssb_extif_gpio_intmask(&bus->extif, ~0, 0);
340 +
341 + return 0;
342 +
343 +err_req_irq:
344 + for (gpio = 0; gpio < chip->ngpio; gpio++) {
345 + int irq = irq_find_mapping(bus->irq_domain, gpio);
346 +
347 + irq_dispose_mapping(irq);
348 + }
349 + irq_domain_remove(bus->irq_domain);
350 +err_irq_domain:
351 + return err;
352 }
353
354 +static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
355 +{
356 + struct ssb_extif *extif = &bus->extif;
357 + struct gpio_chip *chip = &bus->gpio;
358 + int gpio;
359 +
360 + if (bus->bustype != SSB_BUSTYPE_SSB)
361 + return;
362 +
363 + free_irq(ssb_mips_irq(bus->extif.dev) + 2, extif);
364 + for (gpio = 0; gpio < chip->ngpio; gpio++) {
365 + int irq = irq_find_mapping(bus->irq_domain, gpio);
366 +
367 + irq_dispose_mapping(irq);
368 + }
369 + irq_domain_remove(bus->irq_domain);
370 +}
371 +#else
372 +static int ssb_gpio_irq_extif_domain_init(struct ssb_bus *bus)
373 +{
374 + return 0;
375 +}
376 +
377 +static void ssb_gpio_irq_extif_domain_exit(struct ssb_bus *bus)
378 +{
379 +}
380 +#endif
381 +
382 static int ssb_gpio_extif_init(struct ssb_bus *bus)
383 {
384 struct gpio_chip *chip = &bus->gpio;
385 + int err;
386
387 chip->label = "ssb_extif_gpio";
388 chip->owner = THIS_MODULE;
389 @@ -165,7 +423,9 @@ static int ssb_gpio_extif_init(struct ss
390 chip->set = ssb_gpio_extif_set_value;
391 chip->direction_input = ssb_gpio_extif_direction_input;
392 chip->direction_output = ssb_gpio_extif_direction_output;
393 - chip->to_irq = ssb_gpio_extif_to_irq;
394 +#if IS_ENABLED(CONFIG_SSB_EMBEDDED)
395 + chip->to_irq = ssb_gpio_to_irq;
396 +#endif
397 chip->ngpio = 5;
398 /* There is just one SoC in one device and its GPIO addresses should be
399 * deterministic to address them more easily. The other buses could get
400 @@ -175,7 +435,17 @@ static int ssb_gpio_extif_init(struct ss
401 else
402 chip->base = -1;
403
404 - return gpiochip_add(chip);
405 + err = ssb_gpio_irq_extif_domain_init(bus);
406 + if (err)
407 + return err;
408 +
409 + err = gpiochip_add(chip);
410 + if (err) {
411 + ssb_gpio_irq_extif_domain_exit(bus);
412 + return err;
413 + }
414 +
415 + return 0;
416 }
417
418 #else
419 @@ -185,6 +455,10 @@ static int ssb_gpio_extif_init(struct ss
420 }
421 #endif
422
423 +/**************************************************
424 + * Init
425 + **************************************************/
426 +
427 int ssb_gpio_init(struct ssb_bus *bus)
428 {
429 if (ssb_chipco_available(&bus->chipco))
430 --- a/drivers/ssb/main.c
431 +++ b/drivers/ssb/main.c
432 @@ -593,6 +593,13 @@ static int ssb_attach_queued_buses(void)
433 ssb_pcicore_init(&bus->pcicore);
434 if (bus->bustype == SSB_BUSTYPE_SSB)
435 ssb_watchdog_register(bus);
436 +
437 + err = ssb_gpio_init(bus);
438 + if (err == -ENOTSUPP)
439 + ssb_dbg("GPIO driver not activated\n");
440 + else if (err)
441 + ssb_dbg("Error registering GPIO driver: %i\n", err);
442 +
443 ssb_bus_may_powerdown(bus);
444
445 err = ssb_devices_register(bus);
446 @@ -830,11 +837,6 @@ static int ssb_bus_register(struct ssb_b
447 ssb_chipcommon_init(&bus->chipco);
448 ssb_extif_init(&bus->extif);
449 ssb_mipscore_init(&bus->mipscore);
450 - err = ssb_gpio_init(bus);
451 - if (err == -ENOTSUPP)
452 - ssb_dbg("GPIO driver not activated\n");
453 - else if (err)
454 - ssb_dbg("Error registering GPIO driver: %i\n", err);
455 err = ssb_fetch_invariants(bus, get_invariants);
456 if (err) {
457 ssb_bus_may_powerdown(bus);
458 --- a/include/linux/ssb/ssb.h
459 +++ b/include/linux/ssb/ssb.h
460 @@ -33,6 +33,7 @@ struct ssb_sprom {
461 u8 et1phyaddr; /* MII address for enet1 */
462 u8 et0mdcport; /* MDIO for enet0 */
463 u8 et1mdcport; /* MDIO for enet1 */
464 + u16 dev_id; /* Device ID overriding e.g. PCI ID */
465 u16 board_rev; /* Board revision number from SPROM. */
466 u16 board_num; /* Board number from SPROM. */
467 u16 board_type; /* Board type from SPROM. */
468 @@ -486,6 +487,7 @@ struct ssb_bus {
469 #endif /* EMBEDDED */
470 #ifdef CONFIG_SSB_DRIVER_GPIO
471 struct gpio_chip gpio;
472 + struct irq_domain *irq_domain;
473 #endif /* DRIVER_GPIO */
474
475 /* Internal-only stuff follows. Do not touch. */
476 --- a/arch/mips/bcm47xx/sprom.c
477 +++ b/arch/mips/bcm47xx/sprom.c
478 @@ -168,6 +168,7 @@ static void nvram_read_alpha2(const char
479 static void bcm47xx_fill_sprom_r1234589(struct ssb_sprom *sprom,
480 const char *prefix, bool fallback)
481 {
482 + nvram_read_u16(prefix, NULL, "devid", &sprom->dev_id, 0, fallback);
483 nvram_read_u8(prefix, NULL, "ledbh0", &sprom->gpio0, 0xff, fallback);
484 nvram_read_u8(prefix, NULL, "ledbh1", &sprom->gpio1, 0xff, fallback);
485 nvram_read_u8(prefix, NULL, "ledbh2", &sprom->gpio2, 0xff, fallback);