target/linux/generic/pending-4.19/479-mtd-spi-nor-add-xtx-xt25f128a-and-xt25f128b.patch

   1 From patchwork Thu Jan 30 08:55:12 2020
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   5 X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
   6 X-Patchwork-Id: 1231340
   7 Date: Thu, 30 Jan 2020 10:55:12 +0200
   8 From: Daniel Golle <daniel@makrotopia.org>
   9 To: linux-mtd@lists.infradead.org
  10 Subject: [PATCH] mtd: spi-nor: Add support for xt25f128 chips
  11 Message-ID: <20200130085512.GA243814@makrotopia.org>
  12 MIME-Version: 1.0
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  14 List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-mtd>,
  15  <mailto:linux-mtd-request@lists.infradead.org?subject=subscribe>
  16 Cc: Eitan Cohen <eitan@neot-semadar.com>, Piotr Dymacz <pepe2k@gmail.com>,
  17  Tudor Ambarus <tudor.ambarus@microchip.com>
  18 Sender: "linux-mtd" <linux-mtd-bounces@lists.infradead.org>
  19 Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org
  20
  21 Add XT25F128A and XT25F128B made by XTX Technology (Shenzhen) Limited.
  22 Both chips supports dual and quad read and uniform 4K-byte erase.
  23 Verified on Teltonika RUT955 which comes with XT25F128B in recent
  24 versions of the device.
  25
  26 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  27 ---
  28  drivers/mtd/spi-nor/spi-nor.c | 4 ++++
  29  1 file changed, 4 insertions(+)
  30
  31 --- a/drivers/mtd/spi-nor/spi-nor.c
  32 +++ b/drivers/mtd/spi-nor/spi-nor.c
  33 @@ -1273,6 +1273,10 @@ static const struct flash_info spi_nor_i
  34         /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */
  35         { "XM25QH64A", INFO(0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
  36         { "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
  37 +
  38 +       /* XTX Technology (Shenzhen) Limited */
  39 +       { "xt25f128a", INFO(0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
  40 +       { "xt25f128b", INFO(0x0B4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
  41         { },
  42  };
  43