target/linux/ifxmips/files/arch/mips/ifxmips/setup.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  15  *
  16  *   Copyright (C) 2004 peng.liu@infineon.com
  17  *   Copyright (C) 2007 John Crispin <blogic@openwrt.org>
  18  */
  19
  20 #include <linux/init.h>
  21
  22 #include <asm/time.h>
  23 #include <asm/traps.h>
  24 #include <asm/cpu.h>
  25 #include <asm/irq.h>
  26 #include <asm/bootinfo.h>
  27 #include <asm/ifxmips/ifxmips.h>
  28 #include <asm/ifxmips/ifxmips_irq.h>
  29 #include <asm/ifxmips/ifxmips_pmu.h>
  30 #include <asm/ifxmips/ifxmips_prom.h>
  31
  32 static unsigned int r4k_offset;
  33 static unsigned int r4k_cur;
  34
  35 extern void ifxmips_reboot_setup(void);
  36
  37 unsigned int
  38 ifxmips_get_ddr_hz(void)
  39 {
  40         switch(ifxmips_r32(IFXMIPS_CGU_SYS) & 0x3)
  41         {
  42         case 0:
  43                 return CLOCK_167M;
  44         case 1:
  45                 return CLOCK_133M;
  46         case 2:
  47                 return CLOCK_111M;
  48         }
  49         return CLOCK_83M;
  50 }
  51 EXPORT_SYMBOL(ifxmips_get_ddr_hz);
  52
  53 unsigned int
  54 ifxmips_get_cpu_hz(void)
  55 {
  56         unsigned int ddr_clock = ifxmips_get_ddr_hz();
  57         switch(ifxmips_r32(IFXMIPS_CGU_SYS) & 0xc)
  58         {
  59         case 0:
  60                 return CLOCK_333M;
  61         case 4:
  62                 return ddr_clock;
  63         }
  64         return ddr_clock << 1;
  65 }
  66 EXPORT_SYMBOL(ifxmips_get_cpu_hz);
  67
  68 unsigned int
  69 ifxmips_get_fpi_hz(void)
  70 {
  71         unsigned int ddr_clock = ifxmips_get_ddr_hz();
  72         if(ifxmips_r32(IFXMIPS_CGU_SYS) & 0x40)
  73                 return ddr_clock >> 1;
  74         return ddr_clock;
  75 }
  76 EXPORT_SYMBOL(ifxmips_get_fpi_hz);
  77
  78 unsigned int
  79 ifxmips_get_cpu_ver(void)
  80 {
  81         return ifxmips_r32(IFXMIPS_MCD_CHIPID) & 0xFFFFF000;
  82 }
  83 EXPORT_SYMBOL(ifxmips_get_cpu_ver);
  84
  85 static __inline__ u32
  86 ifxmips_get_counter_resolution(void)
  87 {
  88         u32 res;
  89         __asm__ __volatile__(
  90                 ".set   push\n"
  91                 ".set   mips32r2\n"
  92                 ".set   noreorder\n"
  93                 "rdhwr  %0, $3\n"
  94                 "ehb\n"
  95                 ".set pop\n"
  96                 : "=&r" (res)
  97                 : /* no input */
  98                 : "memory");
  99                 instruction_hazard();
 100                 return res;
 101 }
 102
 103 int
 104 ifxmips_be_handler(struct pt_regs *regs, int is_fixup)
 105 {
 106         /*TODO*/
 107         printk(KERN_ERR "TODO: BUS error\n");
 108
 109         return MIPS_BE_FATAL;
 110 }
 111
 112 void __init
 113 plat_time_init(void)
 114 {
 115         mips_hpt_frequency = ifxmips_get_cpu_hz() / ifxmips_get_counter_resolution();
 116         r4k_cur = (read_c0_count() + r4k_offset);
 117         write_c0_compare(r4k_cur);
 118         ifxmips_pmu_enable(IFXMIPS_PMU_PWDCR_GPT | IFXMIPS_PMU_PWDCR_FPI);
 119
 120         ifxmips_w32(0x100, IFXMIPS_GPTU_GPT_CLC);
 121
 122         ifxmips_w32(0xffff, IFXMIPS_GPTU_GPT_CAPREL);
 123         ifxmips_w32(0x80C0, IFXMIPS_GPTU_GPT_T6CON);
 124 }
 125
 126 void __init
 127 plat_mem_setup(void)
 128 {
 129         u32 status;
 130         prom_printf("This %s has a cpu rev of 0x%X\n", get_system_type(), ifxmips_get_cpu_ver());
 131
 132         status = read_c0_status();
 133         status &= (~(1<<25));
 134         write_c0_status(status);
 135
 136         ifxmips_reboot_setup();
 137         board_be_handler = &ifxmips_be_handler;
 138
 139         ioport_resource.start = IOPORT_RESOURCE_START;
 140         ioport_resource.end = IOPORT_RESOURCE_END;
 141         iomem_resource.start = IOMEM_RESOURCE_START;
 142         iomem_resource.end = IOMEM_RESOURCE_END;
 143 }