target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-mf18a.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
   3 // Copyright (c) 2022, Marcin Gajda <mgajda@o2.pl>.
   4
   5
   6 #include "qcom-ipq4019.dtsi"
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10 #include <dt-bindings/leds/common.h>
  11
  12 / {
  13         model = "ZTE MF18A";
  14         compatible = "zte,mf18a";
  15
  16         aliases {
  17                 led-boot = &led_power;
  18                 led-failsafe = &led_power;
  19                 led-running = &led_power;
  20                 led-upgrade = &led_power;
  21         };
  22
  23         chosen {
  24                 /*
  25                  * bootargs forced by u-boot bootipq command:
  26                  * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
  27                  */
  28                 bootargs-append = " root=/dev/ubiblock0_1";
  29         };
  30
  31         gpio-restart {
  32                 compatible = "gpio-restart";
  33                 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
  34         };
  35
  36         leds {
  37                 compatible = "gpio-leds";
  38
  39                 led_internal: led-0 {
  40                         label = "blue:internal";
  41                         gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
  42                         default-state = "keep";
  43                 };
  44
  45                 led_power: led-1 {
  46                         label = "blue:power";
  47                         gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
  48                         default-state = "keep";
  49                 };
  50
  51                 led-2 {
  52                         function = LED_FUNCTION_WLAN;
  53                         label = "blue:wlan";
  54                         gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
  55                         linux,default-trigger = "phy0tpt";
  56                 };
  57
  58                 led-3 {
  59                         label = "red:wlan";
  60                         gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
  61                 };
  62
  63                 led-4 {
  64                         function = LED_FUNCTION_WLAN;
  65                         label = "blue:smart";
  66                         gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
  67                         linux,default-trigger = "phy1tpt";
  68                 };
  69
  70                 led-5 {
  71                         label = "red:smart";
  72                         gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
  73                 };
  74
  75                 resetzwave {
  76                         label = "resetzwave";
  77                         gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
  78                 };
  79         };
  80
  81         keys {
  82                 compatible = "gpio-keys";
  83
  84                 reset {
  85                         label = "reset";
  86                         linux,code = <KEY_RESTART>;
  87                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  88                 };
  89
  90                 wps {
  91                         label = "wps";
  92                         linux,code = <KEY_WPS_BUTTON>;
  93                         gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
  94                 };
  95         };
  96
  97         soc {
  98                 rng@22000 {
  99                         status = "okay";
 100                 };
 101
 102                 mdio@90000 {
 103                         status = "okay";
 104                         pinctrl-0 = <&mdio_pins>;
 105                         pinctrl-names = "default";
 106                         reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
 107                         reset-delay-us = <2000>;
 108                 };
 109
 110                 tcsr@1949000 {
 111                         compatible = "qcom,tcsr";
 112                         reg = <0x1949000 0x100>;
 113                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
 114                 };
 115
 116                 tcsr@194b000 {
 117                         /* select hostmode */
 118                         compatible = "qcom,tcsr";
 119                         reg = <0x194b000 0x100>;
 120                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
 121                         status = "okay";
 122                 };
 123
 124                 ess_tcsr@1953000 {
 125                         compatible = "qcom,tcsr";
 126                         reg = <0x1953000 0x1000>;
 127                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
 128                 };
 129
 130                 tcsr@1957000 {
 131                         compatible = "qcom,tcsr";
 132                         reg = <0x1957000 0x100>;
 133                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
 134                 };
 135
 136                 usb2@60f8800 {
 137                         status = "okay";
 138                 };
 139
 140                 usb3@8af8800 {
 141                         status = "okay";
 142                 };
 143
 144                 crypto@8e3a000 {
 145                         status = "okay";
 146                 };
 147
 148                 watchdog@b017000 {
 149                         status = "okay";
 150                 };
 151         };
 152 };
 153
 154 &blsp_dma {
 155         status = "okay";
 156 };
 157
 158 &blsp1_spi1 {
 159         pinctrl-0 = <&spi_0_pins>;
 160         pinctrl-names = "default";
 161         status = "okay";
 162         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 163
 164         flash@0 {
 165                 /* u-boot is looking for "n25q128a11" property */
 166                 compatible = "jedec,spi-nor", "n25q128a11";
 167                 #address-cells = <1>;
 168                 #size-cells = <1>;
 169                 reg = <0>;
 170                 spi-max-frequency = <24000000>;
 171
 172                 partitions {
 173                         compatible = "fixed-partitions";
 174                         #address-cells = <1>;
 175                         #size-cells = <1>;
 176
 177                         partition@0 {
 178                                 label = "0:SBL1";
 179                                 reg = <0x0 0x40000>;
 180                                 read-only;
 181                         };
 182
 183                         partition@40000 {
 184                                 label = "0:MIBIB";
 185                                 reg = <0x40000 0x20000>;
 186                                 read-only;
 187                         };
 188
 189                         partition@60000 {
 190                                 label = "0:QSEE";
 191                                 reg = <0x60000 0x60000>;
 192                                 read-only;
 193                                 };
 194
 195                         partition@c0000 {
 196                                 label = "0:CDT";
 197                                 reg = <0xc0000 0x10000>;
 198                                 read-only;
 199                         };
 200
 201                         partition@d0000 {
 202                                 label = "0:DDRPARAMS";
 203                                 reg = <0xd0000 0x10000>;
 204                                 read-only;
 205                         };
 206
 207                         partition@e0000 {
 208                                 label = "0:APPSBLENV";
 209                                 reg = <0xe0000 0x10000>;
 210                                 read-only;
 211                         };
 212
 213                         partition@f0000 {
 214                                 label = "0:APPSBL";
 215                                 reg = <0xf0000 0xc0000>;
 216                                 read-only;
 217                         };
 218
 219                         partition@1b0000 {
 220                                 label = "0:reserved1";
 221                                 reg = <0x1b0000 0x50000>;
 222                                 read-only;
 223                         };
 224                 };
 225         };
 226 };
 227
 228 &blsp1_uart1 {
 229         pinctrl-0 = <&serial_pins>;
 230         pinctrl-names = "default";
 231         status = "okay";
 232 };
 233
 234 &cryptobam {
 235         status = "okay";
 236 };
 237
 238 &gmac {
 239         status = "okay";
 240         nvmem-cell-names = "mac-address";
 241         nvmem-cells = <&macaddr_config_0 0>;
 242 };
 243
 244 &switch {
 245         status = "okay";
 246 };
 247
 248 &swport2 {
 249         status = "okay";
 250
 251         label = "wan";
 252
 253         nvmem-cell-names = "mac-address";
 254         nvmem-cells = <&macaddr_config_0 1>;
 255 };
 256
 257 &swport3 {
 258         status = "okay";
 259
 260         label = "lan";
 261 };
 262
 263 &nand {
 264         pinctrl-0 = <&nand_pins>;
 265         pinctrl-names = "default";
 266         status = "okay";
 267
 268         nand@0 {
 269                 partitions {
 270                         compatible = "fixed-partitions";
 271                         #address-cells = <1>;
 272                         #size-cells = <1>;
 273
 274                         partition@0 {
 275                                 label = "fota-flag";
 276                                 reg = <0x0 0xa0000>;
 277                                 read-only;
 278                         };
 279
 280                         partition@a0000 {
 281                                 label = "ART";
 282                                 reg = <0xa0000 0x80000>;
 283                                 read-only;
 284
 285                                 nvmem-layout {
 286                                         compatible = "fixed-layout";
 287                                         #address-cells = <1>;
 288                                         #size-cells = <1>;
 289
 290                                         precal_art_1000: precal@1000 {
 291                                                 reg = <0x1000 0x2f20>;
 292                                         };
 293
 294                                         precal_art_9000: precal@9000 {
 295                                                 reg = <0x9000 0x2f20>;
 296                                         };
 297                                 };
 298                         };
 299
 300                         partition@120000 {
 301                                 label = "mac";
 302                                 reg = <0x120000 0x80000>;
 303                                 read-only;
 304
 305                                 nvmem-layout {
 306                                         compatible = "fixed-layout";
 307                                         #address-cells = <1>;
 308                                         #size-cells = <1>;
 309
 310                                         macaddr_config_0: macaddr@0 {
 311                                                 compatible = "mac-base";
 312                                                 reg = <0x0 0x6>;
 313                                                 #nvmem-cell-cells = <1>;
 314                                         };
 315                                 };
 316                         };
 317
 318                         partition@1a0000 {
 319                                 label = "reserved2";
 320                                 reg = <0x1a0000 0xc0000>;
 321                                 read-only;
 322                         };
 323
 324                         partition@260000 {
 325                                 label = "cfg-param";
 326                                 reg = <0x260000 0x400000>;
 327                                 read-only;
 328                         };
 329
 330                         partition@660000 {
 331                                 label = "log";
 332                                 reg = <0x660000 0x400000>;
 333                         };
 334
 335                         partition@a60000 {
 336                                 label = "oops";
 337                                 reg = <0xa60000 0xa0000>;
 338                         };
 339
 340                         partition@b00000 {
 341                                 label = "reserved3";
 342                                 reg = <0xb00000 0x500000>;
 343                                 read-only;
 344                         };
 345
 346                         partition@1000000 {
 347                                 label = "web";
 348                                 reg = <0x1000000 0x800000>;
 349                         };
 350
 351                         partition@1800000 {
 352                                 label = "rootfs";
 353                                 reg = <0x1800000 0x1d00000>;
 354                         };
 355
 356                         partition@3500000 {
 357                                 label = "data";
 358                                 reg = <0x3500000 0x1900000>;
 359                         };
 360
 361                         partition@4e00000 {
 362                                 label = "fota";
 363                                 reg = <0x4e00000 0x2800000>;
 364
 365                         };
 366                         partition@7600000 {
 367                                 label = "iot-db";
 368                                 reg = <0x7600000 0xa00000>;
 369                         };
 370                 };
 371         };
 372 };
 373
 374 &qpic_bam {
 375         status = "okay";
 376 };
 377
 378 &tlmm {
 379         i2c_0_pins: i2c_0_pinmux {
 380                 mux {
 381                         pins = "gpio20", "gpio21";
 382                         function = "blsp_i2c0";
 383                         bias-disable;
 384                 };
 385         };
 386
 387         mdio_pins: mdio_pinmux {
 388                 mux_1 {
 389                         pins = "gpio6";
 390                         function = "mdio";
 391                         bias-pull-up;
 392                 };
 393
 394                 mux_2 {
 395                         pins = "gpio7";
 396                         function = "mdc";
 397                         bias-pull-up;
 398                 };
 399         };
 400
 401         nand_pins: nand_pins {
 402                 pullups {
 403                         pins =  "gpio52", "gpio53", "gpio58",
 404                                 "gpio59";
 405                         function = "qpic";
 406                         bias-pull-up;
 407                 };
 408
 409                 pulldowns {
 410                         pins =  "gpio54", "gpio55", "gpio56",
 411                                 "gpio57", "gpio60",
 412                                 "gpio62", "gpio63", "gpio64",
 413                                 "gpio65", "gpio66", "gpio67",
 414                                 "gpio69";
 415                         function = "qpic";
 416                         bias-pull-down;
 417                 };
 418         };
 419
 420         serial_pins: serial_pinmux {
 421                 mux {
 422                         pins = "gpio16", "gpio17";
 423                         function = "blsp_uart0";
 424                         bias-disable;
 425                 };
 426         };
 427
 428         spi_0_pins: spi_0_pinmux {
 429                 pinmux {
 430                         function = "blsp_spi0";
 431                         pins = "gpio13", "gpio14", "gpio15";
 432                         drive-strength = <12>;
 433                         bias-disable;
 434                 };
 435
 436                 pinmux_cs {
 437                         function = "gpio";
 438                         pins = "gpio12";
 439                         drive-strength = <2>;
 440                         bias-disable;
 441                         output-high;
 442                 };
 443         };
 444 };
 445
 446 &usb2_hs_phy {
 447         status = "okay";
 448 };
 449
 450 &usb3_ss_phy {
 451         status = "okay";
 452 };
 453
 454 &usb3_hs_phy {
 455         status = "okay";
 456 };
 457
 458 &wifi0 {
 459         status = "okay";
 460         nvmem-cell-names = "pre-calibration", "mac-address";
 461         nvmem-cells = <&precal_art_1000>, <&macaddr_config_0 2>;
 462         qcom,ath10k-calibration-variant = "ZTE-MF18A";
 463 };
 464
 465 //* This node is used for 5Ghz on QCA9982 */
 466 &pcie0 {
 467         status = "okay";
 468         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 469         wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
 470         clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
 471
 472         bridge@0,0 {
 473                 reg = <0x00000000 0 0 0 0>;
 474                 #address-cells = <3>;
 475                 #size-cells = <2>;
 476                 ranges;
 477
 478                 wifi2: wifi@1,0 {
 479                         compatible = "pci168c,0040";
 480                         nvmem-cell-names = "pre-calibration", "mac-address";
 481                         nvmem-cells = <&precal_art_9000>, <&macaddr_config_0 3>;
 482                         qcom,ath10k-calibration-variant = "ZTE-MF18A";
 483                         reg = <0x00010000 0 0 0 0>;
 484                 };
 485         };
 486 };
 487
 488