ipq40xx: fix dts error in LED color/function conversion
[openwrt/openwrt.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4019-mf18a.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2022, Marcin Gajda <mgajda@o2.pl>.
4
5
6 #include "qcom-ipq4019.dtsi"
7 #include <dt-bindings/soc/qcom,tcsr.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11
12 / {
13 model = "ZTE MF18A";
14 compatible = "zte,mf18a";
15
16 aliases {
17 led-boot = &led_power;
18 led-failsafe = &led_power;
19 led-running = &led_power;
20 led-upgrade = &led_power;
21 };
22
23 chosen {
24 /*
25 * bootargs forced by u-boot bootipq command:
26 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
27 */
28 bootargs-append = " root=/dev/ubiblock0_1";
29 };
30
31 gpio-restart {
32 compatible = "gpio-restart";
33 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
34 };
35
36 leds {
37 compatible = "gpio-leds";
38
39 led_internal: led-0 {
40 label = "blue:internal";
41 gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
42 default-state = "keep";
43 };
44
45 led_power: led-1 {
46 function = LED_FUNCTION_POWER;
47 color = <LED_COLOR_ID_BLUE>;
48 gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
49 default-state = "keep";
50 };
51
52 led-2 {
53 function = LED_FUNCTION_WLAN;
54 color = <LED_COLOR_ID_BLUE>;
55 gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
56 linux,default-trigger = "phy0tpt";
57 };
58
59 led-3 {
60 function = LED_FUNCTION_WLAN;
61 color = <LED_COLOR_ID_RED>;
62 gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
63 };
64
65 led-4 {
66 function = LED_FUNCTION_WLAN;
67 label = "blue:smart";
68 gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
69 linux,default-trigger = "phy1tpt";
70 };
71
72 led-5 {
73 label = "red:smart";
74 gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
75 };
76
77 resetzwave {
78 label = "resetzwave";
79 gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
80 };
81 };
82
83 keys {
84 compatible = "gpio-keys";
85
86 reset {
87 label = "reset";
88 linux,code = <KEY_RESTART>;
89 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
90 };
91
92 wps {
93 label = "wps";
94 linux,code = <KEY_WPS_BUTTON>;
95 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
96 };
97 };
98
99 soc {
100 rng@22000 {
101 status = "okay";
102 };
103
104 mdio@90000 {
105 status = "okay";
106 pinctrl-0 = <&mdio_pins>;
107 pinctrl-names = "default";
108 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
109 reset-delay-us = <2000>;
110 };
111
112 tcsr@1949000 {
113 compatible = "qcom,tcsr";
114 reg = <0x1949000 0x100>;
115 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
116 };
117
118 tcsr@194b000 {
119 /* select hostmode */
120 compatible = "qcom,tcsr";
121 reg = <0x194b000 0x100>;
122 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
123 status = "okay";
124 };
125
126 ess_tcsr@1953000 {
127 compatible = "qcom,tcsr";
128 reg = <0x1953000 0x1000>;
129 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
130 };
131
132 tcsr@1957000 {
133 compatible = "qcom,tcsr";
134 reg = <0x1957000 0x100>;
135 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
136 };
137
138 usb2@60f8800 {
139 status = "okay";
140 };
141
142 usb3@8af8800 {
143 status = "okay";
144 };
145
146 crypto@8e3a000 {
147 status = "okay";
148 };
149
150 watchdog@b017000 {
151 status = "okay";
152 };
153 };
154 };
155
156 &blsp_dma {
157 status = "okay";
158 };
159
160 &blsp1_spi1 {
161 pinctrl-0 = <&spi_0_pins>;
162 pinctrl-names = "default";
163 status = "okay";
164 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
165
166 flash@0 {
167 /* u-boot is looking for "n25q128a11" property */
168 compatible = "jedec,spi-nor", "n25q128a11";
169 #address-cells = <1>;
170 #size-cells = <1>;
171 reg = <0>;
172 spi-max-frequency = <24000000>;
173
174 partitions {
175 compatible = "fixed-partitions";
176 #address-cells = <1>;
177 #size-cells = <1>;
178
179 partition@0 {
180 label = "0:SBL1";
181 reg = <0x0 0x40000>;
182 read-only;
183 };
184
185 partition@40000 {
186 label = "0:MIBIB";
187 reg = <0x40000 0x20000>;
188 read-only;
189 };
190
191 partition@60000 {
192 label = "0:QSEE";
193 reg = <0x60000 0x60000>;
194 read-only;
195 };
196
197 partition@c0000 {
198 label = "0:CDT";
199 reg = <0xc0000 0x10000>;
200 read-only;
201 };
202
203 partition@d0000 {
204 label = "0:DDRPARAMS";
205 reg = <0xd0000 0x10000>;
206 read-only;
207 };
208
209 partition@e0000 {
210 label = "0:APPSBLENV";
211 reg = <0xe0000 0x10000>;
212 read-only;
213 };
214
215 partition@f0000 {
216 label = "0:APPSBL";
217 reg = <0xf0000 0xc0000>;
218 read-only;
219 };
220
221 partition@1b0000 {
222 label = "0:reserved1";
223 reg = <0x1b0000 0x50000>;
224 read-only;
225 };
226 };
227 };
228 };
229
230 &blsp1_uart1 {
231 pinctrl-0 = <&serial_pins>;
232 pinctrl-names = "default";
233 status = "okay";
234 };
235
236 &cryptobam {
237 status = "okay";
238 };
239
240 &gmac {
241 status = "okay";
242 nvmem-cell-names = "mac-address";
243 nvmem-cells = <&macaddr_config_0 0>;
244 };
245
246 &switch {
247 status = "okay";
248 };
249
250 &swport2 {
251 status = "okay";
252
253 label = "wan";
254
255 nvmem-cell-names = "mac-address";
256 nvmem-cells = <&macaddr_config_0 1>;
257 };
258
259 &swport3 {
260 status = "okay";
261
262 label = "lan";
263 };
264
265 &nand {
266 pinctrl-0 = <&nand_pins>;
267 pinctrl-names = "default";
268 status = "okay";
269
270 nand@0 {
271 partitions {
272 compatible = "fixed-partitions";
273 #address-cells = <1>;
274 #size-cells = <1>;
275
276 partition@0 {
277 label = "fota-flag";
278 reg = <0x0 0xa0000>;
279 read-only;
280 };
281
282 partition@a0000 {
283 label = "ART";
284 reg = <0xa0000 0x80000>;
285 read-only;
286
287 nvmem-layout {
288 compatible = "fixed-layout";
289 #address-cells = <1>;
290 #size-cells = <1>;
291
292 precal_art_1000: precal@1000 {
293 reg = <0x1000 0x2f20>;
294 };
295
296 precal_art_9000: precal@9000 {
297 reg = <0x9000 0x2f20>;
298 };
299 };
300 };
301
302 partition@120000 {
303 label = "mac";
304 reg = <0x120000 0x80000>;
305 read-only;
306
307 nvmem-layout {
308 compatible = "fixed-layout";
309 #address-cells = <1>;
310 #size-cells = <1>;
311
312 macaddr_config_0: macaddr@0 {
313 compatible = "mac-base";
314 reg = <0x0 0x6>;
315 #nvmem-cell-cells = <1>;
316 };
317 };
318 };
319
320 partition@1a0000 {
321 label = "reserved2";
322 reg = <0x1a0000 0xc0000>;
323 read-only;
324 };
325
326 partition@260000 {
327 label = "cfg-param";
328 reg = <0x260000 0x400000>;
329 read-only;
330 };
331
332 partition@660000 {
333 label = "log";
334 reg = <0x660000 0x400000>;
335 };
336
337 partition@a60000 {
338 label = "oops";
339 reg = <0xa60000 0xa0000>;
340 };
341
342 partition@b00000 {
343 label = "reserved3";
344 reg = <0xb00000 0x500000>;
345 read-only;
346 };
347
348 partition@1000000 {
349 label = "web";
350 reg = <0x1000000 0x800000>;
351 };
352
353 partition@1800000 {
354 label = "rootfs";
355 reg = <0x1800000 0x1d00000>;
356 };
357
358 partition@3500000 {
359 label = "data";
360 reg = <0x3500000 0x1900000>;
361 };
362
363 partition@4e00000 {
364 label = "fota";
365 reg = <0x4e00000 0x2800000>;
366
367 };
368 partition@7600000 {
369 label = "iot-db";
370 reg = <0x7600000 0xa00000>;
371 };
372 };
373 };
374 };
375
376 &qpic_bam {
377 status = "okay";
378 };
379
380 &tlmm {
381 i2c_0_pins: i2c_0_pinmux {
382 mux {
383 pins = "gpio20", "gpio21";
384 function = "blsp_i2c0";
385 bias-disable;
386 };
387 };
388
389 mdio_pins: mdio_pinmux {
390 mux_1 {
391 pins = "gpio6";
392 function = "mdio";
393 bias-pull-up;
394 };
395
396 mux_2 {
397 pins = "gpio7";
398 function = "mdc";
399 bias-pull-up;
400 };
401 };
402
403 nand_pins: nand_pins {
404 pullups {
405 pins = "gpio52", "gpio53", "gpio58",
406 "gpio59";
407 function = "qpic";
408 bias-pull-up;
409 };
410
411 pulldowns {
412 pins = "gpio54", "gpio55", "gpio56",
413 "gpio57", "gpio60",
414 "gpio62", "gpio63", "gpio64",
415 "gpio65", "gpio66", "gpio67",
416 "gpio69";
417 function = "qpic";
418 bias-pull-down;
419 };
420 };
421
422 serial_pins: serial_pinmux {
423 mux {
424 pins = "gpio16", "gpio17";
425 function = "blsp_uart0";
426 bias-disable;
427 };
428 };
429
430 spi_0_pins: spi_0_pinmux {
431 pinmux {
432 function = "blsp_spi0";
433 pins = "gpio13", "gpio14", "gpio15";
434 drive-strength = <12>;
435 bias-disable;
436 };
437
438 pinmux_cs {
439 function = "gpio";
440 pins = "gpio12";
441 drive-strength = <2>;
442 bias-disable;
443 output-high;
444 };
445 };
446 };
447
448 &usb2_hs_phy {
449 status = "okay";
450 };
451
452 &usb3_ss_phy {
453 status = "okay";
454 };
455
456 &usb3_hs_phy {
457 status = "okay";
458 };
459
460 &wifi0 {
461 status = "okay";
462 nvmem-cell-names = "pre-calibration", "mac-address";
463 nvmem-cells = <&precal_art_1000>, <&macaddr_config_0 2>;
464 qcom,ath10k-calibration-variant = "ZTE-MF18A";
465 };
466
467 //* This node is used for 5Ghz on QCA9982 */
468 &pcie0 {
469 status = "okay";
470 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
471 wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
472 clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
473
474 bridge@0,0 {
475 reg = <0x00000000 0 0 0 0>;
476 #address-cells = <3>;
477 #size-cells = <2>;
478 ranges;
479
480 wifi2: wifi@1,0 {
481 compatible = "pci168c,0040";
482 nvmem-cell-names = "pre-calibration", "mac-address";
483 nvmem-cells = <&precal_art_9000>, <&macaddr_config_0 3>;
484 qcom,ath10k-calibration-variant = "ZTE-MF18A";
485 reg = <0x00010000 0 0 0 0>;
486 };
487 };
488 };
489
490