target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wrtq-329acn.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "Luma Home WRTQ-329ACN";
  10         compatible = "luma,wrtq-329acn";
  11
  12         i2c-gpio {
  13                 compatible = "i2c-gpio";
  14                 sda-gpios = <&tlmm 1 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  15                 scl-gpios = <&tlmm 0 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 /* No driver exists */
  20                 led_ring@48 {
  21                         compatible = "ti,msp430";
  22                         reg = <0x48>;
  23                 };
  24
  25                 eeprom@50 {
  26                         compatible = "atmel,24c16";
  27                         reg = <0x50>;
  28                         pagesize = <16>;
  29                         read-only;
  30                 };
  31         };
  32
  33         keys {
  34                 compatible = "gpio-keys";
  35
  36                 reset {
  37                         label = "reset";
  38                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  39                         linux,code = <KEY_RESTART>;
  40                 };
  41         };
  42
  43         soc {
  44                 rng@22000 {
  45                         status = "okay";
  46                 };
  47
  48                 tcsr@1949000 {
  49                         compatible = "qcom,tcsr";
  50                         reg = <0x1949000 0x100>;
  51                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  52                 };
  53
  54                 tcsr@194b000 {
  55                         compatible = "qcom,tcsr";
  56                         reg = <0x194b000 0x100>;
  57                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  58                 };
  59
  60                 ess_tcsr@1953000 {
  61                         compatible = "qcom,tcsr";
  62                         reg = <0x1953000 0x1000>;
  63                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  64                 };
  65
  66                 tcsr@1957000 {
  67                         compatible = "qcom,tcsr";
  68                         reg = <0x1957000 0x100>;
  69                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  70                 };
  71
  72                 crypto@8e3a000 {
  73                         status = "okay";
  74                 };
  75
  76                 watchdog@b017000 {
  77                         status = "okay";
  78                 };
  79         };
  80 };
  81
  82 &blsp_dma {
  83         status = "okay";
  84 };
  85
  86
  87 &blsp1_spi1 {
  88         status = "okay";
  89
  90         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
  91                    <&tlmm 59 GPIO_ACTIVE_HIGH>;
  92         pinctrl-0 = <&spi0_pins>;
  93         pinctrl-names = "default";
  94
  95         flash@0 {
  96                 compatible = "jedec,spi-nor";
  97                 reg = <0>;
  98                 spi-max-frequency = <24000000>;
  99
 100                 partitions {
 101                         compatible = "fixed-partitions";
 102                         #address-cells = <1>;
 103                         #size-cells = <1>;
 104
 105                         partition@0 {
 106                                 label = "0:SBL1";
 107                                 reg = <0x000000 0x040000>;
 108                                 read-only;
 109                         };
 110
 111                         partition@40000 {
 112                                 label = "0:MIBIB";
 113                                 reg = <0x040000 0x020000>;
 114                                 read-only;
 115                         };
 116
 117                         partition@60000 {
 118                                 label = "0:QSEE";
 119                                 reg = <0x060000 0x060000>;
 120                                 read-only;
 121                         };
 122
 123                         partition@c0000 {
 124                                 label = "0:CDT";
 125                                 reg = <0x0c0000 0x010000>;
 126                                 read-only;
 127                         };
 128
 129                         partition@d0000 {
 130                                 label = "0:DDRPARAMS";
 131                                 reg = <0x0d0000 0x010000>;
 132                                 read-only;
 133                         };
 134
 135                         partition@e0000 {
 136                                 label = "0:APPSBLENV";
 137                                 reg = <0x0e0000 0x010000>;
 138                         };
 139
 140                         partition@f0000 {
 141                                 label = "0:APPSBL";
 142                                 reg = <0x0f0000 0x080000>;
 143                                 read-only;
 144                         };
 145
 146                         partition@170000 {
 147                                 label = "0:ART";
 148                                 reg = <0x170000 0x010000>;
 149                                 read-only;
 150
 151                                 nvmem-layout {
 152                                         compatible = "fixed-layout";
 153                                         #address-cells = <1>;
 154                                         #size-cells = <1>;
 155
 156                                         macaddr_art_0: macaddr@0{
 157                                                 reg = <0x0000 0x0006>;
 158                                         };
 159
 160                                         macaddr_art_6: macaddr@6{
 161                                                 reg = <0x0006 0x0006>;
 162                                         };
 163
 164                                         precal_art_1000: precal@1000 {
 165                                                 reg = <0x1000 0x2f20>;
 166                                         };
 167
 168                                         precal_art_5000: precal@5000 {
 169                                                 reg = <0x5000 0x2f20>;
 170                                         };
 171                                 };
 172                         };
 173                 };
 174         };
 175
 176         flash@1 {
 177                 status = "okay";
 178
 179                 compatible = "spi-nand";
 180                 reg = <1>;
 181                 spi-max-frequency = <24000000>;
 182
 183                 partitions {
 184                         compatible = "fixed-partitions";
 185                         #address-cells = <1>;
 186                         #size-cells = <1>;
 187
 188                         partition@0 {
 189                                 label = "ubi";
 190                                 reg = <0x0000000 0x8000000>;
 191                         };
 192                 };
 193         };
 194 };
 195
 196 &blsp1_uart1 {
 197         status = "okay";
 198
 199         pinctrl-0 = <&serial0_pins>;
 200         pinctrl-names = "default";
 201 };
 202
 203 &cryptobam {
 204         status = "okay";
 205 };
 206
 207 &gmac {
 208         status = "okay";
 209 };
 210
 211 &ethphy0 {
 212         status = "disabled";
 213 };
 214
 215 &ethphy1 {
 216         status = "disabled";
 217 };
 218
 219 &ethphy3 {
 220         status = "disabled";
 221 };
 222
 223 &mdio {
 224         status = "okay";
 225 };
 226
 227 &switch {
 228         status = "okay";
 229 };
 230
 231 &swport3 {
 232         status = "okay";
 233
 234         label = "lan";
 235         nvmem-cell-names = "mac-address";
 236         nvmem-cells = <&macaddr_art_6>;
 237 };
 238
 239 &swport5 {
 240         status = "okay";
 241
 242         nvmem-cell-names = "mac-address";
 243         nvmem-cells = <&macaddr_art_0>;
 244 };
 245
 246 &tlmm {
 247         serial0_pins: serial0_pinmux {
 248                 mux {
 249                         function = "blsp_uart0";
 250                         pins = "gpio60", "gpio61";
 251                         bias-disable;
 252                 };
 253         };
 254
 255         spi0_pins: spi0_pinmux {
 256                 mux {
 257                         function = "blsp_spi0";
 258                         pins = "gpio55", "gpio56", "gpio57";
 259                         bias-disable;
 260                         drive-strength = <12>;
 261                 };
 262
 263                 mux_cs {
 264                         function = "gpio";
 265                         pins = "gpio54", "gpio59";
 266                         bias-disable;
 267                         drive-strength = <2>;
 268                         output-high;
 269                 };
 270         };
 271 };
 272
 273 &usb2_hs_phy {
 274         status = "okay";
 275 };
 276
 277 &usb2 {
 278         status = "okay";
 279 };
 280
 281 &usb3_hs_phy {
 282         status = "okay";
 283 };
 284
 285 &usb3_ss_phy {
 286         status = "okay";
 287 };
 288
 289 &usb3 {
 290         status = "okay";
 291 };
 292
 293 &wifi0 {
 294         status = "okay";
 295         nvmem-cell-names = "pre-calibration";
 296         nvmem-cells = <&precal_art_1000>;
 297         qcom,ath10k-calibration-variant = "Luma-WRTQ-329ACN";
 298 };
 299
 300 &wifi1 {
 301         status = "okay";
 302         nvmem-cell-names = "pre-calibration";
 303         nvmem-cells = <&precal_art_5000>;
 304         qcom,ath10k-calibration-variant = "Luma-WRTQ-329ACN";
 305 };