6f0ba09c8725c558d74132672da5e5d1e587d079
[openwrt/openwrt.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-r7500v2.dts
1 #include "qcom-ipq8064-v2.0-smb208.dtsi"
2
3 #include <dt-bindings/input/input.h>
4
5 / {
6 model = "Netgear Nighthawk X4 R7500v2";
7 compatible = "netgear,r7500v2", "qcom,ipq8064";
8
9 memory@0 {
10 reg = <0x42000000 0x1e000000>;
11 device_type = "memory";
12 };
13
14 reserved-memory {
15 rsvd@5fe00000 {
16 reg = <0x5fe00000 0x200000>;
17 reusable;
18 };
19 };
20
21 aliases {
22 mdio-gpio0 = &mdio0;
23
24 led-boot = &power;
25 led-failsafe = &power;
26 led-running = &power;
27 led-upgrade = &power;
28 };
29
30 chosen {
31 bootargs = "rootfstype=squashfs noinitrd";
32 };
33
34 keys {
35 compatible = "gpio-keys";
36 pinctrl-0 = <&button_pins>;
37 pinctrl-names = "default";
38
39 wifi {
40 label = "wifi";
41 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RFKILL>;
43 debounce-interval = <60>;
44 wakeup-source;
45 };
46
47 reset {
48 label = "reset";
49 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
50 linux,code = <KEY_RESTART>;
51 debounce-interval = <60>;
52 wakeup-source;
53 };
54
55 wps {
56 label = "wps";
57 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
58 linux,code = <KEY_WPS_BUTTON>;
59 debounce-interval = <60>;
60 wakeup-source;
61 };
62 };
63
64 leds {
65 compatible = "gpio-leds";
66 pinctrl-0 = <&led_pins>;
67 pinctrl-names = "default";
68
69 usb1 {
70 label = "amber:usb1";
71 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
72 };
73
74 usb3 {
75 label = "amber:usb3";
76 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
77 };
78
79 status {
80 label = "amber:status";
81 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
82 };
83
84 internet {
85 label = "white:internet";
86 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
87 };
88
89 wan {
90 label = "white:wan";
91 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
92 };
93
94 wps {
95 label = "white:wps";
96 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
97 };
98
99 esata {
100 label = "white:esata";
101 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
102 };
103
104 power: power {
105 label = "white:power";
106 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
107 default-state = "keep";
108 };
109
110 wifi {
111 label = "white:wifi";
112 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
113 };
114 };
115 };
116
117 &adm_dma {
118 status = "okay";
119 };
120
121 &qcom_pinmux {
122 button_pins: button_pins {
123 mux {
124 pins = "gpio6", "gpio54", "gpio65";
125 function = "gpio";
126 drive-strength = <2>;
127 bias-pull-up;
128 };
129 };
130
131 led_pins: led_pins {
132 mux {
133 pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
134 "gpio24","gpio26", "gpio53", "gpio64";
135 function = "gpio";
136 drive-strength = <2>;
137 bias-pull-up;
138 };
139 };
140
141 usb0_pwr_en_pins: usb0_pwr_en_pins {
142 mux {
143 pins = "gpio15";
144 function = "gpio";
145 drive-strength = <12>;
146 bias-pull-down;
147 output-high;
148 };
149 };
150
151 usb1_pwr_en_pins: usb1_pwr_en_pins {
152 mux {
153 pins = "gpio16", "gpio68";
154 function = "gpio";
155 drive-strength = <12>;
156 bias-pull-down;
157 output-high;
158 };
159 };
160 };
161
162 &sata_phy {
163 status = "okay";
164 };
165
166 &sata {
167 status = "okay";
168 };
169
170 &hs_phy_0 {
171 status = "okay";
172 };
173
174 &ss_phy_0 {
175 status = "okay";
176 };
177
178 &usb3_0 {
179 status = "okay";
180
181 pinctrl-0 = <&usb0_pwr_en_pins>;
182 pinctrl-names = "default";
183 };
184
185 &hs_phy_1 {
186 status = "okay";
187 };
188
189 &ss_phy_1 {
190 status = "okay";
191 };
192
193 &usb3_1 {
194 status = "okay";
195
196 pinctrl-0 = <&usb1_pwr_en_pins>;
197 pinctrl-names = "default";
198 };
199
200 &pcie0 {
201 status = "okay";
202 reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
203 pinctrl-0 = <&pcie0_pins>;
204 pinctrl-names = "default";
205
206 bridge@0,0 {
207 reg = <0x00000000 0 0 0 0>;
208 #address-cells = <3>;
209 #size-cells = <2>;
210 ranges;
211
212 wifi@1,0 {
213 compatible = "pci168c,0040";
214 reg = <0x00010000 0 0 0 0>;
215
216 nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
217 nvmem-cell-names = "mac-address", "pre-calibration";
218 mac-address-increment = <(1)>;
219 };
220 };
221 };
222
223 &pcie1 {
224 status = "okay";
225 reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
226 pinctrl-0 = <&pcie1_pins>;
227 pinctrl-names = "default";
228 max-link-speed = <1>;
229
230 bridge@0,0 {
231 reg = <0x00000000 0 0 0 0>;
232 #address-cells = <3>;
233 #size-cells = <2>;
234 ranges;
235
236 wifi@1,0 {
237 compatible = "pci168c,0040";
238 reg = <0x00010000 0 0 0 0>;
239
240 nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
241 nvmem-cell-names = "mac-address", "pre-calibration";
242 mac-address-increment = <(2)>;
243 };
244 };
245 };
246
247 &nand {
248 status = "okay";
249
250 nand@0 {
251 reg = <0>;
252 compatible = "qcom,nandcs";
253
254 nand-ecc-strength = <4>;
255 nand-bus-width = <8>;
256 nand-ecc-step-size = <512>;
257
258 nand-is-boot-medium;
259 qcom,boot-partitions = <0x0 0x1180000>;
260
261 partitions {
262 compatible = "fixed-partitions";
263 #address-cells = <1>;
264 #size-cells = <1>;
265
266 qcadata@0 {
267 label = "qcadata";
268 reg = <0x0000000 0x0c80000>;
269 read-only;
270 };
271
272 APPSBL@c80000 {
273 label = "APPSBL";
274 reg = <0x0c80000 0x0500000>;
275 read-only;
276 };
277
278 APPSBLENV@1180000 {
279 label = "APPSBLENV";
280 reg = <0x1180000 0x0080000>;
281 read-only;
282 };
283
284 art@1200000 {
285 label = "art";
286 reg = <0x1200000 0x0140000>;
287 read-only;
288 compatible = "nvmem-cells";
289 #address-cells = <1>;
290 #size-cells = <1>;
291
292 macaddr_art_0: macaddr@0 {
293 reg = <0x0 0x6>;
294 };
295
296 macaddr_art_6: macaddr@6 {
297 reg = <0x6 0x6>;
298 };
299
300 precal_art_1000: precal@1000 {
301 reg = <0x1000 0x2f20>;
302 };
303
304 precal_art_5000: precal@5000 {
305 reg = <0x5000 0x2f20>;
306 };
307 };
308
309 artbak: art@1340000 {
310 label = "artbak";
311 reg = <0x1340000 0x0140000>;
312 read-only;
313 };
314
315 kernel@1480000 {
316 label = "kernel";
317 reg = <0x1480000 0x0400000>;
318 };
319
320 ubi@1880000 {
321 label = "ubi";
322 reg = <0x1880000 0x6080000>;
323 };
324
325 reserve@7900000 {
326 label = "reserve";
327 reg = <0x7900000 0x0700000>;
328 read-only;
329 };
330 };
331 };
332 };
333
334 &mdio0 {
335 status = "okay";
336
337 pinctrl-0 = <&mdio0_pins>;
338 pinctrl-names = "default";
339
340 phy0: ethernet-phy@0 {
341 reg = <0>;
342 qca,ar8327-initvals = <
343 0x00004 0x7600000 /* PAD0_MODE */
344 0x00008 0x1000000 /* PAD5_MODE */
345 0x0000c 0x80 /* PAD6_MODE */
346 0x000e4 0xaa545 /* MAC_POWER_SEL */
347 0x000e0 0xc74164de /* SGMII_CTRL */
348 0x0007c 0x4e /* PORT0_STATUS */
349 0x00094 0x4e /* PORT6_STATUS */
350 >;
351 };
352
353 phy4: ethernet-phy@4 {
354 reg = <4>;
355 };
356 };
357
358 &gmac1 {
359 status = "okay";
360 phy-mode = "rgmii";
361 qcom,id = <1>;
362
363 pinctrl-0 = <&rgmii2_pins>;
364 pinctrl-names = "default";
365
366 nvmem-cells = <&macaddr_art_6>;
367 nvmem-cell-names = "mac-address";
368
369 fixed-link {
370 speed = <1000>;
371 full-duplex;
372 };
373 };
374
375 &gmac2 {
376 status = "okay";
377 phy-mode = "sgmii";
378 qcom,id = <2>;
379
380 nvmem-cells = <&macaddr_art_0>;
381 nvmem-cell-names = "mac-address";
382
383 fixed-link {
384 speed = <1000>;
385 full-duplex;
386 };
387 };