ipq806x: utilize nvmem-cells for pre-calibration data
[openwrt/staging/ldir.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-r7500v2.dts
1 #include "qcom-ipq8064-v2.0.dtsi"
2
3 #include <dt-bindings/input/input.h>
4
5 / {
6 model = "Netgear Nighthawk X4 R7500v2";
7 compatible = "netgear,r7500v2", "qcom,ipq8064";
8
9 memory@0 {
10 reg = <0x42000000 0x1e000000>;
11 device_type = "memory";
12 };
13
14 reserved-memory {
15 rsvd@5fe00000 {
16 reg = <0x5fe00000 0x200000>;
17 reusable;
18 };
19 };
20
21 aliases {
22 mdio-gpio0 = &mdio0;
23
24 led-boot = &power;
25 led-failsafe = &power;
26 led-running = &power;
27 led-upgrade = &power;
28 };
29
30 chosen {
31 bootargs = "rootfstype=squashfs noinitrd";
32 };
33
34 keys {
35 compatible = "gpio-keys";
36 pinctrl-0 = <&button_pins>;
37 pinctrl-names = "default";
38
39 wifi {
40 label = "wifi";
41 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RFKILL>;
43 debounce-interval = <60>;
44 wakeup-source;
45 };
46
47 reset {
48 label = "reset";
49 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
50 linux,code = <KEY_RESTART>;
51 debounce-interval = <60>;
52 wakeup-source;
53 };
54
55 wps {
56 label = "wps";
57 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
58 linux,code = <KEY_WPS_BUTTON>;
59 debounce-interval = <60>;
60 wakeup-source;
61 };
62 };
63
64 leds {
65 compatible = "gpio-leds";
66 pinctrl-0 = <&led_pins>;
67 pinctrl-names = "default";
68
69 usb1 {
70 label = "amber:usb1";
71 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
72 };
73
74 usb3 {
75 label = "amber:usb3";
76 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
77 };
78
79 status {
80 label = "amber:status";
81 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
82 };
83
84 internet {
85 label = "white:internet";
86 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
87 };
88
89 wan {
90 label = "white:wan";
91 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
92 };
93
94 wps {
95 label = "white:wps";
96 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
97 };
98
99 esata {
100 label = "white:esata";
101 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
102 };
103
104 power: power {
105 label = "white:power";
106 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
107 default-state = "keep";
108 };
109
110 wifi {
111 label = "white:wifi";
112 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
113 };
114 };
115 };
116
117 &adm_dma {
118 status = "okay";
119 };
120
121 &qcom_pinmux {
122 button_pins: button_pins {
123 mux {
124 pins = "gpio6", "gpio54", "gpio65";
125 function = "gpio";
126 drive-strength = <2>;
127 bias-pull-up;
128 };
129 };
130
131 led_pins: led_pins {
132 mux {
133 pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
134 "gpio24","gpio26", "gpio53", "gpio64";
135 function = "gpio";
136 drive-strength = <2>;
137 bias-pull-up;
138 };
139 };
140
141 usb0_pwr_en_pins: usb0_pwr_en_pins {
142 mux {
143 pins = "gpio15";
144 function = "gpio";
145 drive-strength = <12>;
146 bias-pull-down;
147 output-high;
148 };
149 };
150
151 usb1_pwr_en_pins: usb1_pwr_en_pins {
152 mux {
153 pins = "gpio16", "gpio68";
154 function = "gpio";
155 drive-strength = <12>;
156 bias-pull-down;
157 output-high;
158 };
159 };
160 };
161
162 &sata_phy {
163 status = "okay";
164 };
165
166 &sata {
167 status = "okay";
168 };
169
170 &usb3_0 {
171 status = "okay";
172
173 pinctrl-0 = <&usb0_pwr_en_pins>;
174 pinctrl-names = "default";
175 };
176
177 &usb3_1 {
178 status = "okay";
179
180 pinctrl-0 = <&usb1_pwr_en_pins>;
181 pinctrl-names = "default";
182 };
183
184 &pcie0 {
185 status = "okay";
186 reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
187 pinctrl-0 = <&pcie0_pins>;
188 pinctrl-names = "default";
189
190 bridge@0,0 {
191 reg = <0x00000000 0 0 0 0>;
192 #address-cells = <3>;
193 #size-cells = <2>;
194 ranges;
195
196 wifi@1,0 {
197 compatible = "pci168c,0040";
198 reg = <0x00010000 0 0 0 0>;
199
200 nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
201 nvmem-cell-names = "mac-address", "pre-calibration";
202 mac-address-increment = <(1)>;
203 };
204 };
205 };
206
207 &pcie1 {
208 status = "okay";
209 reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
210 pinctrl-0 = <&pcie1_pins>;
211 pinctrl-names = "default";
212 max-link-speed = <1>;
213
214 bridge@0,0 {
215 reg = <0x00000000 0 0 0 0>;
216 #address-cells = <3>;
217 #size-cells = <2>;
218 ranges;
219
220 wifi@1,0 {
221 compatible = "pci168c,0040";
222 reg = <0x00010000 0 0 0 0>;
223
224 nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
225 nvmem-cell-names = "mac-address", "pre-calibration";
226 mac-address-increment = <(2)>;
227 };
228 };
229 };
230
231 &nand_controller {
232 status = "okay";
233
234 pinctrl-0 = <&nand_pins>;
235 pinctrl-names = "default";
236
237 nand@0 {
238 reg = <0>;
239 compatible = "qcom,nandcs";
240
241 nand-ecc-strength = <4>;
242 nand-bus-width = <8>;
243 nand-ecc-step-size = <512>;
244
245 nand-is-boot-medium;
246 qcom,boot_pages_size = <0x1180000>;
247
248 partitions {
249 compatible = "fixed-partitions";
250 #address-cells = <1>;
251 #size-cells = <1>;
252
253 qcadata@0 {
254 label = "qcadata";
255 reg = <0x0000000 0x0c80000>;
256 read-only;
257 };
258
259 APPSBL@c80000 {
260 label = "APPSBL";
261 reg = <0x0c80000 0x0500000>;
262 read-only;
263 };
264
265 APPSBLENV@1180000 {
266 label = "APPSBLENV";
267 reg = <0x1180000 0x0080000>;
268 read-only;
269 };
270
271 art@1200000 {
272 label = "art";
273 reg = <0x1200000 0x0140000>;
274 read-only;
275 compatible = "nvmem-cells";
276 #address-cells = <1>;
277 #size-cells = <1>;
278
279 macaddr_art_0: macaddr@0 {
280 reg = <0x0 0x6>;
281 };
282
283 macaddr_art_6: macaddr@6 {
284 reg = <0x6 0x6>;
285 };
286
287 precal_art_1000: precal@1000 {
288 reg = <0x1000 0x2f20>;
289 };
290
291 precal_art_5000: precal@5000 {
292 reg = <0x5000 0x2f20>;
293 };
294 };
295
296 artbak: art@1340000 {
297 label = "artbak";
298 reg = <0x1340000 0x0140000>;
299 read-only;
300 };
301
302 kernel@1480000 {
303 label = "kernel";
304 reg = <0x1480000 0x0400000>;
305 };
306
307 ubi@1880000 {
308 label = "ubi";
309 reg = <0x1880000 0x6080000>;
310 };
311
312 reserve@7900000 {
313 label = "reserve";
314 reg = <0x7900000 0x0700000>;
315 read-only;
316 };
317 };
318 };
319 };
320
321 &mdio0 {
322 status = "okay";
323
324 pinctrl-0 = <&mdio0_pins>;
325 pinctrl-names = "default";
326
327 phy0: ethernet-phy@0 {
328 reg = <0>;
329 qca,ar8327-initvals = <
330 0x00004 0x7600000 /* PAD0_MODE */
331 0x00008 0x1000000 /* PAD5_MODE */
332 0x0000c 0x80 /* PAD6_MODE */
333 0x000e4 0xaa545 /* MAC_POWER_SEL */
334 0x000e0 0xc74164de /* SGMII_CTRL */
335 0x0007c 0x4e /* PORT0_STATUS */
336 0x00094 0x4e /* PORT6_STATUS */
337 >;
338 };
339
340 phy4: ethernet-phy@4 {
341 reg = <4>;
342 };
343 };
344
345 &gmac1 {
346 status = "okay";
347 phy-mode = "rgmii";
348 qcom,id = <1>;
349
350 pinctrl-0 = <&rgmii2_pins>;
351 pinctrl-names = "default";
352
353 nvmem-cells = <&macaddr_art_6>;
354 nvmem-cell-names = "mac-address";
355
356 fixed-link {
357 speed = <1000>;
358 full-duplex;
359 };
360 };
361
362 &gmac2 {
363 status = "okay";
364 phy-mode = "sgmii";
365 qcom,id = <2>;
366
367 nvmem-cells = <&macaddr_art_0>;
368 nvmem-cell-names = "mac-address";
369
370 fixed-link {
371 speed = <1000>;
372 full-duplex;
373 };
374 };