ipq806x: convert mtd-mac-address to nvmem implementation
[openwrt/openwrt.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-r7500v2.dts
1 #include "qcom-ipq8064-v2.0.dtsi"
2
3 #include <dt-bindings/input/input.h>
4
5 / {
6 model = "Netgear Nighthawk X4 R7500v2";
7 compatible = "netgear,r7500v2", "qcom,ipq8064";
8
9 memory@0 {
10 reg = <0x42000000 0x1e000000>;
11 device_type = "memory";
12 };
13
14 reserved-memory {
15 rsvd@5fe00000 {
16 reg = <0x5fe00000 0x200000>;
17 reusable;
18 };
19 };
20
21 aliases {
22 mdio-gpio0 = &mdio0;
23
24 led-boot = &power;
25 led-failsafe = &power;
26 led-running = &power;
27 led-upgrade = &power;
28 };
29
30 chosen {
31 bootargs = "rootfstype=squashfs noinitrd";
32 };
33
34 keys {
35 compatible = "gpio-keys";
36 pinctrl-0 = <&button_pins>;
37 pinctrl-names = "default";
38
39 wifi {
40 label = "wifi";
41 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RFKILL>;
43 debounce-interval = <60>;
44 wakeup-source;
45 };
46
47 reset {
48 label = "reset";
49 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
50 linux,code = <KEY_RESTART>;
51 debounce-interval = <60>;
52 wakeup-source;
53 };
54
55 wps {
56 label = "wps";
57 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
58 linux,code = <KEY_WPS_BUTTON>;
59 debounce-interval = <60>;
60 wakeup-source;
61 };
62 };
63
64 leds {
65 compatible = "gpio-leds";
66 pinctrl-0 = <&led_pins>;
67 pinctrl-names = "default";
68
69 usb1 {
70 label = "amber:usb1";
71 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
72 };
73
74 usb3 {
75 label = "amber:usb3";
76 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
77 };
78
79 status {
80 label = "amber:status";
81 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
82 };
83
84 internet {
85 label = "white:internet";
86 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
87 };
88
89 wan {
90 label = "white:wan";
91 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
92 };
93
94 wps {
95 label = "white:wps";
96 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
97 };
98
99 esata {
100 label = "white:esata";
101 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
102 };
103
104 power: power {
105 label = "white:power";
106 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
107 default-state = "keep";
108 };
109
110 wifi {
111 label = "white:wifi";
112 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
113 };
114 };
115 };
116
117 &adm_dma {
118 status = "okay";
119 };
120
121 &qcom_pinmux {
122 button_pins: button_pins {
123 mux {
124 pins = "gpio6", "gpio54", "gpio65";
125 function = "gpio";
126 drive-strength = <2>;
127 bias-pull-up;
128 };
129 };
130
131 led_pins: led_pins {
132 mux {
133 pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
134 "gpio24","gpio26", "gpio53", "gpio64";
135 function = "gpio";
136 drive-strength = <2>;
137 bias-pull-up;
138 };
139 };
140
141 usb0_pwr_en_pins: usb0_pwr_en_pins {
142 mux {
143 pins = "gpio15";
144 function = "gpio";
145 drive-strength = <12>;
146 bias-pull-down;
147 output-high;
148 };
149 };
150
151 usb1_pwr_en_pins: usb1_pwr_en_pins {
152 mux {
153 pins = "gpio16", "gpio68";
154 function = "gpio";
155 drive-strength = <12>;
156 bias-pull-down;
157 output-high;
158 };
159 };
160 };
161
162 &sata_phy {
163 status = "okay";
164 };
165
166 &sata {
167 status = "okay";
168 };
169
170 &usb3_0 {
171 status = "okay";
172
173 pinctrl-0 = <&usb0_pwr_en_pins>;
174 pinctrl-names = "default";
175 };
176
177 &usb3_1 {
178 status = "okay";
179
180 pinctrl-0 = <&usb1_pwr_en_pins>;
181 pinctrl-names = "default";
182 };
183
184 &pcie0 {
185 status = "okay";
186 reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
187 pinctrl-0 = <&pcie0_pins>;
188 pinctrl-names = "default";
189 };
190
191 &pcie1 {
192 status = "okay";
193 reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
194 pinctrl-0 = <&pcie1_pins>;
195 pinctrl-names = "default";
196 max-link-speed = <1>;
197 };
198
199 &nand_controller {
200 status = "okay";
201
202 pinctrl-0 = <&nand_pins>;
203 pinctrl-names = "default";
204
205 nand@0 {
206 reg = <0>;
207 compatible = "qcom,nandcs";
208
209 nand-ecc-strength = <4>;
210 nand-bus-width = <8>;
211 nand-ecc-step-size = <512>;
212
213 nand-is-boot-medium;
214 qcom,boot_pages_size = <0x1180000>;
215
216 partitions {
217 compatible = "fixed-partitions";
218 #address-cells = <1>;
219 #size-cells = <1>;
220
221 qcadata@0 {
222 label = "qcadata";
223 reg = <0x0000000 0x0c80000>;
224 read-only;
225 };
226
227 APPSBL@c80000 {
228 label = "APPSBL";
229 reg = <0x0c80000 0x0500000>;
230 read-only;
231 };
232
233 APPSBLENV@1180000 {
234 label = "APPSBLENV";
235 reg = <0x1180000 0x0080000>;
236 read-only;
237 };
238
239 art: art@1200000 {
240 label = "art";
241 reg = <0x1200000 0x0140000>;
242 read-only;
243 };
244
245 artbak: art@1340000 {
246 label = "artbak";
247 reg = <0x1340000 0x0140000>;
248 read-only;
249 };
250
251 kernel@1480000 {
252 label = "kernel";
253 reg = <0x1480000 0x0400000>;
254 };
255
256 ubi@1880000 {
257 label = "ubi";
258 reg = <0x1880000 0x6080000>;
259 };
260
261 reserve@7900000 {
262 label = "reserve";
263 reg = <0x7900000 0x0700000>;
264 read-only;
265 };
266 };
267 };
268 };
269
270 &mdio0 {
271 status = "okay";
272
273 pinctrl-0 = <&mdio0_pins>;
274 pinctrl-names = "default";
275
276 phy0: ethernet-phy@0 {
277 reg = <0>;
278 qca,ar8327-initvals = <
279 0x00004 0x7600000 /* PAD0_MODE */
280 0x00008 0x1000000 /* PAD5_MODE */
281 0x0000c 0x80 /* PAD6_MODE */
282 0x000e4 0xaa545 /* MAC_POWER_SEL */
283 0x000e0 0xc74164de /* SGMII_CTRL */
284 0x0007c 0x4e /* PORT0_STATUS */
285 0x00094 0x4e /* PORT6_STATUS */
286 >;
287 };
288
289 phy4: ethernet-phy@4 {
290 reg = <4>;
291 };
292 };
293
294 &gmac1 {
295 status = "okay";
296 phy-mode = "rgmii";
297 qcom,id = <1>;
298
299 pinctrl-0 = <&rgmii2_pins>;
300 pinctrl-names = "default";
301
302 nvmem-cells = <&macaddr_art_6>;
303 nvmem-cell-names = "mac-address";
304
305 fixed-link {
306 speed = <1000>;
307 full-duplex;
308 };
309 };
310
311 &gmac2 {
312 status = "okay";
313 phy-mode = "sgmii";
314 qcom,id = <2>;
315
316 nvmem-cells = <&macaddr_art_0>;
317 nvmem-cell-names = "mac-address";
318
319 fixed-link {
320 speed = <1000>;
321 full-duplex;
322 };
323 };
324
325 &art {
326 compatible = "nvmem-cells";
327 #address-cells = <1>;
328 #size-cells = <1>;
329
330 macaddr_art_0: macaddr@0 {
331 reg = <0x0 0x6>;
332 };
333
334 macaddr_art_6: macaddr@6 {
335 reg = <0x6 0x6>;
336 };
337 };