target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-db149.dts

   1 #include "qcom-ipq8064-v1.0.dtsi"
   2
   3 / {
   4         model = "Qualcomm IPQ8064/DB149";
   5         compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
   6
   7         reserved-memory {
   8                 #address-cells = <1>;
   9                 #size-cells = <1>;
  10                 ranges;
  11                 rsvd@41200000 {
  12                         reg = <0x41200000 0x300000>;
  13                         no-map;
  14                 };
  15         };
  16
  17         alias {
  18                 serial0 = &uart2;
  19                 mdio-gpio0 = &mdio0;
  20         };
  21
  22         chosen {
  23                 stdout-path = "serial0:115200n8";
  24         };
  25 };
  26
  27 &qcom_pinmux {
  28         i2c4_pins: i2c4_pinmux {
  29                 pins = "gpio12", "gpio13";
  30                 function = "gsbi4";
  31                 bias-disable;
  32         };
  33
  34         spi_pins: spi_pins {
  35                 mux {
  36                         pins = "gpio18", "gpio19", "gpio21";
  37                         function = "gsbi5";
  38                         drive-strength = <10>;
  39                         bias-none;
  40                 };
  41         };
  42
  43         mdio0_pins: mdio0_pins {
  44                 mux {
  45                         pins = "gpio0", "gpio1";
  46                         function = "mdio";
  47                         drive-strength = <8>;
  48                         bias-disable;
  49                 };
  50         };
  51
  52         rgmii0_pins: rgmii0_pins {
  53                 mux {
  54                         pins = "gpio2", "gpio66";
  55                         drive-strength = <8>;
  56                         bias-disable;
  57                 };
  58         };
  59 };
  60
  61 &gsbi2 {
  62         qcom,mode = <GSBI_PROT_I2C_UART>;
  63         status = "okay";
  64         uart2: serial@12490000 {
  65                 status = "okay";
  66         };
  67 };
  68
  69 &gsbi5 {
  70         qcom,mode = <GSBI_PROT_SPI>;
  71         status = "okay";
  72
  73         spi4: spi@1a280000 {
  74                 status = "okay";
  75                 spi-max-frequency = <50000000>;
  76
  77                 pinctrl-0 = <&spi_pins>;
  78                 pinctrl-names = "default";
  79
  80                 cs-gpios = <&qcom_pinmux 20 0>;
  81
  82                 m25p80@0 {
  83                         compatible = "s25fl256s1";
  84                         #address-cells = <1>;
  85                         #size-cells = <1>;
  86                         spi-max-frequency = <50000000>;
  87                         reg = <0>;
  88                         m25p,fast-read;
  89
  90                         partition@0 {
  91                                 label = "lowlevel_init";
  92                                 reg = <0x0 0x1b0000>;
  93                         };
  94
  95                         partition@1 {
  96                                 label = "u-boot";
  97                                 reg = <0x1b0000 0x80000>;
  98                         };
  99
 100                         partition@2 {
 101                                 label = "u-boot-env";
 102                                 reg = <0x230000 0x40000>;
 103                         };
 104
 105                         partition@3 {
 106                                 label = "caldata";
 107                                 reg = <0x270000 0x40000>;
 108                         };
 109
 110                         partition@4 {
 111                                 label = "firmware";
 112                                 reg = <0x2b0000 0x1d50000>;
 113                         };
 114                 };
 115         };
 116 };
 117
 118 &sata_phy {
 119         status = "okay";
 120 };
 121
 122 &sata {
 123         status = "okay";
 124 };
 125
 126 &usb3_0 {
 127         status = "okay";
 128 };
 129
 130 &usb3_1 {
 131         status = "okay";
 132 };
 133
 134 &pcie0 {
 135         status = "okay";
 136 };
 137
 138 &pcie1 {
 139         status = "okay";
 140 };
 141
 142 &pcie2 {
 143         status = "okay";
 144 };
 145
 146 &mdio0 {
 147         status = "okay";
 148
 149         pinctrl-0 = <&mdio0_pins>;
 150         pinctrl-names = "default";
 151
 152         phy0: ethernet-phy@0 {
 153                 reg = <0>;
 154                 qca,ar8327-initvals = <
 155                         0x00004 0x7600000   /* PAD0_MODE */
 156                         0x00008 0x1000000   /* PAD5_MODE */
 157                         0x0000c 0x80        /* PAD6_MODE */
 158                         0x000e4 0x6a545     /* MAC_POWER_SEL */
 159                         0x000e0 0xc74164de  /* SGMII_CTRL */
 160                         0x0007c 0x4e        /* PORT0_STATUS */
 161                         0x00094 0x4e        /* PORT6_STATUS */
 162                 >;
 163         };
 164
 165         phy4: ethernet-phy@4 {
 166                 reg = <4>;
 167         };
 168
 169         phy6: ethernet-phy@6 {
 170                 reg = <6>;
 171         };
 172
 173         phy7: ethernet-phy@7 {
 174                 reg = <7>;
 175         };
 176 };
 177
 178 &gmac0 {
 179         status = "okay";
 180         phy-mode = "rgmii";
 181         qcom,id = <0>;
 182         phy-handle = <&phy4>;
 183
 184         pinctrl-0 = <&rgmii0_pins>;
 185         pinctrl-names = "default";
 186 };
 187
 188 &gmac1 {
 189         status = "okay";
 190         phy-mode = "sgmii";
 191         qcom,id = <1>;
 192
 193         fixed-link {
 194                 speed = <1000>;
 195                 full-duplex;
 196         };
 197 };
 198
 199 &gmac2 {
 200         status = "okay";
 201         phy-mode = "sgmii";
 202         qcom,id = <2>;
 203         phy-handle = <&phy6>;
 204 };
 205
 206 &gmac3 {
 207         status = "okay";
 208         phy-mode = "sgmii";
 209         qcom,id = <3>;
 210         phy-handle = <&phy7>;
 211 };