1 From a0f6d7abe7f5da1a9b435eed89acace7cde4add6 Mon Sep 17 00:00:00 2001
2 From: Christian Marangi <ansuelsmth@gmail.com>
3 Date: Thu, 15 Sep 2022 02:39:11 +0200
4 Subject: [PATCH 6/9] clk: qcom: krait-cc: fix never enabled secondary mux
6 While never actually used as a pure mux, the secondary mux is used as a
7 safe selection for the primary mux to switch while the hfpll are
9 The secondary muxes were never enabled and this cause the krait-clk
10 drivers to silently ignore any set parent request without any error.
11 Enable the secondary mux to actually apply the parent and apply the
14 Fixes: bb5c4a85051e ("clk: qcom: Add Krait clock controller driver")
15 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
17 drivers/clk/qcom/krait-cc.c | 12 +++++++++++-
18 1 file changed, 11 insertions(+), 1 deletion(-)
20 --- a/drivers/clk/qcom/krait-cc.c
21 +++ b/drivers/clk/qcom/krait-cc.c
22 @@ -121,7 +121,7 @@ static struct clk *
23 krait_add_sec_mux(struct device *dev, int id, const char *s,
24 unsigned int offset, bool unique_aux)
28 struct krait_mux_clk *mux;
29 static struct clk_parent_data sec_mux_list[2] = {
30 { .name = "qsb", .fw_name = "qsb" },
31 @@ -180,6 +180,16 @@ krait_add_sec_mux(struct device *dev, in
35 + /* The secondary mux MUST be enabled or clk-krait silently
36 + * ignore any request.
37 + * Increase refcount for every CPU if it's the L2 secondary mux.
40 + for_each_possible_cpu(cpu)
41 + clk_prepare_enable(clk);
43 + clk_prepare_enable(clk);