target/linux/ixp4xx/patches-2.6.25/190-cambria_support.patch

   1 Index: linux-2.6.25.4/arch/arm/mach-ixp4xx/Kconfig
   2 ===================================================================
   3 --- linux-2.6.25.4.orig/arch/arm/mach-ixp4xx/Kconfig
   4 +++ linux-2.6.25.4/arch/arm/mach-ixp4xx/Kconfig
   5 @@ -25,6 +25,14 @@ config MACH_AVILA
   6           Avila Network Platform. For more information on this platform,
   7           see <file:Documentation/arm/IXP4xx>.
   8
   9 +config MACH_CAMBRIA
  10 +       bool "Cambria"
  11 +       select PCI
  12 +       help
  13 +         Say 'Y' here if you want your kernel to support the Gateworks
  14 +         Cambria series. For more information on this platform,
  15 +         see <file:Documentation/arm/IXP4xx>.
  16 +
  17  config MACH_LOFT
  18      bool "Loft"
  19      depends on MACH_AVILA
  20 @@ -200,7 +208,7 @@ config CPU_IXP46X
  21
  22  config CPU_IXP43X
  23         bool
  24 -       depends on MACH_KIXRP435
  25 +       depends on MACH_KIXRP435 || MACH_CAMBRIA
  26         default y
  27
  28  config MACH_GTWX5715
  29 Index: linux-2.6.25.4/arch/arm/mach-ixp4xx/Makefile
  30 ===================================================================
  31 --- linux-2.6.25.4.orig/arch/arm/mach-ixp4xx/Makefile
  32 +++ linux-2.6.25.4/arch/arm/mach-ixp4xx/Makefile
  33 @@ -7,6 +7,7 @@ obj-pci-n       :=
  34
  35  obj-pci-$(CONFIG_ARCH_IXDP4XX)         += ixdp425-pci.o
  36  obj-pci-$(CONFIG_MACH_AVILA)           += avila-pci.o
  37 +obj-pci-$(CONFIG_MACH_CAMBRIA)         += cambria-pci.o
  38  obj-pci-$(CONFIG_MACH_IXDPG425)                += ixdpg425-pci.o
  39  obj-pci-$(CONFIG_ARCH_ADI_COYOTE)      += coyote-pci.o
  40  obj-pci-$(CONFIG_MACH_GTWX5715)                += gtwx5715-pci.o
  41 @@ -28,6 +29,7 @@ obj-y += common.o
  42
  43  obj-$(CONFIG_ARCH_IXDP4XX)     += ixdp425-setup.o
  44  obj-$(CONFIG_MACH_AVILA)       += avila-setup.o
  45 +obj-$(CONFIG_MACH_CAMBRIA)     += cambria-setup.o
  46  obj-$(CONFIG_MACH_IXDPG425)    += coyote-setup.o
  47  obj-$(CONFIG_ARCH_ADI_COYOTE)  += coyote-setup.o
  48  obj-$(CONFIG_MACH_GTWX5715)    += gtwx5715-setup.o
  49 Index: linux-2.6.25.4/arch/arm/mach-ixp4xx/cambria-pci.c
  50 ===================================================================
  51 --- /dev/null
  52 +++ linux-2.6.25.4/arch/arm/mach-ixp4xx/cambria-pci.c
  53 @@ -0,0 +1,74 @@
  54 +/*
  55 + * arch/arch/mach-ixp4xx/cambria-pci.c
  56 + *
  57 + * PCI setup routines for Gateworks Cambria series
  58 + *
  59 + * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  60 + *
  61 + * based on coyote-pci.c:
  62 + *     Copyright (C) 2002 Jungo Software Technologies.
  63 + *     Copyright (C) 2003 MontaVista Softwrae, Inc.
  64 + *
  65 + * Maintainer: Imre Kaloz <kaloz@openwrt.org>
  66 + *
  67 + * This program is free software; you can redistribute it and/or modify
  68 + * it under the terms of the GNU General Public License version 2 as
  69 + * published by the Free Software Foundation.
  70 + *
  71 + */
  72 +
  73 +#include <linux/kernel.h>
  74 +#include <linux/pci.h>
  75 +#include <linux/init.h>
  76 +#include <linux/irq.h>
  77 +
  78 +#include <asm/mach-types.h>
  79 +#include <asm/hardware.h>
  80 +#include <asm/irq.h>
  81 +
  82 +#include <asm/mach/pci.h>
  83 +
  84 +extern void ixp4xx_pci_preinit(void);
  85 +extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
  86 +extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
  87 +
  88 +void __init cambria_pci_preinit(void)
  89 +{
  90 +       set_irq_type(IRQ_IXP4XX_GPIO11, IRQT_LOW);
  91 +       set_irq_type(IRQ_IXP4XX_GPIO10, IRQT_LOW);
  92 +       set_irq_type(IRQ_IXP4XX_GPIO9, IRQT_LOW);
  93 +       set_irq_type(IRQ_IXP4XX_GPIO8, IRQT_LOW);
  94 +
  95 +       ixp4xx_pci_preinit();
  96 +}
  97 +
  98 +static int __init cambria_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
  99 +{
 100 +       if (slot == 1)
 101 +               return IRQ_IXP4XX_GPIO11;
 102 +       else if (slot == 2)
 103 +               return IRQ_IXP4XX_GPIO10;
 104 +       else if (slot == 3)
 105 +               return IRQ_IXP4XX_GPIO9;
 106 +       else if (slot == 4)
 107 +               return IRQ_IXP4XX_GPIO8;
 108 +       else return -1;
 109 +}
 110 +
 111 +struct hw_pci cambria_pci __initdata = {
 112 +       .nr_controllers = 1,
 113 +       .preinit =        cambria_pci_preinit,
 114 +       .swizzle =        pci_std_swizzle,
 115 +       .setup =          ixp4xx_setup,
 116 +       .scan =           ixp4xx_scan_bus,
 117 +       .map_irq =        cambria_map_irq,
 118 +};
 119 +
 120 +int __init cambria_pci_init(void)
 121 +{
 122 +       if (machine_is_cambria())
 123 +               pci_common_init(&cambria_pci);
 124 +       return 0;
 125 +}
 126 +
 127 +subsys_initcall(cambria_pci_init);
 128 Index: linux-2.6.25.4/arch/arm/mach-ixp4xx/cambria-setup.c
 129 ===================================================================
 130 --- /dev/null
 131 +++ linux-2.6.25.4/arch/arm/mach-ixp4xx/cambria-setup.c
 132 @@ -0,0 +1,250 @@
 133 +/*
 134 + * arch/arm/mach-ixp4xx/cambria-setup.c
 135 + *
 136 + * Board setup for the Gateworks Cambria series
 137 + *
 138 + * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org>
 139 + *
 140 + * based on coyote-setup.c:
 141 + *      Copyright (C) 2003-2005 MontaVista Software, Inc.
 142 + *
 143 + * Author: Imre Kaloz <Kaloz@openwrt.org>
 144 + */
 145 +
 146 +#include <linux/kernel.h>
 147 +#include <linux/init.h>
 148 +#include <linux/device.h>
 149 +#include <linux/if_ether.h>
 150 +#include <linux/socket.h>
 151 +#include <linux/netdevice.h>
 152 +#include <linux/serial.h>
 153 +#include <linux/tty.h>
 154 +#include <linux/serial_8250.h>
 155 +#include <linux/slab.h>
 156 +#ifdef CONFIG_SENSORS_EEPROM
 157 +# include <linux/i2c.h>
 158 +# include <linux/eeprom.h>
 159 +#endif
 160 +
 161 +#include <linux/i2c-gpio.h>
 162 +#include <asm/types.h>
 163 +#include <asm/setup.h>
 164 +#include <asm/memory.h>
 165 +#include <asm/hardware.h>
 166 +#include <asm/irq.h>
 167 +#include <asm/mach-types.h>
 168 +#include <asm/mach/arch.h>
 169 +#include <asm/mach/flash.h>
 170 +
 171 +static struct flash_platform_data cambria_flash_data = {
 172 +       .map_name       = "cfi_probe",
 173 +       .width          = 2,
 174 +};
 175 +
 176 +static struct resource cambria_flash_resource = {
 177 +       .flags          = IORESOURCE_MEM,
 178 +};
 179 +
 180 +static struct platform_device cambria_flash = {
 181 +       .name           = "IXP4XX-Flash",
 182 +       .id             = 0,
 183 +       .dev            = {
 184 +               .platform_data = &cambria_flash_data,
 185 +       },
 186 +       .num_resources  = 1,
 187 +       .resource       = &cambria_flash_resource,
 188 +};
 189 +
 190 +static struct i2c_gpio_platform_data cambria_i2c_gpio_data = {
 191 +       .sda_pin        = 7,
 192 +       .scl_pin        = 6,
 193 +};
 194 +
 195 +static struct platform_device cambria_i2c_gpio = {
 196 +       .name           = "i2c-gpio",
 197 +       .id             = 0,
 198 +       .dev            = {
 199 +               .platform_data  = &cambria_i2c_gpio_data,
 200 +       },
 201 +};
 202 +
 203 +static struct resource cambria_uart_resource = {
 204 +       .start  = IXP4XX_UART1_BASE_PHYS,
 205 +       .end    = IXP4XX_UART1_BASE_PHYS + 0x0fff,
 206 +       .flags  = IORESOURCE_MEM,
 207 +};
 208 +
 209 +static struct plat_serial8250_port cambria_uart_data[] = {
 210 +       {
 211 +               .mapbase        = IXP4XX_UART1_BASE_PHYS,
 212 +               .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
 213 +               .irq            = IRQ_IXP4XX_UART1,
 214 +               .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 215 +               .iotype         = UPIO_MEM,
 216 +               .regshift       = 2,
 217 +               .uartclk        = IXP4XX_UART_XTAL,
 218 +       },
 219 +       { },
 220 +};
 221 +
 222 +static struct platform_device cambria_uart = {
 223 +       .name           = "serial8250",
 224 +       .id             = PLAT8250_DEV_PLATFORM,
 225 +       .dev                    = {
 226 +               .platform_data  = cambria_uart_data,
 227 +       },
 228 +       .num_resources  = 1,
 229 +       .resource       = &cambria_uart_resource,
 230 +};
 231 +
 232 +static struct resource cambria_pata_resources[] = {
 233 +       {
 234 +               .flags  = IORESOURCE_MEM
 235 +       },
 236 +       {
 237 +               .flags  = IORESOURCE_MEM,
 238 +       },
 239 +       {
 240 +               .name   = "intrq",
 241 +               .start  = IRQ_IXP4XX_GPIO12,
 242 +               .end    = IRQ_IXP4XX_GPIO12,
 243 +               .flags  = IORESOURCE_IRQ,
 244 +       },
 245 +};
 246 +
 247 +static struct ixp4xx_pata_data cambria_pata_data = {
 248 +       .cs0_bits       = 0xbfff3c03,
 249 +       .cs1_bits       = 0xbfff3c03,
 250 +};
 251 +
 252 +static struct platform_device cambria_pata = {
 253 +       .name                   = "pata_ixp4xx_cf",
 254 +       .id                     = 0,
 255 +       .dev.platform_data      = &cambria_pata_data,
 256 +       .num_resources          = ARRAY_SIZE(cambria_pata_resources),
 257 +       .resource               = cambria_pata_resources,
 258 +};
 259 +
 260 +static struct eth_plat_info cambria_plat_eth[] = {
 261 +        {
 262 +               .phy            = 2,
 263 +               .rxq            = 4,
 264 +               .txreadyq       = 21,
 265 +        }, {
 266 +               .phy            = 1,
 267 +               .rxq            = 2,
 268 +               .txreadyq       = 19,
 269 +       }
 270 +};
 271 +
 272 +static struct platform_device cambria_eth[] = {
 273 +        {
 274 +                .name                   = "ixp4xx_eth",
 275 +                .id                     = IXP4XX_ETH_NPEC,
 276 +                .dev.platform_data      = cambria_plat_eth,
 277 +        }, {
 278 +                .name                   = "ixp4xx_eth",
 279 +                .id                     = IXP4XX_ETH_NPEA,
 280 +                .dev.platform_data      = cambria_plat_eth + 1,
 281 +       }
 282 +};
 283 +
 284 +#ifdef CONFIG_LEDS_IXP4XX
 285 +static struct platform_device cambria_leds_pld = {
 286 +       .name           = "IXP4XX-PLD-LED",
 287 +       .id             = -1,
 288 +       .num_resources  = 0,
 289 +};
 290 +
 291 +static struct platform_device cambria_leds_mem = {
 292 +       .name           = "IXP4XX-MEM-LED",
 293 +       .id             = -1,
 294 +       .num_resources  = 0,
 295 +};
 296 +#endif
 297 +
 298 +static struct platform_device *cambria_devices[] __initdata = {
 299 +       &cambria_i2c_gpio,
 300 +       &cambria_flash,
 301 +       &cambria_uart,
 302 +#ifdef CONFIG_LEDS_IXP4XX
 303 +       &cambria_leds_pld,
 304 +       &cambria_leds_mem,
 305 +#endif
 306 +       &cambria_eth[0],
 307 +       &cambria_eth[1],
 308 +};
 309 +
 310 +#ifdef CONFIG_SENSORS_EEPROM
 311 +static int cambria_eeprom_do(struct notifier_block *self, unsigned long event, void *t)
 312 +{
 313 +       struct eeprom_data *data = t;
 314 +       struct sockaddr address;
 315 +       struct net_device * netdev;
 316 +
 317 +       char macs[12];
 318 +
 319 +       /* The MACs are the first 12 bytes in the eeprom at address 0x51 */
 320 +       if (event == EEPROM_REGISTER && data->client.addr == 0x51) {
 321 +               data->attr->read(&data->client.dev.kobj, data->attr, macs, 0, 12);
 322 +               /* eth0 */
 323 +               memcpy(address.sa_data, macs, ETH_ALEN);
 324 +               memcpy(&cambria_plat_eth[0].hwaddr, macs, ETH_ALEN);
 325 +               if ( (netdev = dev_get_by_name(&init_net, "eth0")) )
 326 +                       netdev->set_mac_address(netdev, &address);
 327 +
 328 +               /* eth1 */
 329 +               memcpy(address.sa_data, macs + ETH_ALEN, ETH_ALEN);
 330 +               memcpy(&cambria_plat_eth[1].hwaddr, macs + ETH_ALEN, ETH_ALEN);
 331 +               if ( (netdev = dev_get_by_name(&init_net, "eth1")) )
 332 +                       netdev->set_mac_address(netdev, &address);
 333 +       }
 334 +
 335 +       return NOTIFY_DONE;
 336 +}
 337 +
 338 +static struct notifier_block cambria_eeprom_notifier = {
 339 +       .notifier_call = cambria_eeprom_do
 340 +};
 341 +#endif
 342 +
 343 +static void __init cambria_init(void)
 344 +{
 345 +       ixp4xx_sys_init();
 346 +
 347 +#ifdef CONFIG_SENSORS_EEPROM
 348 +       register_eeprom_notifier(&cambria_eeprom_notifier);
 349 +#endif
 350 +
 351 +       cambria_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
 352 +       cambria_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
 353 +
 354 +       *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
 355 +       *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
 356 +
 357 +       platform_add_devices(cambria_devices, ARRAY_SIZE(cambria_devices));
 358 +
 359 +       cambria_pata_resources[0].start = 0x53e00000;
 360 +       cambria_pata_resources[0].end = 0x53e3ffff;
 361 +
 362 +       cambria_pata_resources[1].start = 0x53e40000;
 363 +       cambria_pata_resources[1].end = 0x53e7ffff;
 364 +
 365 +       cambria_pata_data.cs0_cfg = IXP4XX_EXP_CS3;
 366 +       cambria_pata_data.cs1_cfg = IXP4XX_EXP_CS3;
 367 +
 368 +       platform_device_register(&cambria_pata);
 369 +}
 370 +
 371 +#ifdef CONFIG_MACH_CAMBRIA
 372 +MACHINE_START(CAMBRIA, "Gateworks Cambria series")
 373 +       /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
 374 +       .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
 375 +       .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
 376 +       .map_io         = ixp4xx_map_io,
 377 +       .init_irq       = ixp4xx_init_irq,
 378 +       .timer          = &ixp4xx_timer,
 379 +       .boot_params    = 0x0100,
 380 +       .init_machine   = cambria_init,
 381 +MACHINE_END
 382 +#endif
 383 Index: linux-2.6.25.4/include/asm-arm/arch-ixp4xx/hardware.h
 384 ===================================================================
 385 --- linux-2.6.25.4.orig/include/asm-arm/arch-ixp4xx/hardware.h
 386 +++ linux-2.6.25.4/include/asm-arm/arch-ixp4xx/hardware.h
 387 @@ -18,7 +18,7 @@
 388  #define __ASM_ARCH_HARDWARE_H__
 389
 390  #define PCIBIOS_MIN_IO         0x00001000
 391 -#define PCIBIOS_MIN_MEM                (cpu_is_ixp43x() ? 0x40000000 : 0x48000000)
 392 +#define PCIBIOS_MIN_MEM                (cpu_is_ixp43x() ? 0x48000000 : 0x48000000)
 393
 394  /*
 395   * We override the standard dma-mask routines for bouncing.