target/linux/lantiq/files/arch/mips/boot/dts/TDW89X0.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   5
   6 / {
   7         compatible = "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
   8
   9         chosen {
  10                 bootargs = "console=ttyLTQ0,115200";
  11         };
  12
  13         aliases {
  14                 /* the power led can't be controlled, use the wps led instead */
  15                 led-boot = &wps;
  16                 led-failsafe = &wps;
  17
  18                 led-dsl = &dsl;
  19                 led-internet = &internet;
  20                 led-wifi = &wifi;
  21                 led-usb = &led_usb0;
  22                 led-usb2 = &led_usb2;
  23         };
  24
  25         memory@0 {
  26                 device_type = "memory";
  27                 reg = <0x0 0x4000000>;
  28         };
  29
  30         gpio-keys-polled {
  31                 compatible = "gpio-keys-polled";
  32                 #address-cells = <1>;
  33                 #size-cells = <0>;
  34                 poll-interval = <100>;
  35                 reset {
  36                         label = "reset";
  37                         gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
  38                         linux,code = <KEY_RESTART>;
  39                 };
  40
  41                 wifi {
  42                         label = "wifi";
  43                         gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
  44                         linux,code = <KEY_RFKILL>;
  45                         linux,input-type = <EV_SW>;
  46                 };
  47
  48                 wps {
  49                         label = "wps";
  50                         gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
  51                         linux,code = <KEY_WPS_BUTTON>;
  52                 };
  53         };
  54
  55         gpio-leds {
  56                 compatible = "gpio-leds";
  57                 /*
  58                         power is not controllable via gpio
  59                 */
  60                 dsl: dsl {
  61                         label = "tdw89x0:green:dsl";
  62                         gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
  63                 };
  64                 internet: internet {
  65                         label = "tdw89x0:green:internet";
  66                         gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
  67                 };
  68
  69                 led_usb0: usb0 {
  70                         label = "tdw89x0:green:usb";
  71                         gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
  72                 };
  73                 led_usb2: usb2 {
  74                         label = "tdw89x0:green:usb2";
  75                         gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
  76                 };
  77                 wps: wps {
  78                         label = "tdw89x0:green:wps";
  79                         gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
  80                 };
  81         };
  82
  83         wifi-leds {
  84                 compatible = "gpio-leds";
  85
  86                 wifi: wifi {
  87                         label = "tdw89x0:green:wifi";
  88                         gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
  89                         linux,default-trigger = "phy0tpt";
  90                 };
  91         };
  92
  93
  94         usb_vbus: regulator-usb-vbus {
  95                 compatible = "regulator-fixed";
  96
  97                 regulator-name = "USB_VBUS";
  98
  99                 regulator-min-microvolt = <5000000>;
 100                 regulator-max-microvolt = <5000000>;
 101
 102                 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
 103                 enable-active-high;
 104         };
 105 };
 106
 107 &eth0 {
 108         lan: interface@0 {
 109                 compatible = "lantiq,xrx200-pdi";
 110                 #address-cells = <1>;
 111                 #size-cells = <0>;
 112                 reg = <0>;
 113                 mtd-mac-address = <&ath9k_cal 0xf100>;
 114                 lantiq,switch;
 115
 116                 ethernet@0 {
 117                         compatible = "lantiq,xrx200-pdi-port";
 118                         reg = <0>;
 119                         phy-mode = "rgmii";
 120                         phy-handle = <&phy0>;
 121                         // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 122                 };
 123                 ethernet@5 {
 124                         compatible = "lantiq,xrx200-pdi-port";
 125                         reg = <5>;
 126                         phy-mode = "rgmii";
 127                         phy-handle = <&phy5>;
 128                 };
 129                 ethernet@2 {
 130                         compatible = "lantiq,xrx200-pdi-port";
 131                         reg = <2>;
 132                         phy-mode = "gmii";
 133                         phy-handle = <&phy11>;
 134                 };
 135                 ethernet@3 {
 136                         compatible = "lantiq,xrx200-pdi-port";
 137                         reg = <4>;
 138                         phy-mode = "gmii";
 139                         phy-handle = <&phy13>;
 140                 };
 141         };
 142
 143         mdio@0 {
 144                 #address-cells = <1>;
 145                 #size-cells = <0>;
 146                 compatible = "lantiq,xrx200-mdio";
 147                 reg = <0>;
 148
 149                 phy0: ethernet-phy@0 {
 150                         reg = <0x0>;
 151                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 152                 };
 153                 phy5: ethernet-phy@5 {
 154                         reg = <0x5>;
 155                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 156                 };
 157                 phy11: ethernet-phy@11 {
 158                         reg = <0x11>;
 159                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 160                 };
 161                 phy13: ethernet-phy@13 {
 162                         reg = <0x13>;
 163                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 164                 };
 165         };
 166 };
 167
 168 &gphy0 {
 169         lantiq,gphy-mode = <GPHY_MODE_GE>;
 170 };
 171
 172 &gphy1 {
 173         lantiq,gphy-mode = <GPHY_MODE_GE>;
 174 };
 175
 176 &gpio {
 177         pinctrl-names = "default";
 178         pinctrl-0 = <&state_default>;
 179
 180         state_default: pinmux {
 181                 mdio {
 182                         lantiq,groups = "mdio";
 183                         lantiq,function = "mdio";
 184                 };
 185                 gphy-leds {
 186                         lantiq,groups = "gphy0 led1", "gphy1 led1";
 187                         lantiq,function = "gphy";
 188                         lantiq,pull = <2>;
 189                         lantiq,open-drain = <0>;
 190                         lantiq,output = <1>;
 191                 };
 192                 phy-rst {
 193                         lantiq,pins = "io42";
 194                         lantiq,pull = <0>;
 195                         lantiq,open-drain = <0>;
 196                         lantiq,output = <1>;
 197                 };
 198                 pcie-rst {
 199                         lantiq,pins = "io38";
 200                         lantiq,pull = <0>;
 201                         lantiq,output = <1>;
 202                 };
 203         };
 204         pins_spi_default: pins_spi_default {
 205                 spi_in {
 206                         lantiq,groups = "spi_di";
 207                         lantiq,function = "spi";
 208                 };
 209                 spi_out {
 210                         lantiq,groups = "spi_do", "spi_clk",
 211                                 "spi_cs4";
 212                         lantiq,function = "spi";
 213                         lantiq,output = <1>;
 214                 };
 215         };
 216 };
 217
 218 &pcie0 {
 219         pcie@0 {
 220                 reg = <0 0 0 0 0>;
 221                 #interrupt-cells = <1>;
 222                 #size-cells = <2>;
 223                 #address-cells = <3>;
 224                 device_type = "pci";
 225
 226                 ath9k: wifi@168c,002e {
 227                         compatible = "pci168c,002e";
 228                         reg = <0 0 0 0 0>;
 229                         #gpio-cells = <2>;
 230                         gpio-controller;
 231                         qca,no-eeprom;
 232                         qca,disable-5ghz;
 233                         mtd-mac-address = <&ath9k_cal 0xf100>;
 234                         mtd-mac-address-increment = <2>;
 235                 };
 236         };
 237 };
 238
 239 &spi {
 240         status = "okay";
 241
 242         pinctrl-names = "default";
 243         pinctrl-0 = <&pins_spi_default>;
 244
 245         m25p80@4 {
 246                 #address-cells = <1>;
 247                 #size-cells = <1>;
 248                 compatible = "jedec,spi-nor";
 249                 reg = <4 0>;
 250                 spi-max-frequency = <33250000>;
 251                 m25p,fast-read;
 252
 253                 partitions {
 254                         compatible = "fixed-partitions";
 255                         #address-cells = <1>;
 256                         #size-cells = <1>;
 257
 258                         partition@0 {
 259                                 reg = <0x0 0x20000>;
 260                                 label = "u-boot";
 261                                 read-only;
 262                         };
 263
 264                         partition@20000 {
 265                                 reg = <0x20000 0x7a0000>;
 266                                 label = "firmware";
 267                         };
 268
 269                         partition@7c0000 {
 270                                 reg = <0x7c0000 0x10000>;
 271                                 label = "config";
 272                                 read-only;
 273                         };
 274
 275                         ath9k_cal: partition@7d0000 {
 276                                 reg = <0x7d0000 0x30000>;
 277                                 label = "boardconfig";
 278                                 read-only;
 279                         };
 280                 };
 281         };
 282 };
 283
 284 &usb_phy0 {
 285         status = "okay";
 286 };
 287
 288 &usb_phy1 {
 289         status = "okay";
 290 };
 291
 292 &usb0 {
 293         status = "okay";
 294         vbus-supply = <&usb_vbus>;
 295 };
 296
 297 &usb1 {
 298         status = "okay";
 299         vbus-supply = <&usb_vbus>;
 300 };