target/linux/lantiq/files/arch/mips/boot/dts/VR200.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   5
   6 / {
   7         memory@0 {
   8                 device_type = "memory";
   9                 reg = <0x0 0x7f00000>;
  10         };
  11
  12         usb_vbus: regulator-usb-vbus {
  13                 compatible = "regulator-fixed";
  14
  15                 regulator-name = "USB_VBUS";
  16
  17                 regulator-min-microvolt = <5000000>;
  18                 regulator-max-microvolt = <5000000>;
  19
  20                 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
  21                 enable-active-high;
  22         };
  23 };
  24
  25 &eth0 {
  26         pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
  27         pinctrl-names = "default";
  28
  29         lan: interface@0 {
  30                 compatible = "lantiq,xrx200-pdi";
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33                 reg = <0>;
  34                 mtd-mac-address = <&romfile 0xf100>;
  35                 lantiq,switch;
  36
  37                 ethernet@0 {
  38                         compatible = "lantiq,xrx200-pdi-port";
  39                         reg = <0>;
  40                         phy-mode = "rgmii";
  41                         phy-handle = <&phy0>;
  42                         // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
  43                 };
  44                 ethernet@5 {
  45                         compatible = "lantiq,xrx200-pdi-port";
  46                         reg = <5>;
  47                         phy-mode = "rgmii";
  48                         phy-handle = <&phy5>;
  49                 };
  50                 ethernet@2 {
  51                         compatible = "lantiq,xrx200-pdi-port";
  52                         reg = <2>;
  53                         phy-mode = "gmii";
  54                         phy-handle = <&phy11>;
  55                 };
  56                 ethernet@3 {
  57                         compatible = "lantiq,xrx200-pdi-port";
  58                         reg = <4>;
  59                         phy-mode = "gmii";
  60                         phy-handle = <&phy13>;
  61                 };
  62         };
  63
  64         mdio {
  65                 #address-cells = <1>;
  66                 #size-cells = <0>;
  67                 compatible = "lantiq,xrx200-mdio";
  68
  69                 phy0: ethernet-phy@0 {
  70                         reg = <0x0>;
  71                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  72                 };
  73                 phy5: ethernet-phy@5 {
  74                         reg = <0x5>;
  75                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  76                 };
  77                 phy11: ethernet-phy@11 {
  78                         reg = <0x11>;
  79                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  80                 };
  81                 phy13: ethernet-phy@13 {
  82                         reg = <0x13>;
  83                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  84                 };
  85         };
  86 };
  87
  88 &gphy0 {
  89         lantiq,gphy-mode = <GPHY_MODE_GE>;
  90 };
  91
  92 &gphy1 {
  93         lantiq,gphy-mode = <GPHY_MODE_GE>;
  94 };
  95
  96 &gpio {
  97         pinctrl-names = "default";
  98         pinctrl-0 = <&state_default>;
  99
 100         state_default: pinmux {
 101                 phy-rst {
 102                         lantiq,pins = "io42";
 103                         lantiq,pull = <0>;
 104                         lantiq,open-drain = <0>;
 105                         lantiq,output = <1>;
 106                 };
 107                 pcie-rst {
 108                         lantiq,pins = "io38";
 109                         lantiq,pull = <0>;
 110                         lantiq,output = <1>;
 111                 };
 112         };
 113 };
 114
 115 &pci0 {
 116         status = "okay";
 117         gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
 118 };
 119
 120 &spi {
 121         status = "okay";
 122
 123         flash@4 {
 124                 compatible = "jedec,spi-nor";
 125                 reg = <4>;
 126                 spi-max-frequency = <33250000>;
 127                 m25p,fast-read;
 128
 129                 partitions {
 130                         compatible = "fixed-partitions";
 131                         #address-cells = <1>;
 132                         #size-cells = <1>;
 133
 134                         partition@0 {
 135                                 reg = <0x0 0x20000>;
 136                                 label = "u-boot";
 137                                 read-only;
 138                         };
 139
 140                         partition@20000 {
 141                                 reg = <0x20000 0xf90000>;
 142                                 label = "firmware";
 143                         };
 144
 145                         partition@fb0000 {
 146                                 reg = <0xfb0000 0x10000>;
 147                                 label = "radioDECT";
 148                                 read-only;
 149                         };
 150
 151                         partition@fc0000 {
 152                                 reg = <0xfc0000 0x10000>;
 153                                 label = "config";
 154                                 read-only;
 155                         };
 156
 157                         romfile: partition@fd0000 {
 158                                 reg = <0xfd0000 0x10000>;
 159                                 label = "romfile";
 160                                 read-only;
 161                         };
 162
 163                         partition@fe0000 {
 164                                 reg = <0xfe0000 0x10000>;
 165                                 label = "rom";
 166                                 read-only;
 167                         };
 168
 169                         partition@ff0000 {
 170                                 reg = <0xff0000 0x10000>;
 171                                 label = "radio";
 172                                 read-only;
 173                         };
 174                 };
 175         };
 176 };
 177
 178 &usb_phy0 {
 179         status = "okay";
 180 };
 181
 182 &usb_phy1 {
 183         status = "okay";
 184 };
 185
 186 &usb0 {
 187         status = "okay";
 188         vbus-supply = <&usb_vbus>;
 189 };
 190
 191 &usb1 {
 192         status = "okay";
 193         vbus-supply = <&usb_vbus>;
 194 };