target/linux/lantiq/files/arch/mips/boot/dts/lantiq/falcon.dtsi

   1 /dts-v1/;
   2
   3 / {
   4         #address-cells = <1>;
   5         #size-cells = <1>;
   6         compatible = "lantiq,falcon";
   7
   8         cpus {
   9                 #address-cells = <1>;
  10                 #size-cells = <0>;
  11
  12                 cpu@0 {
  13                         compatible = "mips,mips34kc";
  14                         reg = <0>;
  15                 };
  16         };
  17
  18         aliases {
  19                 serial0 = &serial0;
  20                 serial1 = &serial1;
  21                 gpio0 = &gpio0;
  22                 gpio1 = &gpio1;
  23                 gpio2 = &gpio2;
  24                 gpio3 = &gpio3;
  25                 gpio4 = &gpio4;
  26         };
  27
  28         chosen {
  29                 stdout-path = "serial0:115200n8";
  30         };
  31
  32         ebu_cs0: localbus@10000000 {
  33                 #address-cells = <1>;
  34                 #size-cells = <1>;
  35                 compatible = "lantiq,localbus", "simple-bus";
  36                 reg = <0x10000000 0x4000000>;
  37                 ranges = <0x0 0x10000000 0x4000000>;
  38         };
  39         ebu_cs1: localbus@14000000 {
  40                 #address-cells = <1>;
  41                 #size-cells = <1>;
  42                 compatible = "lantiq,localbus", "simple-bus";
  43                 reg = <0x14000000 0x4000000>;
  44                 ranges = <0x0 0x14000000 0x4000000>;
  45         };
  46
  47         ebu@18000000 {
  48                 compatible = "lantiq,ebu-falcon";
  49                 reg = <0x18000000 0x100>;
  50         };
  51
  52         sbs2@1d000000 {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 compatible = "lantiq,sysb2", "simple-bus";
  56                 reg = <0x1d000000 0x1000000>;
  57                 ranges = <0x0 0x1d000000 0x1000000>;
  58
  59                 clock_sysgpe: clock-controller@700000 {
  60                         compatible = "lantiq,sysgpe-falcon";
  61                         reg = <0x700000 0x100>;
  62                         #clock-cells = <1>;
  63                 };
  64
  65                 mps@4000 {
  66                         compatible = "lantiq,mps-falcon", "lantiq,mps-xrx100";
  67                         reg = <0x4000 0x1000>;
  68                         interrupt-parent = <&icu0>;
  69                         interrupts = <154 155>;
  70                         lantiq,mbx = <&mpsmbx>;
  71                 };
  72
  73                 gpio0: gpio@810000 {
  74                         compatible = "lantiq,falcon-gpio";
  75                         gpio-controller;
  76                         #gpio-cells = <2>;
  77                         interrupt-controller;
  78                         #interrupt-cells = <2>;
  79                         interrupt-parent = <&icu0>;
  80                         interrupts = <44>;
  81                         reg = <0x810000 0x80>;
  82                         clocks = <&clock_syseth 16>;
  83                 };
  84
  85                 gpio2: gpio@810100 {
  86                         compatible = "lantiq,falcon-gpio";
  87                         gpio-controller;
  88                         #gpio-cells = <2>;
  89                         interrupt-controller;
  90                         #interrupt-cells = <2>;
  91                         interrupt-parent = <&icu0>;
  92                         interrupts = <46>;
  93                         reg = <0x810100 0x80>;
  94                         clocks = <&clock_syseth 17>;
  95                 };
  96
  97                 clock_syseth: clock-controller@b00000 {
  98                         compatible = "lantiq,syseth-falcon";
  99                         reg = <0xb00000 0x100>;
 100                         #clock-cells = <1>;
 101                 };
 102
 103                 pad@b01000 {
 104                         compatible = "lantiq,pad-falcon";
 105                         reg = <0xb01000 0x100>;
 106                         lantiq,bank = <0>;
 107                         clocks = <&clock_syseth 20>;
 108                 };
 109
 110                 pad@b02000 {
 111                         compatible = "lantiq,pad-falcon";
 112                         reg = <0xb02000 0x100>;
 113                         lantiq,bank = <2>;
 114                         clocks = <&clock_syseth 21>;
 115                 };
 116         };
 117
 118         fpi@1e000000 {
 119                 #address-cells = <1>;
 120                 #size-cells = <1>;
 121                 compatible = "lantiq,fpi", "simple-bus";
 122                 reg = <0x1e000000 0x1000000>;
 123                 ranges = <0x0 0x1e000000 0x1000000>;
 124
 125                 serial1: serial@100b00 {
 126                         status = "disabled";
 127                         compatible = "lantiq,asc";
 128                         reg = <0x100b00 0x100>;
 129                         interrupt-parent = <&icu0>;
 130                         interrupts = <112 113 114>;
 131                         line = <1>;
 132                         pinctrl-names = "default";
 133                         pinctrl-0 = <&asc1_pins>;
 134                         clocks = <&clock_sys1 11>;
 135                 };
 136
 137                 serial0: serial@100c00 {
 138                         compatible = "lantiq,asc";
 139                         reg = <0x100c00 0x100>;
 140                         interrupt-parent = <&icu0>;
 141                         interrupts = <104 105 106>;
 142                         line = <0>;
 143                         pinctrl-names = "default";
 144                         pinctrl-0 = <&asc0_pins>;
 145                         clocks = <&clock_sys1 12>;
 146                 };
 147
 148                 spi: spi@100d00 {
 149                         status = "disabled";
 150                         compatible = "lantiq,falcon-spi", "lantiq,xrx100-spi", "lantiq,spi-lantiq-ssc";
 151                         interrupts = <22 23 24 25>;
 152                         interrupt-names = "spi_tx", "spi_rx", "spi_err", "spi_frm";
 153                         #address-cells = <1>;
 154                         #size-cells = <0>;
 155                         reg = <0x100d00 0x100>;
 156                         interrupt-parent = <&icu0>;
 157                         clocks = <&clock_sys1 13>;
 158                         base_cs = <1>;
 159                         num_cs = <2>;
 160                 };
 161
 162                 gptc@100e00 {
 163                         compatible = "lantiq,gptc-falcon";
 164                         reg = <0x100e00 0x100>;
 165                 };
 166
 167                 i2c: i2c@200000 {
 168                         status = "disabled";
 169                         #address-cells = <1>;
 170                         #size-cells = <0>;
 171                         compatible = "lantiq,lantiq-i2c";
 172                         reg = <0x200000 0x10000>;
 173                         interrupt-parent = <&icu0>;
 174                         interrupts = <18 19 20 21>;
 175                         gpios = <&gpio1 7 0 &gpio1 8 0>;
 176                         pinctrl-names = "default";
 177                         pinctrl-0 = <&i2c_pins>;
 178                         clocks = <&clock_sys1 14>;
 179                 };
 180
 181                 gpio1: gpio@800100 {
 182                         compatible = "lantiq,falcon-gpio";
 183                         gpio-controller;
 184                         #gpio-cells = <2>;
 185                         interrupt-controller;
 186                         #interrupt-cells = <2>;
 187                         interrupt-parent = <&icu0>;
 188                         interrupts = <45>;
 189                         reg = <0x800100 0x100>;
 190                         clocks = <&clock_sys1 16>;
 191                 };
 192
 193                 gpio3: gpio@800200 {
 194                         compatible = "lantiq,falcon-gpio";
 195                         gpio-controller;
 196                         #gpio-cells = <2>;
 197                         interrupt-controller;
 198                         #interrupt-cells = <2>;
 199                         interrupt-parent = <&icu0>;
 200                         interrupts = <47>;
 201                         reg = <0x800200 0x100>;
 202                         clocks = <&clock_sys1 17>;
 203                 };
 204
 205                 gpio4: gpio@800300 {
 206                         compatible = "lantiq,falcon-gpio";
 207                         gpio-controller;
 208                         #gpio-cells = <2>;
 209                         interrupt-controller;
 210                         #interrupt-cells = <2>;
 211                         interrupt-parent = <&icu0>;
 212                         interrupts = <48>;
 213                         reg = <0x800300 0x100>;
 214                         clocks = <&clock_sys1 18>;
 215                 };
 216
 217                 pad@800400 {
 218                         compatible = "lantiq,pad-falcon";
 219                         reg = <0x800400 0x100>;
 220                         lantiq,bank = <1>;
 221                         clocks = <&clock_sys1 20>;
 222                 };
 223
 224                 pad@800500 {
 225                         compatible = "lantiq,pad-falcon";
 226                         reg = <0x800500 0x100>;
 227                         lantiq,bank = <3>;
 228                         clocks = <&clock_sys1 21>;
 229                 };
 230
 231                 pad@800600 {
 232                         compatible = "lantiq,pad-falcon";
 233                         reg = <0x800600 0x100>;
 234                         lantiq,bank = <4>;
 235                         clocks = <&clock_sys1 22>;
 236                 };
 237
 238                 status@802000 {
 239                         compatible = "lantiq,status-falcon";
 240                         reg = <0x802000 0x80>;
 241                 };
 242
 243                 clock_sys1: clock-controller@f00000 {
 244                         compatible = "lantiq,sys1-falcon";
 245                         reg = <0xf00000 0x100>;
 246                         #clock-cells = <1>;
 247                 };
 248         };
 249
 250         sbs0@1f000000 {
 251                 #address-cells = <1>;
 252                 #size-cells = <1>;
 253                 compatible = "simple-bus";
 254                 reg = <0x1f000000 0x400000>;
 255                 ranges = <0x0 0x1f000000 0x400000>;
 256
 257                 mpsmbx: mpsmbx@200000 {
 258                         reg = <0x200000 0x200>;
 259                 };
 260         };
 261
 262         biu@1f800000 {
 263                 #address-cells = <1>;
 264                 #size-cells = <1>;
 265                 compatible = "lantiq,biu", "simple-bus";
 266                 reg = <0x1f800000 0x800000>;
 267                 ranges = <0x0 0x1f800000 0x800000>;
 268
 269                 icu0: icu@80200 {
 270                         #interrupt-cells = <1>;
 271                         interrupt-controller;
 272                         compatible = "lantiq,icu";
 273                         /* TODO: Number of ICUs isn't known */
 274                         reg = <0x80200 0xc8>;
 275                 };
 276
 277                 watchdog@803f0 {
 278                         compatible = "lantiq,wdt";
 279                         reg = <0x803f0 0x10>;
 280                 };
 281         };
 282
 283         pinctrl {
 284                 compatible = "lantiq,pinctrl-falcon";
 285                 pinctrl-names = "default";
 286                 pinctrl-0 = <&state_default>;
 287
 288                 state_default: pinctrl0 {
 289                         /*ntr {
 290                                 lantiq,groups = "ntr8k";
 291                                 lantiq,function = "ntr";
 292                         };*/
 293                         hrst {
 294                                 lantiq,groups = "hrst";
 295                                 lantiq,function = "rst";
 296                         };
 297                 };
 298
 299                 asc0_pins: asc0 {
 300                         asc0 {
 301                                 lantiq,groups = "asc0";
 302                                 lantiq,function = "asc";
 303                         };
 304                 };
 305                 asc1_pins: asc1 {
 306                         asc1 {
 307                                 lantiq,groups = "asc1";
 308                                 lantiq,function = "asc";
 309                         };
 310                 };
 311                 i2c_pins: i2c_pins {
 312                         i2c_pins {
 313                                 lantiq,groups = "i2c";
 314                                 lantiq,function = "i2c";
 315                         };
 316                 };
 317                 bootled_pins: bootled {
 318                         bootled {
 319                                 lantiq,groups = "bootled";
 320                                 lantiq,function = "led";
 321                         };
 322                 };
 323                 ntr_ntr8k: ntr8k {
 324                         ntr8k {
 325                                 lantiq,groups = "ntr8k";
 326                                 lantiq,function = "ntr";
 327                         };
 328                 };
 329                 ntr_pps: pps {
 330                         pps {
 331                                 lantiq,groups = "pps";
 332                                 lantiq,function = "ntr";
 333                         };
 334                 };
 335                 ntr_gpio: gpio {
 336                         gpio {
 337                                 lantiq,pins = "io5";
 338                                 lantiq,mux = <1>;
 339                                 lantiq,output = <0>;
 340                         };
 341                 };
 342                 slic_pins: slic {
 343                         slic {
 344                                 lantiq,groups = "slic";
 345                                 lantiq,function = "slic";
 346                         };
 347                 };
 348         };
 349
 350         pinselect-ntr {
 351                 compatible = "lantiq,onu-ntr","lantiq,pinselect-ntr";
 352                 pinctrl-names = "ntr8k", "pps", "gpio";
 353                 pinctrl-0 = <&ntr_ntr8k>;
 354                 pinctrl-1 = <&ntr_pps>;
 355                 pinctrl-2 = <&ntr_gpio>;
 356         };
 357
 358         pinselect-asc1 {
 359                 compatible = "lantiq,onu-asc1","lantiq,pinselect-asc1";
 360                 pinctrl-names = "default", "asc1";
 361                 pinctrl-0 = <&slic_pins>;
 362                 pinctrl-1 = <&asc1_pins>;
 363         };
 364
 365 };