ath79: update WA/XC devices UBNT_VERSION to 8.7.4
[openwrt/staging/wigyori.git] / target / linux / lantiq / files / arch / mips / boot / dts / lantiq / vr9_avm_fritz7362sl.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "vr9_avm_fritz736x.dtsi"
4
5 / {
6 compatible = "avm,fritz7362sl", "avm,fritz736x", "lantiq,xway", "lantiq,vr9";
7 model = "AVM FRITZ!Box 7362 SL";
8 };
9
10 &gpio {
11 pinctrl-names = "default";
12 pinctrl-0 = <&state_default>;
13
14 state_default: pinmux {
15 pcie-rst {
16 lantiq,pins = "io21";
17 lantiq,pull = <0>;
18 lantiq,output = <1>;
19 };
20
21 phy-rst {
22 lantiq,pins = "io44", "io45";
23 lantiq,pull = <0>;
24 lantiq,open-drain;
25 lantiq,output = <1>;
26 };
27 };
28
29 };
30
31 &spi {
32 status = "okay";
33
34 flash@4 {
35 #address-cells = <1>;
36 #size-cells = <1>;
37 compatible = "jedec,spi-nor";
38 reg = <4>;
39 spi-max-frequency = <1000000>;
40
41 partitions {
42 compatible = "fixed-partitions";
43 #address-cells = <1>;
44 #size-cells = <1>;
45
46 urlader: partition@0 {
47 reg = <0x0 0x40000>;
48 label = "urlader";
49 read-only;
50
51 nvmem-layout {
52 compatible = "fixed-layout";
53 #address-cells = <1>;
54 #size-cells = <1>;
55
56 macaddr_urlader_a91: macaddr@a91 {
57 compatible = "mac-base";
58 reg = <0xa91 0x6>;
59 #nvmem-cell-cells = <1>;
60 };
61 };
62 };
63
64 partition@40000 {
65 reg = <0x40000 0x60000>;
66 label = "tffs (1)";
67 read-only;
68 };
69
70 partition@A0000 {
71 reg = <0xA0000 0x60000>;
72 label = "tffs (2)";
73 read-only;
74 };
75 };
76 };
77 };
78
79 &localbus {
80 flash1: flash@1 {
81 compatible = "lantiq,nand-xway";
82 lantiq,cs1 = <1>;
83 bank-width = <1>;
84 reg = <1 0x0 0x2000000>;
85
86 pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
87 pinctrl-names = "default";
88
89 nand-ecc-engine = <&flash1>;
90
91 partitions {
92 compatible = "fixed-partitions";
93 #address-cells = <1>;
94 #size-cells = <1>;
95
96 partition@0 {
97 label = "kernel";
98 reg = <0x0 0x400000>;
99 };
100
101 partition@400000 {
102 label = "ubi";
103 reg = <0x400000 0x7c00000>;
104 };
105 };
106 };
107 };
108
109 &pcie0 {
110 gpio-reset = <&gpio 21 GPIO_ACTIVE_LOW>;
111
112 pcie@0 {
113 #size-cells = <1>;
114 #address-cells = <2>;
115 };
116 };
117
118 &eth0 {
119 nvmem-cells = <&macaddr_urlader_a91 (-2)>;
120 nvmem-cell-names = "mac-address";
121 };
122
123 &phy0 {
124 reset-gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
125 };
126
127 &phy1 {
128 reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
129 };