target/linux/lantiq/patches-3.2/0071-MIPS-lantiq-stp-fix-for-ase-add-get-clock-disabled.patch

   1 From d8e3038c520ea6c7619d3f5339c47ca0c2aa7fe3 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Wed, 11 Apr 2012 18:47:53 +0200
   4 Subject: [PATCH 71/73] MIPS: lantiq: stp, fix for ase, add get, clock
   5  disabled
   6
   7 Lantiq serial-to-parallel hardware gpio module
   8 Added gpio pins as used for amazon se (ase)
   9 Added get to enable reporting of gpio status
  10 Changed to use software update, as hw clock was not running on ase. Clock
  11 really only needed if hw flashing was implemented.
  12
  13 Signed-off-by: Conor O'Gorman <i@conorogorman.net>
  14 ---
  15  arch/mips/lantiq/xway/gpio_stp.c |   22 +++++++++++++---------
  16  1 files changed, 13 insertions(+), 9 deletions(-)
  17
  18 --- a/arch/mips/lantiq/xway/gpio_stp.c
  19 +++ b/arch/mips/lantiq/xway/gpio_stp.c
  20 @@ -27,6 +27,7 @@
  21  #define LTQ_STP_AR             0x10
  22
  23  #define LTQ_STP_CON_SWU                (1 << 31)
  24 +#define LTQ_STP_SWU_MASK       (1 << 31)
  25  #define LTQ_STP_2HZ            0
  26  #define LTQ_STP_4HZ            (1 << 23)
  27  #define LTQ_STP_8HZ            (2 << 23)
  28 @@ -60,6 +61,12 @@ static void ltq_stp_set(struct gpio_chip
  29         else
  30                 ltq_stp_shadow &= ~(1 << offset);
  31         ltq_stp_w32(ltq_stp_shadow, LTQ_STP_CPU0);
  32 +       ltq_stp_w32_mask(LTQ_STP_SWU_MASK, LTQ_STP_CON_SWU, LTQ_STP_CON0);
  33 +}
  34 +
  35 +static int ltq_stp_get(struct gpio_chip *chip, unsigned offset)
  36 +{
  37 +       return !!(ltq_stp_r32(LTQ_STP_CPU0) & (1<<offset));
  38  }
  39
  40  static int ltq_stp_direction_output(struct gpio_chip *chip, unsigned offset,
  41 @@ -74,6 +81,7 @@ static struct gpio_chip ltq_stp_chip = {
  42         .label = "ltq_stp",
  43         .direction_output = ltq_stp_direction_output,
  44         .set = ltq_stp_set,
  45 +       .get = ltq_stp_get,
  46         .base = 200,
  47         .ngpio = 24,
  48         .owner = THIS_MODULE,
  49 @@ -97,12 +105,6 @@ static int ltq_stp_hw_init(struct device
  50         ltq_stp_w32_mask(0, LTQ_STP_GROUP0 | LTQ_STP_GROUP1 | LTQ_STP_GROUP2,
  51                 LTQ_STP_CON1);
  52
  53 -       /* stp are update periodically by the FPI bus */
  54 -       ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1);
  55 -
  56 -       /* set stp update speed */
  57 -       ltq_stp_w32_mask(LTQ_STP_SPEED_MASK, LTQ_STP_8HZ, LTQ_STP_CON1);
  58 -
  59         /* tell the hardware that pin (led) 0 and 1 are controlled
  60          *  by the dsl arc
  61          */
  62 @@ -118,6 +120,7 @@ static int __devinit ltq_stp_probe(struc
  63  {
  64         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  65         int ret = 0;
  66 +       int pin;
  67
  68         if (!res)
  69                 return -ENOENT;
  70 @@ -135,9 +138,10 @@ static int __devinit ltq_stp_probe(struc
  71         }
  72
  73         /* the 3 pins used to control the external stp */
  74 -       if (ltq_gpio_request(&pdev->dev, 4, 2, 1, "stp-st") ||
  75 -                       ltq_gpio_request(&pdev->dev, 5, 2, 1, "stp-d") ||
  76 -                       ltq_gpio_request(&pdev->dev, 6, 2, 1, "stp-sh")) {
  77 +       pin = ltq_is_ase() ? 1 : 4;
  78 +       if (ltq_gpio_request(&pdev->dev, pin, 2, 1, "stp-st") ||
  79 +                       ltq_gpio_request(&pdev->dev, pin+1, 2, 1, "stp-d") ||
  80 +                       ltq_gpio_request(&pdev->dev, pin+2, 2, 1, "stp-sh")) {
  81                 dev_err(&pdev->dev, "failed to request needed gpios\n");
  82                 return -EBUSY;
  83         }