lantiq: wifi calibration from MTD
[openwrt/staging/wigyori.git] / target / linux / lantiq / patches-3.8 / 0037-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch
1 From 0c9b05716ac0e597ae0f81a96ff68e54716decc9 Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 13 Mar 2013 10:02:58 +0100
4 Subject: [PATCH 37/40] owrt: lantiq: wifi and ethernet eeprom handling
5
6 ---
7 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h | 6 +
8 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 +
9 arch/mips/lantiq/xway/Makefile | 3 +
10 arch/mips/lantiq/xway/ath_eep.c | 206 ++++++++++++++++++++
11 arch/mips/lantiq/xway/eth_mac.c | 76 ++++++++
12 arch/mips/lantiq/xway/pci-ath-fixup.c | 109 +++++++++++
13 arch/mips/lantiq/xway/rt_eep.c | 60 ++++++
14 drivers/net/ethernet/lantiq_etop.c | 10 +-
15 8 files changed, 469 insertions(+), 4 deletions(-)
16 create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
17 create mode 100644 arch/mips/lantiq/xway/ath_eep.c
18 create mode 100644 arch/mips/lantiq/xway/eth_mac.c
19 create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
20 create mode 100644 arch/mips/lantiq/xway/rt_eep.c
21
22 --- /dev/null
23 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
24 @@ -0,0 +1,6 @@
25 +#ifndef _PCI_ATH_FIXUP
26 +#define _PCI_ATH_FIXUP
27 +
28 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
29 +
30 +#endif /* _PCI_ATH_FIXUP */
31 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
32 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
33 @@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev,
34 extern void ltq_pmu_enable(unsigned int module);
35 extern void ltq_pmu_disable(unsigned int module);
36
37 +/* allow the ethernet driver to load a flash mapped mac addr */
38 +const u8* ltq_get_eth_mac(void);
39 +
40 #endif /* CONFIG_SOC_TYPE_XWAY */
41 #endif /* _LTQ_XWAY_H__ */
42 --- a/arch/mips/lantiq/xway/Makefile
43 +++ b/arch/mips/lantiq/xway/Makefile
44 @@ -1,3 +1,6 @@
45 obj-y := prom.o sysctrl.o clk.o reset.o dma.o gptu.o dcdc.o
46
47 +obj-y += eth_mac.o
48 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
49 +
50 obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
51 --- /dev/null
52 +++ b/arch/mips/lantiq/xway/ath_eep.c
53 @@ -0,0 +1,258 @@
54 +/*
55 + * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
56 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
57 + * Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
58 + * Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
59 + *
60 + * This program is free software; you can redistribute it and/or modify it
61 + * under the terms of the GNU General Public License version 2 as published
62 + * by the Free Software Foundation.
63 + */
64 +
65 +#include <linux/init.h>
66 +#include <linux/module.h>
67 +#include <linux/platform_device.h>
68 +#include <linux/etherdevice.h>
69 +#include <linux/ath5k_platform.h>
70 +#include <linux/ath9k_platform.h>
71 +#include <linux/pci.h>
72 +#include <linux/err.h>
73 +#include <linux/mtd/mtd.h>
74 +#include <pci-ath-fixup.h>
75 +#include <lantiq_soc.h>
76 +
77 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
78 +struct ath5k_platform_data ath5k_pdata;
79 +struct ath9k_platform_data ath9k_pdata = {
80 + .led_pin = -1,
81 +};
82 +static u16 ath5k_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS];
83 +static u8 athxk_eeprom_mac[6];
84 +
85 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
86 +{
87 + dev->dev.platform_data = &ath9k_pdata;
88 + return 0;
89 +}
90 +
91 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
92 +{
93 + struct device_node *np = pdev->dev.of_node, *mtd_np;
94 + struct resource *eep_res, *mac_res = NULL;
95 + void __iomem *eep, *mac;
96 + int mac_offset;
97 + u32 mac_inc = 0, pci_slot = 0;
98 + int i;
99 + u16 *eepdata, sum, el;
100 + struct mtd_info *the_mtd;
101 + size_t flash_readlen;
102 + const __be32 *list;
103 + const char *part;
104 + phandle phandle;
105 +
106 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
107 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
108 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
109 + of_get_property(mtd_np, "label", NULL)) || (part =
110 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
111 + != ERR_PTR(-ENODEV)) {
112 + i = mtd_read(the_mtd, be32_to_cpup(list),
113 + sizeof(ath9k_pdata.eeprom_data), &flash_readlen,
114 + (void *) ath9k_pdata.eeprom_data);
115 + put_mtd_device(the_mtd);
116 + if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
117 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
118 + return -ENODEV;
119 + }
120 + } else {
121 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
122 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
123 +
124 + if (!eep_res) {
125 + dev_err(&pdev->dev, "failed to load eeprom address\n");
126 + return -ENODEV;
127 + }
128 + if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS) {
129 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
130 + return -EINVAL;
131 + }
132 +
133 + eep = ioremap(eep_res->start, resource_size(eep_res));
134 + memcpy_fromio(ath9k_pdata.eeprom_data, eep,
135 + ATH9K_PLAT_EEP_MAX_WORDS);
136 + }
137 +
138 + if (of_find_property(np, "ath,eep-swap", NULL)) {
139 + ath9k_pdata.endian_check = true;
140 + dev_info(&pdev->dev, "endian check enabled.\n");
141 + for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
142 + ath9k_pdata.eeprom_data[i] =
143 + swab16(ath9k_pdata.eeprom_data[i]);
144 + }
145 +
146 + if (of_find_property(np, "ath,eep-csum", NULL)) {
147 + sum = ath9k_pdata.eeprom_data[0x200>>1];
148 + el = sum / sizeof(u16) - 2; /* skip length and (old) checksum */
149 + eepdata = (u16 *) (&ath9k_pdata.eeprom_data[0x204>>1]); /* after checksum */
150 + for (i = 0; i < el; i++)
151 + sum ^= *eepdata++;
152 + sum ^= 0xffff;
153 + ath9k_pdata.eeprom_data[0x202>>1] = sum;
154 +
155 + dev_info(&pdev->dev, "checksum fixed.\n");
156 + }
157 +
158 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
159 + memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data, 6);
160 + } else if (mac_res) {
161 + if (resource_size(mac_res) != 6) {
162 + dev_err(&pdev->dev, "mac has an invalid size\n");
163 + return -EINVAL;
164 + }
165 + mac = ioremap(mac_res->start, resource_size(mac_res));
166 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
167 + } else if (ltq_get_eth_mac())
168 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
169 + else {
170 + dev_warn(&pdev->dev, "using random mac\n");
171 + random_ether_addr(athxk_eeprom_mac);
172 + }
173 +
174 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
175 + athxk_eeprom_mac[5] += mac_inc;
176 +
177 + ath9k_pdata.macaddr = athxk_eeprom_mac;
178 + ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
179 +
180 + if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
181 + ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
182 +
183 + dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
184 + }
185 +
186 + dev_info(&pdev->dev, "loaded ath9k eeprom\n");
187 +
188 + return 0;
189 +}
190 +
191 +static struct of_device_id ath9k_eeprom_ids[] = {
192 + { .compatible = "ath9k,eeprom" },
193 + { }
194 +};
195 +
196 +static struct platform_driver ath9k_eeprom_driver = {
197 + .driver = {
198 + .name = "ath9k,eeprom",
199 + .owner = THIS_MODULE,
200 + .of_match_table = of_match_ptr(ath9k_eeprom_ids),
201 + },
202 +};
203 +
204 +static int __init of_ath9k_eeprom_init(void)
205 +{
206 + return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
207 +}
208 +late_initcall(of_ath9k_eeprom_init);
209 +
210 +
211 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
212 +{
213 + dev->dev.platform_data = &ath5k_pdata;
214 + return 0;
215 +}
216 +
217 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
218 +{
219 + struct device_node *np = pdev->dev.of_node, *mtd_np;
220 + struct resource *eep_res, *mac_res = NULL;
221 + void __iomem *eep, *mac;
222 + int mac_offset;
223 + u32 mac_inc = 0;
224 + int i;
225 + struct mtd_info *the_mtd;
226 + size_t flash_readlen;
227 + const __be32 *list;
228 + const char *part;
229 + phandle phandle;
230 +
231 + if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
232 + sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
233 + (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
234 + of_get_property(mtd_np, "label", NULL)) || (part =
235 + mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
236 + != ERR_PTR(-ENODEV)) {
237 + i = mtd_read(the_mtd, be32_to_cpup(list),
238 + sizeof(ath5k_eeprom_data), &flash_readlen,
239 + (void *) ath5k_eeprom_data);
240 + put_mtd_device(the_mtd);
241 + if ((sizeof(ath5k_eeprom_data) != flash_readlen) || i) {
242 + dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
243 + return -ENODEV;
244 + }
245 + } else {
246 + eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
247 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
248 +
249 + if (!eep_res) {
250 + dev_err(&pdev->dev, "failed to load eeprom address\n");
251 + return -ENODEV;
252 + }
253 + if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS) {
254 + dev_err(&pdev->dev, "eeprom has an invalid size\n");
255 + return -EINVAL;
256 + }
257 +
258 + eep = ioremap(eep_res->start, resource_size(eep_res));
259 + memcpy_fromio(ath5k_eeprom_data, eep, ATH5K_PLAT_EEP_MAX_WORDS);
260 + }
261 +
262 + if (of_find_property(np, "ath,eep-swap", NULL))
263 + for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
264 + ath5k_eeprom_data[i] = swab16(ath5k_eeprom_data[i]);
265 +
266 + if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
267 + memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_eeprom_data, 6);
268 + } else if (mac_res) {
269 + if (resource_size(mac_res) != 6) {
270 + dev_err(&pdev->dev, "mac has an invalid size\n");
271 + return -EINVAL;
272 + }
273 + mac = ioremap(mac_res->start, resource_size(mac_res));
274 + memcpy_fromio(athxk_eeprom_mac, mac, 6);
275 + } else if (ltq_get_eth_mac())
276 + memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
277 + else {
278 + dev_warn(&pdev->dev, "using random mac\n");
279 + random_ether_addr(athxk_eeprom_mac);
280 + }
281 +
282 + if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
283 + athxk_eeprom_mac[5] += mac_inc;
284 +
285 + ath5k_pdata.eeprom_data = ath5k_eeprom_data;
286 + ath5k_pdata.macaddr = athxk_eeprom_mac;
287 + ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
288 +
289 + dev_info(&pdev->dev, "loaded ath5k eeprom\n");
290 +
291 + return 0;
292 +}
293 +
294 +static struct of_device_id ath5k_eeprom_ids[] = {
295 + { .compatible = "ath5k,eeprom" },
296 + { }
297 +};
298 +
299 +static struct platform_driver ath5k_eeprom_driver = {
300 + .driver = {
301 + .name = "ath5k,eeprom",
302 + .owner = THIS_MODULE,
303 + .of_match_table = of_match_ptr(ath5k_eeprom_ids),
304 + },
305 +};
306 +
307 +static int __init of_ath5k_eeprom_init(void)
308 +{
309 + return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
310 +}
311 +late_initcall(of_ath5k_eeprom_init);
312 --- /dev/null
313 +++ b/arch/mips/lantiq/xway/eth_mac.c
314 @@ -0,0 +1,76 @@
315 +/*
316 + * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
317 + *
318 + * This program is free software; you can redistribute it and/or modify it
319 + * under the terms of the GNU General Public License version 2 as published
320 + * by the Free Software Foundation.
321 + */
322 +
323 +#include <linux/init.h>
324 +#include <linux/module.h>
325 +#include <linux/of_platform.h>
326 +#include <linux/if_ether.h>
327 +
328 +static u8 eth_mac[6];
329 +static int eth_mac_set;
330 +
331 +const u8* ltq_get_eth_mac(void)
332 +{
333 + return eth_mac;
334 +}
335 +
336 +static int __init setup_ethaddr(char *str)
337 +{
338 + eth_mac_set = mac_pton(str, eth_mac);
339 + return !eth_mac_set;
340 +}
341 +__setup("ethaddr=", setup_ethaddr);
342 +
343 +int __init of_eth_mac_probe(struct platform_device *pdev)
344 +{
345 + struct device_node *np = pdev->dev.of_node;
346 + struct resource *mac_res;
347 + void __iomem *mac;
348 + u32 mac_inc = 0;
349 +
350 + if (eth_mac_set) {
351 + dev_err(&pdev->dev, "mac was already set by bootloader\n");
352 + return -EINVAL;
353 + }
354 + mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
355 +
356 + if (!mac_res) {
357 + dev_err(&pdev->dev, "failed to load mac\n");
358 + return -EINVAL;
359 + }
360 + if (resource_size(mac_res) != 6) {
361 + dev_err(&pdev->dev, "mac has an invalid size\n");
362 + return -EINVAL;
363 + }
364 + mac = ioremap(mac_res->start, resource_size(mac_res));
365 + memcpy_fromio(eth_mac, mac, 6);
366 +
367 + if (!of_property_read_u32(np, "mac-increment", &mac_inc))
368 + eth_mac[5] += mac_inc;
369 +
370 + return 0;
371 +}
372 +
373 +static struct of_device_id eth_mac_ids[] = {
374 + { .compatible = "lantiq,eth-mac" },
375 + { /* sentinel */ }
376 +};
377 +
378 +static struct platform_driver eth_mac_driver = {
379 + .driver = {
380 + .name = "lantiq,eth-mac",
381 + .owner = THIS_MODULE,
382 + .of_match_table = of_match_ptr(eth_mac_ids),
383 + },
384 +};
385 +
386 +static int __init of_eth_mac_init(void)
387 +{
388 + return platform_driver_probe(&eth_mac_driver, of_eth_mac_probe);
389 +}
390 +device_initcall(of_eth_mac_init);
391 --- /dev/null
392 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
393 @@ -0,0 +1,109 @@
394 +/*
395 + * Atheros AP94 reference board PCI initialization
396 + *
397 + * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
398 + *
399 + * This program is free software; you can redistribute it and/or modify it
400 + * under the terms of the GNU General Public License version 2 as published
401 + * by the Free Software Foundation.
402 + */
403 +
404 +#include <linux/pci.h>
405 +#include <linux/init.h>
406 +#include <linux/delay.h>
407 +#include <lantiq_soc.h>
408 +
409 +#define LTQ_PCI_MEM_BASE 0x18000000
410 +
411 +struct ath_fixup {
412 + u16 *cal_data;
413 + unsigned slot;
414 +};
415 +
416 +static int ath_num_fixups;
417 +static struct ath_fixup ath_fixups[2];
418 +
419 +static void ath_pci_fixup(struct pci_dev *dev)
420 +{
421 + void __iomem *mem;
422 + u16 *cal_data = NULL;
423 + u16 cmd;
424 + u32 bar0;
425 + u32 val;
426 + unsigned i;
427 +
428 + for (i = 0; i < ath_num_fixups; i++) {
429 + if (ath_fixups[i].cal_data == NULL)
430 + continue;
431 +
432 + if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
433 + continue;
434 +
435 + cal_data = ath_fixups[i].cal_data;
436 + break;
437 + }
438 +
439 + if (cal_data == NULL)
440 + return;
441 +
442 + if (*cal_data != 0xa55a) {
443 + pr_err("pci %s: invalid calibration data\n", pci_name(dev));
444 + return;
445 + }
446 +
447 + pr_info("pci %s: fixup device configuration\n", pci_name(dev));
448 +
449 + mem = ioremap(LTQ_PCI_MEM_BASE, 0x10000);
450 + if (!mem) {
451 + pr_err("pci %s: ioremap error\n", pci_name(dev));
452 + return;
453 + }
454 +
455 + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
456 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, LTQ_PCI_MEM_BASE);
457 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
458 + cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
459 + pci_write_config_word(dev, PCI_COMMAND, cmd);
460 +
461 + /* set pointer to first reg address */
462 + cal_data += 3;
463 + while (*cal_data != 0xffff) {
464 + u32 reg;
465 + reg = *cal_data++;
466 + val = *cal_data++;
467 + val |= (*cal_data++) << 16;
468 +
469 + ltq_w32(swab32(val), mem + reg);
470 + udelay(100);
471 + }
472 +
473 + pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
474 + dev->vendor = val & 0xffff;
475 + dev->device = (val >> 16) & 0xffff;
476 +
477 + pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
478 + dev->revision = val & 0xff;
479 + dev->class = val >> 8; /* upper 3 bytes */
480 +
481 + pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
482 + pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
483 +
484 + pci_read_config_word(dev, PCI_COMMAND, &cmd);
485 + cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
486 + pci_write_config_word(dev, PCI_COMMAND, cmd);
487 +
488 + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
489 +
490 + iounmap(mem);
491 +}
492 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
493 +
494 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
495 +{
496 + if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
497 + return;
498 +
499 + ath_fixups[ath_num_fixups].slot = slot;
500 + ath_fixups[ath_num_fixups].cal_data = cal_data;
501 + ath_num_fixups++;
502 +}
503 --- /dev/null
504 +++ b/arch/mips/lantiq/xway/rt_eep.c
505 @@ -0,0 +1,60 @@
506 +/*
507 + * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
508 + *
509 + * This program is free software; you can redistribute it and/or modify it
510 + * under the terms of the GNU General Public License version 2 as published
511 + * by the Free Software Foundation.
512 + */
513 +
514 +#include <linux/init.h>
515 +#include <linux/module.h>
516 +#include <linux/pci.h>
517 +#include <linux/platform_device.h>
518 +#include <linux/rt2x00_platform.h>
519 +
520 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
521 +static struct rt2x00_platform_data rt2x00_pdata;
522 +
523 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
524 +{
525 + dev->dev.platform_data = &rt2x00_pdata;
526 + return 0;
527 +}
528 +
529 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
530 +{
531 + struct device_node *np = pdev->dev.of_node;
532 + const char *eeprom;
533 +
534 + if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
535 + dev_err(&pdev->dev, "failed to load eeprom filename\n");
536 + return 0;
537 + }
538 +
539 + rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
540 +// rt2x00_pdata.mac_address = mac;
541 + ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
542 +
543 + dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
544 +
545 + return 0;
546 +}
547 +
548 +static struct of_device_id ralink_eeprom_ids[] = {
549 + { .compatible = "ralink,eeprom" },
550 + { }
551 +};
552 +
553 +static struct platform_driver ralink_eeprom_driver = {
554 + .driver = {
555 + .name = "ralink,eeprom",
556 + .owner = THIS_MODULE,
557 + .of_match_table = of_match_ptr(ralink_eeprom_ids),
558 + },
559 +};
560 +
561 +static int __init of_ralink_eeprom_init(void)
562 +{
563 + return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
564 +}
565 +device_initcall(of_ralink_eeprom_init);
566 --- a/drivers/net/ethernet/lantiq_etop.c
567 +++ b/drivers/net/ethernet/lantiq_etop.c
568 @@ -826,7 +826,8 @@ ltq_etop_init(struct net_device *dev)
569
570 ltq_etop_change_mtu(dev, 1500);
571
572 - memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
573 + if (priv->mac)
574 + memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
575 if (!is_valid_ether_addr(mac.sa_data)) {
576 pr_warn("etop: invalid MAC, using random\n");
577 random_ether_addr(mac.sa_data);
578 @@ -885,8 +886,7 @@ static const struct net_device_ops ltq_e
579 .ndo_tx_timeout = ltq_etop_tx_timeout,
580 };
581
582 -static int __devinit
583 -ltq_etop_probe(struct platform_device *pdev)
584 +static int ltq_etop_probe(struct platform_device *pdev)
585 {
586 struct net_device *dev;
587 struct ltq_etop_priv *priv;
588 @@ -950,7 +950,9 @@ ltq_etop_probe(struct platform_device *p
589 priv->tx_irq = irqres[0].start;
590 priv->rx_irq = irqres[1].start;
591 priv->mii_mode = of_get_phy_mode(pdev->dev.of_node);
592 - priv->mac = of_get_mac_address(pdev->dev.of_node);
593 + priv->mac = ltq_get_eth_mac();
594 + if (!priv->mac)
595 + priv->mac = of_get_mac_address(pdev->dev.of_node);
596
597 priv->clk_ppe = clk_get(&pdev->dev, NULL);
598 if (IS_ERR(priv->clk_ppe))
599 --- a/arch/mips/pci/pci-lantiq.c
600 +++ b/arch/mips/pci/pci-lantiq.c
601 @@ -260,4 +260,4 @@ int __init pcibios_init(void)
602 return ret;
603 }
604
605 -arch_initcall(pcibios_init);
606 +late_initcall(pcibios_init);