target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
   2 /*
   3  * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
   4  */
   5
   6 #include <dt-bindings/input/input.h>
   7 #include "mt7623.dtsi"
   8 #include "mt6323.dtsi"
   9
  10 / {
  11         compatible = "unielec,u7623-02-emmc", "mediatek,mt7623";
  12
  13         aliases {
  14                 serial2 = &uart2;
  15         };
  16
  17         chosen {
  18                 bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs console=ttyS0,115200 blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)";
  19                 stdout-path = "serial2:115200n8";
  20         };
  21
  22         cpus {
  23                 cpu@0 {
  24                         proc-supply = <&mt6323_vproc_reg>;
  25                 };
  26
  27                 cpu@1 {
  28                         proc-supply = <&mt6323_vproc_reg>;
  29                 };
  30
  31                 cpu@2 {
  32                         proc-supply = <&mt6323_vproc_reg>;
  33                 };
  34
  35                 cpu@3 {
  36                         proc-supply = <&mt6323_vproc_reg>;
  37                 };
  38         };
  39
  40         reg_1p8v: regulator-1p8v {
  41                 compatible = "regulator-fixed";
  42                 regulator-name = "fixed-1.8V";
  43                 regulator-min-microvolt = <1800000>;
  44                 regulator-max-microvolt = <1800000>;
  45                 regulator-boot-on;
  46                 regulator-always-on;
  47         };
  48
  49         reg_3p3v: regulator-3p3v {
  50                 compatible = "regulator-fixed";
  51                 regulator-name = "fixed-3.3V";
  52                 regulator-min-microvolt = <3300000>;
  53                 regulator-max-microvolt = <3300000>;
  54                 regulator-boot-on;
  55                 regulator-always-on;
  56         };
  57
  58         reg_5v: regulator-5v {
  59                 compatible = "regulator-fixed";
  60                 regulator-name = "fixed-5V";
  61                 regulator-min-microvolt = <5000000>;
  62                 regulator-max-microvolt = <5000000>;
  63                 regulator-boot-on;
  64                 regulator-always-on;
  65         };
  66
  67         gpio-keys {
  68                 compatible = "gpio-keys";
  69                 pinctrl-names = "default";
  70                 pinctrl-0 = <&key_pins_a>;
  71
  72                 factory {
  73                         label = "factory";
  74                         linux,code = <KEY_RESTART>;
  75                         gpios = <&pio 256 GPIO_ACTIVE_LOW>;
  76                 };
  77         };
  78
  79         leds {
  80                 compatible = "gpio-leds";
  81                 pinctrl-names = "default";
  82                 pinctrl-0 = <&led_pins_unielec>;
  83
  84                 led3 {
  85                         label = "u7623-01:green:led3";
  86                         gpios = <&pio 14 GPIO_ACTIVE_LOW>;
  87                 };
  88
  89                 led4 {
  90                         label = "u7623-01:green:led4";
  91                         gpios = <&pio 15 GPIO_ACTIVE_LOW>;
  92                 };
  93         };
  94 };
  95
  96 &crypto {
  97         status = "okay";
  98 };
  99
 100 &eth {
 101         status = "okay";
 102
 103         gmac0: mac@0 {
 104                 compatible = "mediatek,eth-mac";
 105                 reg = <0>;
 106                 phy-mode = "trgmii";
 107
 108                 fixed-link {
 109                         speed = <1000>;
 110                         full-duplex;
 111                         pause;
 112                 };
 113         };
 114
 115         mdio: mdio-bus {
 116                 #address-cells = <1>;
 117                 #size-cells = <0>;
 118
 119                 mt7530: switch@0 {
 120                         compatible = "mediatek,mt7530";
 121                 };
 122         };
 123 };
 124
 125 &mt7530 {
 126         compatible = "mediatek,mt7530";
 127         #address-cells = <1>;
 128         #size-cells = <0>;
 129         reg = <0>;
 130         pinctrl-names = "default";
 131         mediatek,mcm;
 132         resets = <&ethsys 2>;
 133         reset-names = "mcm";
 134         core-supply = <&mt6323_vpa_reg>;
 135         io-supply = <&mt6323_vemc3v3_reg>;
 136
 137         dsa,mii-bus = <&mdio>;
 138
 139         ports {
 140                 #address-cells = <1>;
 141                 #size-cells = <0>;
 142                 reg = <0>;
 143
 144                 port@0 {
 145                         reg = <0>;
 146                         label = "lan0";
 147                         cpu = <&cpu_port0>;
 148                 };
 149
 150                 port@1 {
 151                         reg = <1>;
 152                         label = "lan1";
 153                         cpu = <&cpu_port0>;
 154                 };
 155
 156                 port@2 {
 157                         reg = <2>;
 158                         label = "lan2";
 159                         cpu = <&cpu_port0>;
 160                 };
 161
 162                 port@3 {
 163                         reg = <3>;
 164                         label = "lan3";
 165                         cpu = <&cpu_port0>;
 166                 };
 167
 168                 port@4 {
 169                         reg = <4>;
 170                         label = "wan";
 171                         cpu = <&cpu_port0>;
 172                 };
 173
 174                 cpu_port0: port@6 {
 175                         reg = <6>;
 176                         label = "cpu";
 177                         ethernet = <&gmac0>;
 178                         phy-mode = "trgmii";
 179
 180                         fixed-link {
 181                                 speed = <1000>;
 182                                 full-duplex;
 183                         };
 184                 };
 185         };
 186 };
 187
 188 &mmc0 {
 189         pinctrl-names = "default", "state_uhs";
 190         pinctrl-0 = <&mmc0_pins_default>;
 191         pinctrl-1 = <&mmc0_pins_uhs>;
 192         status = "okay";
 193         bus-width = <8>;
 194         max-frequency = <50000000>;
 195         cap-mmc-highspeed;
 196         vmmc-supply = <&reg_3p3v>;
 197         vqmmc-supply = <&reg_1p8v>;
 198         non-removable;
 199 };
 200
 201 &pio {
 202         key_pins_a: keys-alt {
 203                 pins-keys {
 204                         pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
 205                                  <MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
 206                         input-enable;
 207                 };
 208         };
 209
 210         led_pins_unielec: leds-unielec {
 211                 pins-leds {
 212                         pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
 213                                  <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
 214                 };
 215         };
 216
 217         mmc0_pins_default: mmc0default {
 218                 pins_cmd_dat {
 219                         pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
 220                                  <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
 221                                  <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
 222                                  <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
 223                                  <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
 224                                  <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
 225                                  <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
 226                                  <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
 227                                  <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
 228                         input-enable;
 229                         bias-pull-up;
 230                 };
 231
 232                 pins_clk {
 233                         pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
 234                         bias-pull-down;
 235                 };
 236
 237                 pins_rst {
 238                         pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
 239                         bias-pull-up;
 240                 };
 241         };
 242
 243         mmc0_pins_uhs: mmc0 {
 244                 pins_cmd_dat {
 245                         pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
 246                                  <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
 247                                  <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
 248                                  <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
 249                                  <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
 250                                  <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
 251                                  <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
 252                                  <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
 253                                  <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
 254                         input-enable;
 255                         drive-strength = <MTK_DRIVE_2mA>;
 256                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 257                 };
 258
 259                 pins_clk {
 260                         pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
 261                         drive-strength = <MTK_DRIVE_2mA>;
 262                         bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
 263                 };
 264
 265                 pins_rst {
 266                         pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
 267                         bias-pull-up;
 268                 };
 269         };
 270
 271         pcie_default: pcie_pin_default {
 272                 pins_cmd_dat {
 273                         pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
 274                                  <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
 275                         bias-disable;
 276                 };
 277         };
 278 };
 279
 280 &pwm {
 281         pinctrl-names = "default";
 282         pinctrl-0 = <&pwm_pins_a>;
 283         status = "okay";
 284 };
 285
 286 &pwrap {
 287         mt6323 {
 288                 mt6323led: led {
 289                         compatible = "mediatek,mt6323-led";
 290                         #address-cells = <1>;
 291                         #size-cells = <0>;
 292
 293                         led@0 {
 294                                 reg = <0>;
 295                                 label = "led0";
 296                         };
 297                 };
 298         };
 299 };
 300
 301 &uart2 {
 302         pinctrl-names = "default";
 303         pinctrl-0 = <&uart2_pins_b>;
 304         status = "okay";
 305 };
 306
 307 &usb1 {
 308         vusb33-supply = <&reg_3p3v>;
 309         vbus-supply = <&reg_3p3v>;
 310         status = "okay";
 311 };
 312
 313 &u3phy1 {
 314         status = "okay";
 315 };
 316
 317 &u3phy2 {
 318         status = "okay";
 319         mediatek,phy-switch = <&hifsys>;
 320 };
 321
 322 &pcie {
 323         pinctrl-names = "default";
 324         pinctrl-0 = <&pcie_default>;
 325         status = "okay";
 326
 327         pcie@1,0 {
 328                 status = "okay";
 329         };
 330
 331         pcie@2,0 {
 332                 status = "okay";
 333         };
 334 };
 335
 336 &pcie1_phy {
 337         status = "okay";
 338 };
 339