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mediatek: add support for Bananapi BPi-R3
[openwrt/staging/stintel.git] / target / linux / mediatek / dts / mt7986a-bananapi-bpi-r3.dts
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Copyright (C) 2021 MediaTek Inc.
4 * Author: Sam.Shih <sam.shih@mediatek.com>
5 */
6
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/gpio/gpio.h>
10
11 #include "mt7986a.dtsi"
12
13 / {
14 model = "Bananapi BPI-R3";
15 compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
16
17 aliases {
18 serial0 = &uart0;
19 ethernet0 = &gmac0;
20 ethernet1 = &gmac1;
21 led-boot = &led_status_green;
22 led-failsafe = &led_status_green;
23 led-running = &led_status_green;
24 led-upgrade = &led_status_blue;
25 };
26
27 chosen {
28 stdout-path = "serial0:115200n8";
29 };
30
31 memory@40000000 {
32 device_type = "memory";
33 reg = <0 0x40000000 0 0x40000000>;
34 };
35
36 reg_1p8v: regulator-1p8v {
37 compatible = "regulator-fixed";
38 regulator-name = "fixed-1.8V";
39 regulator-min-microvolt = <1800000>;
40 regulator-max-microvolt = <1800000>;
41 regulator-boot-on;
42 regulator-always-on;
43 };
44
45 reg_3p3v: regulator-3p3v {
46 compatible = "regulator-fixed";
47 regulator-name = "fixed-3.3V";
48 regulator-min-microvolt = <3300000>;
49 regulator-max-microvolt = <3300000>;
50 regulator-boot-on;
51 regulator-always-on;
52 };
53
54 reg_5v: regulator-5v {
55 compatible = "regulator-fixed";
56 regulator-name = "fixed-5V";
57 regulator-min-microvolt = <5000000>;
58 regulator-max-microvolt = <5000000>;
59 regulator-boot-on;
60 regulator-always-on;
61 };
62
63 keys {
64 compatible = "gpio-keys";
65
66 factory {
67 label = "reset";
68 linux,code = <KEY_RESTART>;
69 gpios = <&pio 9 GPIO_ACTIVE_LOW>;
70 };
71
72 wps {
73 label = "wps";
74 linux,code = <KEY_WPS_BUTTON>;
75 gpios = <&pio 10 GPIO_ACTIVE_LOW>;
76 };
77 };
78
79 leds {
80 compatible = "gpio-leds";
81
82 led_status_green: green {
83 label = "green:status";
84 gpios = <&pio 69 GPIO_ACTIVE_HIGH>;
85 default-state = "on";
86 };
87
88 led_status_blue: blue {
89 label = "blue:status";
90 gpios = <&pio 86 GPIO_ACTIVE_HIGH>;
91 };
92 };
93
94 /* SFP1 cage (WAN) */
95 i2c_sfp1: i2c-gpio-0 {
96 compatible = "i2c-gpio";
97 sda-gpios = <&pio 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
98 scl-gpios = <&pio 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
99 i2c-gpio,delay-us = <2>;
100 #address-cells = <1>;
101 #size-cells = <0>;
102 };
103
104 sfp1: sfp1 {
105 compatible = "sff,sfp";
106 i2c-bus = <&i2c_sfp1>;
107 los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>;
108 mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>;
109 tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
110 tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
111 };
112
113 /* SFP2 cage (LAN) */
114 i2c_sfp2: i2c-gpio-1 {
115 compatible = "i2c-gpio";
116 sda-gpios = <&pio 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
117 scl-gpios = <&pio 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
118 i2c-gpio,delay-us = <2>;
119 #address-cells = <1>;
120 #size-cells = <0>;
121 };
122
123 sfp2: sfp2 {
124 compatible = "sff,sfp";
125 i2c-bus = <&i2c_sfp2>;
126 los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>;
127 mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>;
128 tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
129 tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>;
130 };
131 };
132
133 &eth {
134 status = "okay";
135
136 gmac0: mac@0 {
137 compatible = "mediatek,eth-mac";
138 reg = <0>;
139 phy-mode = "2500base-x";
140
141 fixed-link {
142 speed = <2500>;
143 full-duplex;
144 pause;
145 };
146 };
147
148 gmac1: mac@1 {
149 compatible = "mediatek,eth-mac";
150 reg = <1>;
151 phy-mode = "2500base-x";
152 sfp = <&sfp1>;
153 managed = "in-band-status";
154 };
155
156 mdio: mdio-bus {
157 #address-cells = <1>;
158 #size-cells = <0>;
159 };
160 };
161
162 &mdio {
163 switch: switch@0 {
164 compatible = "mediatek,mt7531";
165 reg = <31>;
166 reset-gpios = <&pio 5 GPIO_ACTIVE_LOW>;
167 interrupt-controller;
168 #interrupt-cells = <1>;
169 interrupt-parent = <&pio>;
170 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
171 };
172 };
173
174 &switch {
175 ports {
176 #address-cells = <1>;
177 #size-cells = <0>;
178
179 port@0 {
180 reg = <0>;
181 label = "wan";
182 };
183
184 port@1 {
185 reg = <1>;
186 label = "lan1";
187 };
188
189 port@2 {
190 reg = <2>;
191 label = "lan2";
192 };
193
194 port@3 {
195 reg = <3>;
196 label = "lan3";
197 };
198
199 port@4 {
200 reg = <4>;
201 label = "lan4";
202 };
203
204 port5: port@5 {
205 reg = <5>;
206 label = "sfp2";
207 phy-mode = "2500base-x";
208 sfp = <&sfp2>;
209 managed = "in-band-status";
210 };
211
212 port@6 {
213 reg = <6>;
214 label = "cpu";
215 ethernet = <&gmac0>;
216 phy-mode = "2500base-x";
217
218 fixed-link {
219 speed = <2500>;
220 full-duplex;
221 pause;
222 };
223 };
224 };
225 };
226
227 &crypto {
228 status = "okay";
229 };
230
231 &mmc0 {
232 //sdcard
233 pinctrl-names = "default", "state_uhs";
234 pinctrl-0 = <&mmc0_pins_default>;
235 pinctrl-1 = <&mmc0_pins_uhs>;
236 bus-width = <4>;
237 max-frequency = <52000000>;
238 cap-sd-highspeed;
239 vmmc-supply = <&reg_3p3v>;
240 vqmmc-supply = <&reg_1p8v>;
241 status = "okay";
242 };
243
244 &pcie {
245 pinctrl-names = "default";
246 pinctrl-0 = <&pcie_pins>;
247 status = "okay";
248 };
249
250 &pcie_phy {
251 status = "okay";
252 };
253
254 &wmac {
255 status = "okay";
256 pinctrl-names = "default", "dbdc";
257 pinctrl-0 = <&wf_2g_5g_pins>, <&wf_led_pins>;
258 pinctrl-1 = <&wf_dbdc_pins>, <&wf_led_pins>;
259 };
260
261 &pio {
262 /* don't mess around with GPIO 419, 450, 451, 498, 510 in sysfs system will freeze. */
263 mmc0_pins_default: mmc0-pins {
264 mux {
265 function = "emmc";
266 groups = "emmc_51";
267 };
268 conf-cmd-dat {
269 pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
270 "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
271 "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
272 input-enable;
273 drive-strength = <4>;
274 mediatek,pull-up-adv = <1>; /* pull-up 10K */
275 };
276 conf-clk {
277 pins = "EMMC_CK";
278 drive-strength = <6>;
279 mediatek,pull-down-adv = <2>; /* pull-down 50K */
280 };
281 conf-ds {
282 pins = "EMMC_DSL";
283 mediatek,pull-down-adv = <2>; /* pull-down 50K */
284 };
285 conf-rst {
286 pins = "EMMC_RSTB";
287 drive-strength = <4>;
288 mediatek,pull-up-adv = <1>; /* pull-up 10K */
289 };
290 };
291
292 mmc0_pins_uhs: mmc0-uhs-pins {
293 mux {
294 function = "emmc";
295 groups = "emmc_51";
296 };
297 conf-cmd-dat {
298 pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
299 "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
300 "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
301 input-enable;
302 drive-strength = <4>;
303 mediatek,pull-up-adv = <1>; /* pull-up 10K */
304 };
305 conf-clk {
306 pins = "EMMC_CK";
307 drive-strength = <6>;
308 mediatek,pull-down-adv = <2>; /* pull-down 50K */
309 };
310 conf-ds {
311 pins = "EMMC_DSL";
312 mediatek,pull-down-adv = <2>; /* pull-down 50K */
313 };
314 conf-rst {
315 pins = "EMMC_RSTB";
316 drive-strength = <4>;
317 mediatek,pull-up-adv = <1>; /* pull-up 10K */
318 };
319 };
320
321 pcie_pins: pcie-pins {
322 mux {
323 function = "pcie";
324 groups = "pcie_clk", "pcie_pereset"; //"pcie_wake" is unused
325 };
326 };
327
328 spi_flash_pins: spi-flash-pins {
329 mux {
330 function = "spi";
331 groups = "spi0", "spi0_wp_hold";
332 };
333 };
334
335 uart1_pins: uart1-pins {
336 mux {
337 function = "uart";
338 groups = "uart1";
339 };
340 };
341
342 wf_led_pins: wf-led-pins {
343 mux {
344 function = "led";
345 groups = "wifi_led";
346 };
347 };
348
349 wf_2g_5g_pins: wf-2g-5g-pins {
350 mux {
351 function = "wifi";
352 groups = "wf_2g", "wf_5g";
353 };
354 conf {
355 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
356 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
357 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
358 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
359 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
360 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
361 "WF1_TOP_CLK", "WF1_TOP_DATA";
362 drive-strength = <4>;
363 };
364 };
365
366 wf_dbdc_pins: wf-dbdc-pins {
367 mux {
368 function = "wifi";
369 groups = "wf_dbdc";
370 };
371 conf {
372 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
373 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
374 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
375 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
376 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
377 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
378 "WF1_TOP_CLK", "WF1_TOP_DATA";
379 drive-strength = <4>;
380 };
381 };
382 };
383
384 &spi0 {
385 pinctrl-names = "default";
386 pinctrl-0 = <&spi_flash_pins>;
387
388 status = "okay";
389 };
390
391 &ssusb {
392 vusb33-supply = <&reg_3p3v>;
393 vbus-supply = <&reg_5v>;
394 status = "okay";
395 };
396
397 &uart0 {
398 status = "okay";
399 };
400
401 &uart1 {
402 pinctrl-names = "default";
403 pinctrl-0 = <&uart1_pins>;
404 status = "okay";
405 };
406
407 &usb_phy {
408 status = "okay";
409 };
410
411 &wmac {
412 mediatek,eeprom-data = <0x86790900 0xc4326 0x60000000 0x00 0x00 0x00 0x00 0x00
413 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
414 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x1000000
415 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
416 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
417 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
418 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
419 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
420 0x00 0x800 0x00 0x00 0x00 0x00 0x00 0x00
421 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
422 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
423 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
424 0x00 0x00 0x00 0x00 0x24649090 0x280000 0x5100000 0x00
425 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
426 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
427 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
428 0x21e00 0x21e0002 0x1e00021e 0x22800 0x2280002 0x28000228 0x00 0x00
429 0x00 0x00 0x00 0x00 0x00 0x00 0x8080 0x8080fdf7
430 0x903150d 0x80808080 0x80808080 0x5050d0d 0x1313c6c6 0xc3c3c200 0xc200c2 0x8182
431 0x8585c2c2 0x82828282 0x858500c2 0xc2000081 0x82858587 0x87c2c200 0x81818285 0x858787c2
432 0xc2000081 0x82858587 0x87c2c200 0x818285 0x858787c2 0xc2000081 0x82858587 0x87c4c4c2
433 0xc100c300 0xc3c3c100 0x818383c3 0xc3c3c100 0x81838300 0xc2c2c2c0 0x81828484 0xc3
434 0xc3c3c100 0x81838386 0x86c3c3c3 0xc1008183 0x838686c2 0xc2c2c081 0x82848486 0x86c3c3c3
435 0xc1008183 0x838686c3 0xc3c3c100 0x81838386 0x86c3c3c3 0xc1008183 0x83868622 0x28002228
436 0x222800 0x22280000 0xdddddddd 0xdddddddd 0xddbbbbbb 0xccccccdd 0xdddddddd 0xdddddddd
437 0xeeeeeecc 0xccccdddd 0xdddddddd 0x4a5662 0x4a 0x56620000 0x4a5662 0x4a
438 0x56620000 0x88888888 0x33333326 0x26262626 0x26262600 0x33333326 0x26262626 0x26262600
439 0x33333326 0x26262626 0x26262600 0x33333326 0x26262626 0x26262600 0x00 0xf0f0cc00
440 0x00 0xaaaa 0xaabbbbbb 0xcccccccc 0xccccbbbb 0xbbbbbbbb 0xbbbbbbaa 0xaaaabbbb
441 0xbbaaaaaa 0x999999aa 0xaaaabbbb 0xbbcccccc 0x00 0xaaaa 0xaa000000 0xbbbbbbbb
442 0xbbbbaaaa 0xaa999999 0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa 0xaaaabbbb 0xbbbbbbbb
443 0x00 0x00 0x00 0x99999999 0x9999aaaa 0xaaaaaaaa 0x999999aa 0xaaaaaaaa
444 0xaaaaaaaa 0xaaaaaaaa 0xaaaabbbb 0xbbbbbbbb 0x00 0xeeee 0xeeffffff 0xcccccccc
445 0xccccdddd 0xddbbbbbb 0xccccccbb 0xbbbbbbbb 0xbbbbbbbb 0xbbbbbbbb 0xbbbbcccc 0xccdddddd
446 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051
447 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200
448 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e
449 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051
450 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200
451 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e 0x516200 0x686e0051 0x6200686e
452 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888 0x88888888
453 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
454 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
455 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
456 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
457 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
458 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
459 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
460 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
461 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
462 0x00 0x00 0x00 0x00 0x01 0x6000100 0x1050002 0xff0300
463 0xf900fe03 0x00 0x00 0x9b 0x6e370000 0x00 0xfc0009 0xa00fe00
464 0x60700fe 0x70800 0x5000b0a 0x00 0x00 0xe2 0x96460000 0x00
465 0x400f7 0xf8000300 0xfcfe0003 0xfbfc00 0xee00e3f2 0x00 0x00 0x11
466 0xbb550000 0x00 0x600f6 0xfc000300 0xfbfe0004 0xfafe00 0xf600ecf2 0x00
467 0x00 0x1f 0xbf580000 0x00 0x600f5 0xf6000400 0xf8f90004 0xf7f800
468 0xf700f0f4 0x00 0x00 0x24 0xbe570000 0x00 0x800f8 0xfe000600
469 0xf8fd0007 0xf9fe00 0xf500f0f4 0x00 0x00 0x2d 0xd6610000 0x00
470 0x400f7 0xfc000500 0xf7fc0005 0xf7fc00 0xf900f5f8 0x00 0x00 0x26
471 0xd96e0000 0x00 0x400f7 0xf9000600 0xf5f70005 0xf5f800 0xf900f4f7 0x00
472 0x00 0x1b 0xce690000 0x00 0x300f8 0xf8000600 0xf6f60004 0xf6f700
473 0xf900f4f7 0x00 0x00 0x18 0xd8720000 0x00 0x00 0x2404002
474 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
475 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
476 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
477 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
478 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
479 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
480 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
481 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
482 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
483 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
484 0xc1c2c1c2 0x41c341c3 0x3fc13fc1 0x40c13fc2 0x3fc240c1 0x41c040c0 0x3fc23fc2 0x40c13fc2
485 0x3fc140c0 0x41c040c0 0x3fc33fc3 0x40c23fc2 0x3fc240c1 0x41c040c0 0x3fc23fc2 0x40c23fc2
486 0x3fc140c1 0x41c040c0 0x00 0x00 0x41c741c7 0xc1c7c1c7 0x00 0x00
487 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0
488 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0 0x3fc03fc0
489 0xa0ce00 0x00 0xb6840000 0x00 0x00 0x00 0x18181818 0x18181818
490 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
491 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
492 0x4b5763 0x4b 0x57630000 0x4b5763 0x4b 0x57630000 0x88888888 0x8474759
493 0x69780849 0x49596d7a 0x849495a 0x6d790848 0x48596c78 0x8484858 0x6a780848 0x48586a78
494 0x8484858 0x6c78084a 0x4a5b6d79 0x8474759 0x697a0848 0x48596b79 0x8484859 0x6c7a0848
495 0x48586c79 0x8484857 0x68770848 0x48576877 0x8484857 0x6a77084a 0x4a5a6a77 0x8464659
496 0x69790848 0x48586b79 0x8484858 0x6c7a0848 0x48596c79 0x8484857 0x68770848 0x48576877
497 0x8494958 0x6d7a084b 0x4b5c6c77 0x847475a 0x6a7b0849 0x495a6e7c 0x849495a 0x6e7c0849
498 0x495b6e7c 0x8494959 0x6a7a0849 0x49596a7a 0x84a4a5a 0x6f7d084b 0x4b5c6e7b 0x00
499 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x85848484
500 0xc3c4c4c5 0xc4c3c33f 0xc3c3c2c2 0xc2c2c03f 0xc3c3c3c4 0xc4c4c33f 0xc2c2c2c2 0xc1c3c1c1
501 0xc0c08282 0x83848686 0x88880000 0x00 0x00 0x00 0x00 0x00
502 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
503 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
504 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
505 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
506 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
507 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
508 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
509 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
510 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
511 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
512 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
513 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
514 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
515 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
516 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
517 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
518 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
519 0x00 0x00 0x00 0x00 0x00 0x00 0x1111 0x00
520 0x8080f703 0x10808080 0x80050d13 0x00 0x00 0x00 0x00 0x00
521 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
522 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
523 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
524 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
525 0x00 0x00 0x00 0xa4 0xce000000 0xb684 0x00 0x00
526 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
527 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
528 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
529 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
530 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
531 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
532 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
533 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
534 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
535 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
536 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
537 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
538 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
539 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
540 };
Staging tree of Stijn Tintel